1/* Target-dependent code for the Texas Instruments MSP430 for GDB, the 2 GNU debugger. 3 4 Copyright (C) 2012-2023 Free Software Foundation, Inc. 5 6 Contributed by Red Hat, Inc. 7 8 This file is part of GDB. 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 22 23#include "defs.h" 24#include "arch-utils.h" 25#include "prologue-value.h" 26#include "target.h" 27#include "regcache.h" 28#include "dis-asm.h" 29#include "gdbtypes.h" 30#include "frame.h" 31#include "frame-unwind.h" 32#include "frame-base.h" 33#include "value.h" 34#include "gdbcore.h" 35#include "dwarf2/frame.h" 36#include "reggroups.h" 37#include "gdbarch.h" 38 39#include "elf/msp430.h" 40#include "opcode/msp430-decode.h" 41#include "elf-bfd.h" 42 43/* Register Numbers. */ 44 45enum 46{ 47 MSP430_PC_RAW_REGNUM, 48 MSP430_SP_RAW_REGNUM, 49 MSP430_SR_RAW_REGNUM, 50 MSP430_CG_RAW_REGNUM, 51 MSP430_R4_RAW_REGNUM, 52 MSP430_R5_RAW_REGNUM, 53 MSP430_R6_RAW_REGNUM, 54 MSP430_R7_RAW_REGNUM, 55 MSP430_R8_RAW_REGNUM, 56 MSP430_R9_RAW_REGNUM, 57 MSP430_R10_RAW_REGNUM, 58 MSP430_R11_RAW_REGNUM, 59 MSP430_R12_RAW_REGNUM, 60 MSP430_R13_RAW_REGNUM, 61 MSP430_R14_RAW_REGNUM, 62 MSP430_R15_RAW_REGNUM, 63 64 MSP430_NUM_REGS, 65 66 MSP430_PC_REGNUM = MSP430_NUM_REGS, 67 MSP430_SP_REGNUM, 68 MSP430_SR_REGNUM, 69 MSP430_CG_REGNUM, 70 MSP430_R4_REGNUM, 71 MSP430_R5_REGNUM, 72 MSP430_R6_REGNUM, 73 MSP430_R7_REGNUM, 74 MSP430_R8_REGNUM, 75 MSP430_R9_REGNUM, 76 MSP430_R10_REGNUM, 77 MSP430_R11_REGNUM, 78 MSP430_R12_REGNUM, 79 MSP430_R13_REGNUM, 80 MSP430_R14_REGNUM, 81 MSP430_R15_REGNUM, 82 83 MSP430_NUM_TOTAL_REGS, 84 MSP430_NUM_PSEUDO_REGS = MSP430_NUM_TOTAL_REGS - MSP430_NUM_REGS 85}; 86 87enum 88{ 89 /* TI MSP430 Architecture. */ 90 MSP_ISA_MSP430, 91 92 /* TI MSP430X Architecture. */ 93 MSP_ISA_MSP430X 94}; 95 96enum 97{ 98 /* The small code model limits code addresses to 16 bits. */ 99 MSP_SMALL_CODE_MODEL, 100 101 /* The large code model uses 20 bit addresses for function 102 pointers. These are stored in memory using four bytes (32 bits). */ 103 MSP_LARGE_CODE_MODEL 104}; 105 106/* Architecture specific data. */ 107 108struct msp430_gdbarch_tdep : gdbarch_tdep_base 109{ 110 /* The ELF header flags specify the multilib used. */ 111 int elf_flags = 0; 112 113 /* One of MSP_ISA_MSP430 or MSP_ISA_MSP430X. */ 114 int isa = 0; 115 116 /* One of MSP_SMALL_CODE_MODEL or MSP_LARGE_CODE_MODEL. If, at 117 some point, we support different data models too, we'll probably 118 structure things so that we can combine values using logical 119 "or". */ 120 int code_model = 0; 121}; 122 123/* This structure holds the results of a prologue analysis. */ 124 125struct msp430_prologue 126{ 127 /* The offset from the frame base to the stack pointer --- always 128 zero or negative. 129 130 Calling this a "size" is a bit misleading, but given that the 131 stack grows downwards, using offsets for everything keeps one 132 from going completely sign-crazy: you never change anything's 133 sign for an ADD instruction; always change the second operand's 134 sign for a SUB instruction; and everything takes care of 135 itself. */ 136 int frame_size; 137 138 /* Non-zero if this function has initialized the frame pointer from 139 the stack pointer, zero otherwise. */ 140 int has_frame_ptr; 141 142 /* If has_frame_ptr is non-zero, this is the offset from the frame 143 base to where the frame pointer points. This is always zero or 144 negative. */ 145 int frame_ptr_offset; 146 147 /* The address of the first instruction at which the frame has been 148 set up and the arguments are where the debug info says they are 149 --- as best as we can tell. */ 150 CORE_ADDR prologue_end; 151 152 /* reg_offset[R] is the offset from the CFA at which register R is 153 saved, or 1 if register R has not been saved. (Real values are 154 always zero or negative.) */ 155 int reg_offset[MSP430_NUM_TOTAL_REGS]; 156}; 157 158/* Implement the "register_type" gdbarch method. */ 159 160static struct type * 161msp430_register_type (struct gdbarch *gdbarch, int reg_nr) 162{ 163 if (reg_nr < MSP430_NUM_REGS) 164 return builtin_type (gdbarch)->builtin_uint32; 165 else if (reg_nr == MSP430_PC_REGNUM) 166 return builtin_type (gdbarch)->builtin_func_ptr; 167 else 168 return builtin_type (gdbarch)->builtin_uint16; 169} 170 171/* Implement another version of the "register_type" gdbarch method 172 for msp430x. */ 173 174static struct type * 175msp430x_register_type (struct gdbarch *gdbarch, int reg_nr) 176{ 177 if (reg_nr < MSP430_NUM_REGS) 178 return builtin_type (gdbarch)->builtin_uint32; 179 else if (reg_nr == MSP430_PC_REGNUM) 180 return builtin_type (gdbarch)->builtin_func_ptr; 181 else 182 return builtin_type (gdbarch)->builtin_uint32; 183} 184 185/* Implement the "register_name" gdbarch method. */ 186 187static const char * 188msp430_register_name (struct gdbarch *gdbarch, int regnr) 189{ 190 static const char *const reg_names[] = { 191 /* Raw registers. */ 192 "", "", "", "", "", "", "", "", 193 "", "", "", "", "", "", "", "", 194 /* Pseudo registers. */ 195 "pc", "sp", "sr", "cg", "r4", "r5", "r6", "r7", 196 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 197 }; 198 199 gdb_static_assert (ARRAY_SIZE (reg_names) == (MSP430_NUM_REGS 200 + MSP430_NUM_PSEUDO_REGS)); 201 return reg_names[regnr]; 202} 203 204/* Implement the "register_reggroup_p" gdbarch method. */ 205 206static int 207msp430_register_reggroup_p (struct gdbarch *gdbarch, int regnum, 208 const struct reggroup *group) 209{ 210 if (group == all_reggroup) 211 return 1; 212 213 /* All other registers are saved and restored. */ 214 if (group == save_reggroup || group == restore_reggroup) 215 return (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS); 216 217 return group == general_reggroup; 218} 219 220/* Implement the "pseudo_register_read" gdbarch method. */ 221 222static enum register_status 223msp430_pseudo_register_read (struct gdbarch *gdbarch, 224 readable_regcache *regcache, 225 int regnum, gdb_byte *buffer) 226{ 227 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS) 228 { 229 enum register_status status; 230 ULONGEST val; 231 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 232 int regsize = register_size (gdbarch, regnum); 233 int raw_regnum = regnum - MSP430_NUM_REGS; 234 235 status = regcache->raw_read (raw_regnum, &val); 236 if (status == REG_VALID) 237 store_unsigned_integer (buffer, regsize, byte_order, val); 238 239 return status; 240 } 241 else 242 gdb_assert_not_reached ("invalid pseudo register number"); 243} 244 245/* Implement the "pseudo_register_write" gdbarch method. */ 246 247static void 248msp430_pseudo_register_write (struct gdbarch *gdbarch, 249 struct regcache *regcache, 250 int regnum, const gdb_byte *buffer) 251{ 252 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS) 253 254 { 255 ULONGEST val; 256 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 257 int regsize = register_size (gdbarch, regnum); 258 int raw_regnum = regnum - MSP430_NUM_REGS; 259 260 val = extract_unsigned_integer (buffer, regsize, byte_order); 261 regcache_raw_write_unsigned (regcache, raw_regnum, val); 262 263 } 264 else 265 gdb_assert_not_reached ("invalid pseudo register number"); 266} 267 268/* Implement the `register_sim_regno' gdbarch method. */ 269 270static int 271msp430_register_sim_regno (struct gdbarch *gdbarch, int regnum) 272{ 273 gdb_assert (regnum < MSP430_NUM_REGS); 274 275 /* So long as regnum is in [0, RL78_NUM_REGS), it's valid. We 276 just want to override the default here which disallows register 277 numbers which have no names. */ 278 return regnum; 279} 280 281constexpr gdb_byte msp430_break_insn[] = { 0x43, 0x43 }; 282 283typedef BP_MANIPULATION (msp430_break_insn) msp430_breakpoint; 284 285/* Define a "handle" struct for fetching the next opcode. */ 286 287struct msp430_get_opcode_byte_handle 288{ 289 CORE_ADDR pc; 290}; 291 292/* Fetch a byte on behalf of the opcode decoder. HANDLE contains 293 the memory address of the next byte to fetch. If successful, 294 the address in the handle is updated and the byte fetched is 295 returned as the value of the function. If not successful, -1 296 is returned. */ 297 298static int 299msp430_get_opcode_byte (void *handle) 300{ 301 struct msp430_get_opcode_byte_handle *opcdata 302 = (struct msp430_get_opcode_byte_handle *) handle; 303 int status; 304 gdb_byte byte; 305 306 status = target_read_memory (opcdata->pc, &byte, 1); 307 if (status == 0) 308 { 309 opcdata->pc += 1; 310 return byte; 311 } 312 else 313 return -1; 314} 315 316/* Function for finding saved registers in a 'struct pv_area'; this 317 function is passed to pv_area::scan. 318 319 If VALUE is a saved register, ADDR says it was saved at a constant 320 offset from the frame base, and SIZE indicates that the whole 321 register was saved, record its offset. */ 322 323static void 324check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) 325{ 326 struct msp430_prologue *result = (struct msp430_prologue *) result_untyped; 327 328 if (value.kind == pvk_register 329 && value.k == 0 330 && pv_is_register (addr, MSP430_SP_REGNUM) 331 && size == register_size (target_gdbarch (), value.reg)) 332 result->reg_offset[value.reg] = addr.k; 333} 334 335/* Analyze a prologue starting at START_PC, going no further than 336 LIMIT_PC. Fill in RESULT as appropriate. */ 337 338static void 339msp430_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc, 340 CORE_ADDR limit_pc, struct msp430_prologue *result) 341{ 342 CORE_ADDR pc, next_pc; 343 int rn; 344 pv_t reg[MSP430_NUM_TOTAL_REGS]; 345 CORE_ADDR after_last_frame_setup_insn = start_pc; 346 msp430_gdbarch_tdep *tdep = gdbarch_tdep<msp430_gdbarch_tdep> (gdbarch); 347 int code_model = tdep->code_model; 348 int sz; 349 350 memset (result, 0, sizeof (*result)); 351 352 for (rn = 0; rn < MSP430_NUM_TOTAL_REGS; rn++) 353 { 354 reg[rn] = pv_register (rn, 0); 355 result->reg_offset[rn] = 1; 356 } 357 358 pv_area stack (MSP430_SP_REGNUM, gdbarch_addr_bit (gdbarch)); 359 360 /* The call instruction has saved the return address on the stack. */ 361 sz = code_model == MSP_LARGE_CODE_MODEL ? 4 : 2; 362 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -sz); 363 stack.store (reg[MSP430_SP_REGNUM], sz, reg[MSP430_PC_REGNUM]); 364 365 pc = start_pc; 366 while (pc < limit_pc) 367 { 368 int bytes_read; 369 struct msp430_get_opcode_byte_handle opcode_handle; 370 MSP430_Opcode_Decoded opc; 371 372 opcode_handle.pc = pc; 373 bytes_read = msp430_decode_opcode (pc, &opc, msp430_get_opcode_byte, 374 &opcode_handle); 375 next_pc = pc + bytes_read; 376 377 if (opc.id == MSO_push && opc.op[0].type == MSP430_Operand_Register) 378 { 379 int rsrc = opc.op[0].reg; 380 381 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -2); 382 stack.store (reg[MSP430_SP_REGNUM], 2, reg[rsrc]); 383 after_last_frame_setup_insn = next_pc; 384 } 385 else if (opc.id == MSO_push /* PUSHM */ 386 && opc.op[0].type == MSP430_Operand_None 387 && opc.op[1].type == MSP430_Operand_Register) 388 { 389 int rsrc = opc.op[1].reg; 390 int count = opc.repeats + 1; 391 int size = opc.size == 16 ? 2 : 4; 392 393 while (count > 0) 394 { 395 reg[MSP430_SP_REGNUM] 396 = pv_add_constant (reg[MSP430_SP_REGNUM], -size); 397 stack.store (reg[MSP430_SP_REGNUM], size, reg[rsrc]); 398 rsrc--; 399 count--; 400 } 401 after_last_frame_setup_insn = next_pc; 402 } 403 else if (opc.id == MSO_sub 404 && opc.op[0].type == MSP430_Operand_Register 405 && opc.op[0].reg == MSR_SP 406 && opc.op[1].type == MSP430_Operand_Immediate) 407 { 408 int addend = opc.op[1].addend; 409 410 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], 411 -addend); 412 after_last_frame_setup_insn = next_pc; 413 } 414 else if (opc.id == MSO_mov 415 && opc.op[0].type == MSP430_Operand_Immediate 416 && 12 <= opc.op[0].reg && opc.op[0].reg <= 15) 417 after_last_frame_setup_insn = next_pc; 418 else 419 { 420 /* Terminate the prologue scan. */ 421 break; 422 } 423 424 pc = next_pc; 425 } 426 427 /* Is the frame size (offset, really) a known constant? */ 428 if (pv_is_register (reg[MSP430_SP_REGNUM], MSP430_SP_REGNUM)) 429 result->frame_size = reg[MSP430_SP_REGNUM].k; 430 431 /* Record where all the registers were saved. */ 432 stack.scan (check_for_saved, result); 433 434 result->prologue_end = after_last_frame_setup_insn; 435} 436 437/* Implement the "skip_prologue" gdbarch method. */ 438 439static CORE_ADDR 440msp430_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) 441{ 442 const char *name; 443 CORE_ADDR func_addr, func_end; 444 struct msp430_prologue p; 445 446 /* Try to find the extent of the function that contains PC. */ 447 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) 448 return pc; 449 450 msp430_analyze_prologue (gdbarch, pc, func_end, &p); 451 return p.prologue_end; 452} 453 454/* Given a frame described by THIS_FRAME, decode the prologue of its 455 associated function if there is not cache entry as specified by 456 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and 457 return that struct as the value of this function. */ 458 459static struct msp430_prologue * 460msp430_analyze_frame_prologue (frame_info_ptr this_frame, 461 void **this_prologue_cache) 462{ 463 if (!*this_prologue_cache) 464 { 465 CORE_ADDR func_start, stop_addr; 466 467 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct msp430_prologue); 468 469 func_start = get_frame_func (this_frame); 470 stop_addr = get_frame_pc (this_frame); 471 472 /* If we couldn't find any function containing the PC, then 473 just initialize the prologue cache, but don't do anything. */ 474 if (!func_start) 475 stop_addr = func_start; 476 477 msp430_analyze_prologue (get_frame_arch (this_frame), func_start, 478 stop_addr, 479 (struct msp430_prologue *) *this_prologue_cache); 480 } 481 482 return (struct msp430_prologue *) *this_prologue_cache; 483} 484 485/* Given a frame and a prologue cache, return this frame's base. */ 486 487static CORE_ADDR 488msp430_frame_base (frame_info_ptr this_frame, void **this_prologue_cache) 489{ 490 struct msp430_prologue *p 491 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache); 492 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MSP430_SP_REGNUM); 493 494 return sp - p->frame_size; 495} 496 497/* Implement the "frame_this_id" method for unwinding frames. */ 498 499static void 500msp430_this_id (frame_info_ptr this_frame, 501 void **this_prologue_cache, struct frame_id *this_id) 502{ 503 *this_id = frame_id_build (msp430_frame_base (this_frame, 504 this_prologue_cache), 505 get_frame_func (this_frame)); 506} 507 508/* Implement the "frame_prev_register" method for unwinding frames. */ 509 510static struct value * 511msp430_prev_register (frame_info_ptr this_frame, 512 void **this_prologue_cache, int regnum) 513{ 514 struct msp430_prologue *p 515 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache); 516 CORE_ADDR frame_base = msp430_frame_base (this_frame, this_prologue_cache); 517 518 if (regnum == MSP430_SP_REGNUM) 519 return frame_unwind_got_constant (this_frame, regnum, frame_base); 520 521 /* If prologue analysis says we saved this register somewhere, 522 return a description of the stack slot holding it. */ 523 else if (p->reg_offset[regnum] != 1) 524 { 525 struct value *rv = frame_unwind_got_memory (this_frame, regnum, 526 frame_base + 527 p->reg_offset[regnum]); 528 529 if (regnum == MSP430_PC_REGNUM) 530 { 531 ULONGEST pc = value_as_long (rv); 532 533 return frame_unwind_got_constant (this_frame, regnum, pc); 534 } 535 return rv; 536 } 537 538 /* Otherwise, presume we haven't changed the value of this 539 register, and get it from the next frame. */ 540 else 541 return frame_unwind_got_register (this_frame, regnum, regnum); 542} 543 544static const struct frame_unwind msp430_unwind = { 545 "msp430 prologue", 546 NORMAL_FRAME, 547 default_frame_unwind_stop_reason, 548 msp430_this_id, 549 msp430_prev_register, 550 NULL, 551 default_frame_sniffer 552}; 553 554/* Implement the "dwarf2_reg_to_regnum" gdbarch method. */ 555 556static int 557msp430_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) 558{ 559 if (reg >= 0 && reg < MSP430_NUM_REGS) 560 return reg + MSP430_NUM_REGS; 561 return -1; 562} 563 564/* Implement the "return_value" gdbarch method. */ 565 566static enum return_value_convention 567msp430_return_value (struct gdbarch *gdbarch, 568 struct value *function, 569 struct type *valtype, 570 struct regcache *regcache, 571 gdb_byte *readbuf, const gdb_byte *writebuf) 572{ 573 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 574 LONGEST valtype_len = valtype->length (); 575 msp430_gdbarch_tdep *tdep = gdbarch_tdep<msp430_gdbarch_tdep> (gdbarch); 576 int code_model = tdep->code_model; 577 578 if (valtype->length () > 8 579 || valtype->code () == TYPE_CODE_STRUCT 580 || valtype->code () == TYPE_CODE_UNION) 581 return RETURN_VALUE_STRUCT_CONVENTION; 582 583 if (readbuf) 584 { 585 ULONGEST u; 586 int argreg = MSP430_R12_REGNUM; 587 int offset = 0; 588 589 while (valtype_len > 0) 590 { 591 int size = 2; 592 593 if (code_model == MSP_LARGE_CODE_MODEL 594 && valtype->code () == TYPE_CODE_PTR) 595 { 596 size = 4; 597 } 598 599 regcache_cooked_read_unsigned (regcache, argreg, &u); 600 store_unsigned_integer (readbuf + offset, size, byte_order, u); 601 valtype_len -= size; 602 offset += size; 603 argreg++; 604 } 605 } 606 607 if (writebuf) 608 { 609 ULONGEST u; 610 int argreg = MSP430_R12_REGNUM; 611 int offset = 0; 612 613 while (valtype_len > 0) 614 { 615 int size = 2; 616 617 if (code_model == MSP_LARGE_CODE_MODEL 618 && valtype->code () == TYPE_CODE_PTR) 619 { 620 size = 4; 621 } 622 623 u = extract_unsigned_integer (writebuf + offset, size, byte_order); 624 regcache_cooked_write_unsigned (regcache, argreg, u); 625 valtype_len -= size; 626 offset += size; 627 argreg++; 628 } 629 } 630 631 return RETURN_VALUE_REGISTER_CONVENTION; 632} 633 634 635/* Implement the "frame_align" gdbarch method. */ 636 637static CORE_ADDR 638msp430_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) 639{ 640 return align_down (sp, 2); 641} 642 643/* Implement the "push_dummy_call" gdbarch method. */ 644 645static CORE_ADDR 646msp430_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 647 struct regcache *regcache, CORE_ADDR bp_addr, 648 int nargs, struct value **args, CORE_ADDR sp, 649 function_call_return_method return_method, 650 CORE_ADDR struct_addr) 651{ 652 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 653 int write_pass; 654 int sp_off = 0; 655 CORE_ADDR cfa; 656 msp430_gdbarch_tdep *tdep = gdbarch_tdep<msp430_gdbarch_tdep> (gdbarch); 657 int code_model = tdep->code_model; 658 659 struct type *func_type = value_type (function); 660 661 /* Dereference function pointer types. */ 662 while (func_type->code () == TYPE_CODE_PTR) 663 func_type = func_type->target_type (); 664 665 /* The end result had better be a function or a method. */ 666 gdb_assert (func_type->code () == TYPE_CODE_FUNC 667 || func_type->code () == TYPE_CODE_METHOD); 668 669 /* We make two passes; the first does the stack allocation, 670 the second actually stores the arguments. */ 671 for (write_pass = 0; write_pass <= 1; write_pass++) 672 { 673 int i; 674 int arg_reg = MSP430_R12_REGNUM; 675 int args_on_stack = 0; 676 677 if (write_pass) 678 sp = align_down (sp - sp_off, 4); 679 sp_off = 0; 680 681 if (return_method == return_method_struct) 682 { 683 if (write_pass) 684 regcache_cooked_write_unsigned (regcache, arg_reg, struct_addr); 685 arg_reg++; 686 } 687 688 /* Push the arguments. */ 689 for (i = 0; i < nargs; i++) 690 { 691 struct value *arg = args[i]; 692 const gdb_byte *arg_bits = value_contents_all (arg).data (); 693 struct type *arg_type = check_typedef (value_type (arg)); 694 ULONGEST arg_size = arg_type->length (); 695 int offset; 696 int current_arg_on_stack; 697 gdb_byte struct_addr_buf[4]; 698 699 current_arg_on_stack = 0; 700 701 if (arg_type->code () == TYPE_CODE_STRUCT 702 || arg_type->code () == TYPE_CODE_UNION) 703 { 704 /* Aggregates of any size are passed by reference. */ 705 store_unsigned_integer (struct_addr_buf, 4, byte_order, 706 value_address (arg)); 707 arg_bits = struct_addr_buf; 708 arg_size = (code_model == MSP_LARGE_CODE_MODEL) ? 4 : 2; 709 } 710 else 711 { 712 /* Scalars bigger than 8 bytes such as complex doubles are passed 713 on the stack. */ 714 if (arg_size > 8) 715 current_arg_on_stack = 1; 716 } 717 718 719 for (offset = 0; offset < arg_size; offset += 2) 720 { 721 /* The condition below prevents 8 byte scalars from being split 722 between registers and memory (stack). It also prevents other 723 splits once the stack has been written to. */ 724 if (!current_arg_on_stack 725 && (arg_reg 726 + ((arg_size == 8 || args_on_stack) 727 ? ((arg_size - offset) / 2 - 1) 728 : 0) <= MSP430_R15_REGNUM)) 729 { 730 int size = 2; 731 732 if (code_model == MSP_LARGE_CODE_MODEL 733 && (arg_type->code () == TYPE_CODE_PTR 734 || TYPE_IS_REFERENCE (arg_type) 735 || arg_type->code () == TYPE_CODE_STRUCT 736 || arg_type->code () == TYPE_CODE_UNION)) 737 { 738 /* When using the large memory model, pointer, 739 reference, struct, and union arguments are 740 passed using the entire register. (As noted 741 earlier, aggregates are always passed by 742 reference.) */ 743 if (offset != 0) 744 continue; 745 size = 4; 746 } 747 748 if (write_pass) 749 regcache_cooked_write_unsigned (regcache, arg_reg, 750 extract_unsigned_integer 751 (arg_bits + offset, size, 752 byte_order)); 753 754 arg_reg++; 755 } 756 else 757 { 758 if (write_pass) 759 write_memory (sp + sp_off, arg_bits + offset, 2); 760 761 sp_off += 2; 762 args_on_stack = 1; 763 current_arg_on_stack = 1; 764 } 765 } 766 } 767 } 768 769 /* Keep track of the stack address prior to pushing the return address. 770 This is the value that we'll return. */ 771 cfa = sp; 772 773 /* Push the return address. */ 774 { 775 int sz = tdep->code_model == MSP_SMALL_CODE_MODEL ? 2 : 4; 776 sp = sp - sz; 777 write_memory_unsigned_integer (sp, sz, byte_order, bp_addr); 778 } 779 780 /* Update the stack pointer. */ 781 regcache_cooked_write_unsigned (regcache, MSP430_SP_REGNUM, sp); 782 783 return cfa; 784} 785 786/* In order to keep code size small, the compiler may create epilogue 787 code through which more than one function epilogue is routed. I.e. 788 the epilogue and return may just be a branch to some common piece of 789 code which is responsible for tearing down the frame and performing 790 the return. These epilog (label) names will have the common prefix 791 defined here. */ 792 793static const char msp430_epilog_name_prefix[] = "__mspabi_func_epilog_"; 794 795/* Implement the "in_return_stub" gdbarch method. */ 796 797static int 798msp430_in_return_stub (struct gdbarch *gdbarch, CORE_ADDR pc, 799 const char *name) 800{ 801 return (name != NULL 802 && startswith (name, msp430_epilog_name_prefix)); 803} 804 805/* Implement the "skip_trampoline_code" gdbarch method. */ 806static CORE_ADDR 807msp430_skip_trampoline_code (frame_info_ptr frame, CORE_ADDR pc) 808{ 809 struct bound_minimal_symbol bms; 810 const char *stub_name; 811 struct gdbarch *gdbarch = get_frame_arch (frame); 812 813 bms = lookup_minimal_symbol_by_pc (pc); 814 if (!bms.minsym) 815 return pc; 816 817 stub_name = bms.minsym->linkage_name (); 818 819 msp430_gdbarch_tdep *tdep = gdbarch_tdep<msp430_gdbarch_tdep> (gdbarch); 820 if (tdep->code_model == MSP_SMALL_CODE_MODEL 821 && msp430_in_return_stub (gdbarch, pc, stub_name)) 822 { 823 CORE_ADDR sp = get_frame_register_unsigned (frame, MSP430_SP_REGNUM); 824 825 return read_memory_integer 826 (sp + 2 * (stub_name[strlen (msp430_epilog_name_prefix)] - '0'), 827 2, gdbarch_byte_order (gdbarch)); 828 } 829 830 return pc; 831} 832 833/* Allocate and initialize a gdbarch object. */ 834 835static struct gdbarch * 836msp430_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 837{ 838 struct gdbarch *gdbarch; 839 int elf_flags, isa, code_model; 840 841 /* Extract the elf_flags if available. */ 842 if (info.abfd != NULL 843 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) 844 elf_flags = elf_elfheader (info.abfd)->e_flags; 845 else 846 elf_flags = 0; 847 848 if (info.abfd != NULL) 849 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC, 850 OFBA_MSPABI_Tag_ISA)) 851 { 852 case 1: 853 isa = MSP_ISA_MSP430; 854 code_model = MSP_SMALL_CODE_MODEL; 855 break; 856 case 2: 857 isa = MSP_ISA_MSP430X; 858 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC, 859 OFBA_MSPABI_Tag_Code_Model)) 860 { 861 case 1: 862 code_model = MSP_SMALL_CODE_MODEL; 863 break; 864 case 2: 865 code_model = MSP_LARGE_CODE_MODEL; 866 break; 867 default: 868 internal_error (_("Unknown msp430x code memory model")); 869 break; 870 } 871 break; 872 case 0: 873 /* This can happen when loading a previously dumped data structure. 874 Use the ISA and code model from the current architecture, provided 875 it's compatible. */ 876 { 877 struct gdbarch *ca = get_current_arch (); 878 if (ca && gdbarch_bfd_arch_info (ca)->arch == bfd_arch_msp430) 879 { 880 msp430_gdbarch_tdep *ca_tdep 881 = gdbarch_tdep<msp430_gdbarch_tdep> (ca); 882 883 elf_flags = ca_tdep->elf_flags; 884 isa = ca_tdep->isa; 885 code_model = ca_tdep->code_model; 886 break; 887 } 888 } 889 /* Fall through. */ 890 default: 891 error (_("Unknown msp430 isa")); 892 break; 893 } 894 else 895 { 896 isa = MSP_ISA_MSP430; 897 code_model = MSP_SMALL_CODE_MODEL; 898 } 899 900 901 /* Try to find the architecture in the list of already defined 902 architectures. */ 903 for (arches = gdbarch_list_lookup_by_info (arches, &info); 904 arches != NULL; 905 arches = gdbarch_list_lookup_by_info (arches->next, &info)) 906 { 907 msp430_gdbarch_tdep *candidate_tdep 908 = gdbarch_tdep<msp430_gdbarch_tdep> (arches->gdbarch); 909 910 if (candidate_tdep->elf_flags != elf_flags 911 || candidate_tdep->isa != isa 912 || candidate_tdep->code_model != code_model) 913 continue; 914 915 return arches->gdbarch; 916 } 917 918 /* None found, create a new architecture from the information 919 provided. */ 920 msp430_gdbarch_tdep *tdep = new msp430_gdbarch_tdep; 921 gdbarch = gdbarch_alloc (&info, tdep); 922 tdep->elf_flags = elf_flags; 923 tdep->isa = isa; 924 tdep->code_model = code_model; 925 926 /* Registers. */ 927 set_gdbarch_num_regs (gdbarch, MSP430_NUM_REGS); 928 set_gdbarch_num_pseudo_regs (gdbarch, MSP430_NUM_PSEUDO_REGS); 929 set_gdbarch_register_name (gdbarch, msp430_register_name); 930 if (isa == MSP_ISA_MSP430) 931 set_gdbarch_register_type (gdbarch, msp430_register_type); 932 else 933 set_gdbarch_register_type (gdbarch, msp430x_register_type); 934 set_gdbarch_pc_regnum (gdbarch, MSP430_PC_REGNUM); 935 set_gdbarch_sp_regnum (gdbarch, MSP430_SP_REGNUM); 936 set_gdbarch_register_reggroup_p (gdbarch, msp430_register_reggroup_p); 937 set_gdbarch_pseudo_register_read (gdbarch, msp430_pseudo_register_read); 938 set_gdbarch_pseudo_register_write (gdbarch, msp430_pseudo_register_write); 939 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, msp430_dwarf2_reg_to_regnum); 940 set_gdbarch_register_sim_regno (gdbarch, msp430_register_sim_regno); 941 942 /* Data types. */ 943 set_gdbarch_char_signed (gdbarch, 0); 944 set_gdbarch_short_bit (gdbarch, 16); 945 set_gdbarch_int_bit (gdbarch, 16); 946 set_gdbarch_long_bit (gdbarch, 32); 947 set_gdbarch_long_long_bit (gdbarch, 64); 948 if (code_model == MSP_SMALL_CODE_MODEL) 949 { 950 set_gdbarch_ptr_bit (gdbarch, 16); 951 set_gdbarch_addr_bit (gdbarch, 16); 952 } 953 else /* MSP_LARGE_CODE_MODEL */ 954 { 955 set_gdbarch_ptr_bit (gdbarch, 32); 956 set_gdbarch_addr_bit (gdbarch, 32); 957 } 958 set_gdbarch_dwarf2_addr_size (gdbarch, 4); 959 set_gdbarch_float_bit (gdbarch, 32); 960 set_gdbarch_float_format (gdbarch, floatformats_ieee_single); 961 set_gdbarch_double_bit (gdbarch, 64); 962 set_gdbarch_long_double_bit (gdbarch, 64); 963 set_gdbarch_double_format (gdbarch, floatformats_ieee_double); 964 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); 965 966 /* Breakpoints. */ 967 set_gdbarch_breakpoint_kind_from_pc (gdbarch, 968 msp430_breakpoint::kind_from_pc); 969 set_gdbarch_sw_breakpoint_from_kind (gdbarch, 970 msp430_breakpoint::bp_from_kind); 971 set_gdbarch_decr_pc_after_break (gdbarch, 1); 972 973 /* Frames, prologues, etc. */ 974 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 975 set_gdbarch_skip_prologue (gdbarch, msp430_skip_prologue); 976 set_gdbarch_frame_align (gdbarch, msp430_frame_align); 977 dwarf2_append_unwinders (gdbarch); 978 frame_unwind_append_unwinder (gdbarch, &msp430_unwind); 979 980 /* Dummy frames, return values. */ 981 set_gdbarch_push_dummy_call (gdbarch, msp430_push_dummy_call); 982 set_gdbarch_return_value (gdbarch, msp430_return_value); 983 984 /* Trampolines. */ 985 set_gdbarch_in_solib_return_trampoline (gdbarch, msp430_in_return_stub); 986 set_gdbarch_skip_trampoline_code (gdbarch, msp430_skip_trampoline_code); 987 988 /* Virtual tables. */ 989 set_gdbarch_vbit_in_delta (gdbarch, 0); 990 991 return gdbarch; 992} 993 994/* Register the initialization routine. */ 995 996void _initialize_msp430_tdep (); 997void 998_initialize_msp430_tdep () 999{ 1000 gdbarch_register (bfd_arch_msp430, msp430_gdbarch_init); 1001} 1002