1/* Native-dependent code for AArch64.
2
3   Copyright (C) 2011-2023 Free Software Foundation, Inc.
4
5   This file is part of GDB.
6
7   This program is free software; you can redistribute it and/or modify
8   it under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 3 of the License, or
10   (at your option) any later version.
11
12   This program is distributed in the hope that it will be useful,
13   but WITHOUT ANY WARRANTY; without even the implied warranty of
14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15   GNU General Public License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
20#include "defs.h"
21#include "gdbarch.h"
22#include "inferior.h"
23#include "cli/cli-cmds.h"
24#include "aarch64-nat.h"
25
26#include <unordered_map>
27
28/* Hash table storing per-process data.  We don't bind this to a
29   per-inferior registry because of targets like x86 GNU/Linux that
30   need to keep track of processes that aren't bound to any inferior
31   (e.g., fork children, checkpoints).  */
32
33static std::unordered_map<pid_t, aarch64_debug_reg_state>
34aarch64_debug_process_state;
35
36/* See aarch64-nat.h.  */
37
38struct aarch64_debug_reg_state *
39aarch64_lookup_debug_reg_state (pid_t pid)
40{
41  auto it = aarch64_debug_process_state.find (pid);
42  if (it != aarch64_debug_process_state.end ())
43    return &it->second;
44
45  return nullptr;
46}
47
48/* See aarch64-nat.h.  */
49
50struct aarch64_debug_reg_state *
51aarch64_get_debug_reg_state (pid_t pid)
52{
53  return &aarch64_debug_process_state[pid];
54}
55
56/* See aarch64-nat.h.  */
57
58void
59aarch64_remove_debug_reg_state (pid_t pid)
60{
61  aarch64_debug_process_state.erase (pid);
62}
63
64/* Returns the number of hardware watchpoints of type TYPE that we can
65   set.  Value is positive if we can set CNT watchpoints, zero if
66   setting watchpoints of type TYPE is not supported, and negative if
67   CNT is more than the maximum number of watchpoints of type TYPE
68   that we can support.  TYPE is one of bp_hardware_watchpoint,
69   bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
70   CNT is the number of such watchpoints used so far (including this
71   one).  OTHERTYPE is non-zero if other types of watchpoints are
72   currently enabled.  */
73
74int
75aarch64_can_use_hw_breakpoint (enum bptype type, int cnt, int othertype)
76{
77  if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
78      || type == bp_access_watchpoint || type == bp_watchpoint)
79    {
80      if (aarch64_num_wp_regs == 0)
81	return 0;
82    }
83  else if (type == bp_hardware_breakpoint)
84    {
85      if (aarch64_num_bp_regs == 0)
86	return 0;
87    }
88  else
89    gdb_assert_not_reached ("unexpected breakpoint type");
90
91  /* We always return 1 here because we don't have enough information
92     about possible overlap of addresses that they want to watch.  As an
93     extreme example, consider the case where all the watchpoints watch
94     the same address and the same region length: then we can handle a
95     virtually unlimited number of watchpoints, due to debug register
96     sharing implemented via reference counts.  */
97  return 1;
98}
99
100/* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
101   Return 0 on success, -1 on failure.  */
102
103int
104aarch64_insert_hw_breakpoint (struct gdbarch *gdbarch,
105			      struct bp_target_info *bp_tgt)
106{
107  int ret;
108  CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
109  int len;
110  const enum target_hw_bp_type type = hw_execute;
111  struct aarch64_debug_reg_state *state
112    = aarch64_get_debug_reg_state (inferior_ptid.pid ());
113
114  gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
115
116  if (show_debug_regs)
117    gdb_printf (gdb_stdlog,
118		"insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
119		(unsigned long) addr, len);
120
121  ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */,
122				   inferior_ptid, state);
123
124  if (show_debug_regs)
125    {
126      aarch64_show_debug_reg_state (state,
127				    "insert_hw_breakpoint", addr, len, type);
128    }
129
130  return ret;
131}
132
133/* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
134   Return 0 on success, -1 on failure.  */
135
136int
137aarch64_remove_hw_breakpoint (struct gdbarch *gdbarch,
138			      struct bp_target_info *bp_tgt)
139{
140  int ret;
141  CORE_ADDR addr = bp_tgt->placed_address;
142  int len = 4;
143  const enum target_hw_bp_type type = hw_execute;
144  struct aarch64_debug_reg_state *state
145    = aarch64_get_debug_reg_state (inferior_ptid.pid ());
146
147  gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
148
149  if (show_debug_regs)
150    gdb_printf (gdb_stdlog,
151		"remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
152		(unsigned long) addr, len);
153
154  ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */,
155				   inferior_ptid, state);
156
157  if (show_debug_regs)
158    {
159      aarch64_show_debug_reg_state (state,
160				    "remove_hw_watchpoint", addr, len, type);
161    }
162
163  return ret;
164}
165
166/* Insert a watchpoint to watch a memory region which starts at
167   address ADDR and whose length is LEN bytes.  Watch memory accesses
168   of the type TYPE.  Return 0 on success, -1 on failure.  */
169
170int
171aarch64_insert_watchpoint (CORE_ADDR addr, int len, enum target_hw_bp_type type,
172			   struct expression *cond)
173{
174  int ret;
175  struct aarch64_debug_reg_state *state
176    = aarch64_get_debug_reg_state (inferior_ptid.pid ());
177
178  if (show_debug_regs)
179    gdb_printf (gdb_stdlog,
180		"insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
181		(unsigned long) addr, len);
182
183  gdb_assert (type != hw_execute);
184
185  ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */,
186				   inferior_ptid, state);
187
188  if (show_debug_regs)
189    {
190      aarch64_show_debug_reg_state (state,
191				    "insert_watchpoint", addr, len, type);
192    }
193
194  return ret;
195}
196
197/* Remove a watchpoint that watched the memory region which starts at
198   address ADDR, whose length is LEN bytes, and for accesses of the
199   type TYPE.  Return 0 on success, -1 on failure.  */
200
201int
202aarch64_remove_watchpoint (CORE_ADDR addr, int len, enum target_hw_bp_type type,
203			   struct expression *cond)
204{
205  int ret;
206  struct aarch64_debug_reg_state *state
207    = aarch64_get_debug_reg_state (inferior_ptid.pid ());
208
209  if (show_debug_regs)
210    gdb_printf (gdb_stdlog,
211		"remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
212		(unsigned long) addr, len);
213
214  gdb_assert (type != hw_execute);
215
216  ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */,
217				   inferior_ptid, state);
218
219  if (show_debug_regs)
220    {
221      aarch64_show_debug_reg_state (state,
222				    "remove_watchpoint", addr, len, type);
223    }
224
225  return ret;
226}
227
228/* See aarch64-nat.h.  */
229
230bool
231aarch64_stopped_data_address (const struct aarch64_debug_reg_state *state,
232			      CORE_ADDR addr_trap, CORE_ADDR *addr_p)
233{
234  int i;
235
236  for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
237    {
238      const unsigned int offset
239	= aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
240      const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
241      const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
242      const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
243      const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
244
245      if (state->dr_ref_count_wp[i]
246	  && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
247	  && addr_trap >= addr_watch_aligned
248	  && addr_trap < addr_watch + len)
249	{
250	  /* ADDR_TRAP reports the first address of the memory range
251	     accessed by the CPU, regardless of what was the memory
252	     range watched.  Thus, a large CPU access that straddles
253	     the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
254	     ADDR_TRAP that is lower than the
255	     ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
256
257	     addr: |   4   |   5   |   6   |   7   |   8   |
258				   |---- range watched ----|
259		   |----------- range accessed ------------|
260
261	     In this case, ADDR_TRAP will be 4.
262
263	     To match a watchpoint known to GDB core, we must never
264	     report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
265	     range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
266	     positive on kernels older than 4.10.  See PR
267	     external/20207.  */
268	  *addr_p = addr_orig;
269	  return true;
270	}
271    }
272
273  return false;
274}
275
276/* Define AArch64 maintenance commands.  */
277
278static void
279add_show_debug_regs_command (void)
280{
281  /* A maintenance command to enable printing the internal DRi mirror
282     variables.  */
283  add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
284			   &show_debug_regs, _("\
285Set whether to show variables that mirror the AArch64 debug registers."), _("\
286Show whether to show variables that mirror the AArch64 debug registers."), _("\
287Use \"on\" to enable, \"off\" to disable.\n\
288If enabled, the debug registers values are shown when GDB inserts\n\
289or removes a hardware breakpoint or watchpoint, and when the inferior\n\
290triggers a breakpoint or watchpoint."),
291			   NULL,
292			   NULL,
293			   &maintenance_set_cmdlist,
294			   &maintenance_show_cmdlist);
295}
296
297void
298aarch64_initialize_hw_point ()
299{
300  add_show_debug_regs_command ();
301}
302