1//Original:/proj/frio/dv/testcases/core/c_seq_wb_cs_lsmmrj_mvp/c_seq_wb_cs_lsmmrj_mvp.dsp
2// Spec Reference: sequencer:wb ( csync ldst mmr jump regmv pushpopmultiple)
3# mach: bfin
4# sim: --environment operating
5
6#include "test.h"
7.include "testutils.inc"
8start
9
10include(std.inc)
11include(selfcheck.inc)
12include(gen_int.inc)
13INIT_R_REGS(0);
14INIT_P_REGS(0);
15INIT_I_REGS(0);     // initialize the dsp address regs
16INIT_M_REGS(0);
17INIT_L_REGS(0);
18INIT_B_REGS(0);
19//CHECK_INIT(p5, 0xe0000000);
20include(symtable.inc)
21CHECK_INIT_DEF(p5);
22
23#ifndef STACKSIZE
24#define STACKSIZE 0x10
25#endif
26#ifndef EVT
27#define EVT  0xFFE02000
28#endif
29#ifndef EVT15
30#define EVT15  0xFFE0203C
31#endif
32#ifndef EVT_OVERRIDE
33#define EVT_OVERRIDE 0xFFE02100
34#endif
35#ifndef ITABLE
36#define ITABLE DATA_ADDR_1
37#endif
38
39GEN_INT_INIT(ITABLE) // set location for interrupt table
40
41//
42// Reset/Bootstrap Code
43//   (Here we should set the processor operating modes, initialize registers,
44//
45
46BOOT:
47
48                              // in reset mode now
49LD32_LABEL(sp, KSTACK);   // setup the stack pointer
50FP = SP;        // and frame pointer
51
52LD32(p0, EVT);      // Setup Event Vectors and Handlers
53LD32_LABEL(r0, EHANDLE);  // Emulation Handler (Int0)
54    [ P0 ++ ] = R0;
55
56LD32_LABEL(r0, RHANDLE);  // Reset Handler (Int1)
57    [ P0 ++ ] = R0;
58
59LD32_LABEL(r0, NHANDLE);  // NMI Handler (Int2)
60    [ P0 ++ ] = R0;
61
62LD32_LABEL(r0, XHANDLE);  // Exception Handler (Int3)
63    [ P0 ++ ] = R0;
64
65    [ P0 ++ ] = R0;        // IVT4 not used
66
67LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
68    [ P0 ++ ] = R0;
69
70LD32_LABEL(r0, THANDLE);  // Timer Handler (Int6)
71    [ P0 ++ ] = R0;
72
73LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
74    [ P0 ++ ] = R0;
75
76LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
77    [ P0 ++ ] = R0;
78
79LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
80    [ P0 ++ ] = R0;
81
82LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
83    [ P0 ++ ] = R0;
84
85LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
86    [ P0 ++ ] = R0;
87
88LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
89    [ P0 ++ ] = R0;
90
91LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
92    [ P0 ++ ] = R0;
93
94LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
95    [ P0 ++ ] = R0;
96
97LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
98    [ P0 ++ ] = R0;
99
100LD32(p0, EVT_OVERRIDE);
101    R0 = 0;
102    [ P0 ++ ] = R0;
103    R0 = -1;     // Change this to mask interrupts (*)
104    [ P0 ] = R0;   // IMASK
105CSYNC;
106
107DUMMY:
108
109    R0 = 0 (Z);
110
111LT0 = r0;       // set loop counters to something deterministic
112LB0 = r0;
113LC0 = r0;
114LT1 = r0;
115LB1 = r0;
116LC1 = r0;
117
118ASTAT = r0;     // reset other internal regs
119
120// The following code sets up the test for running in USER mode
121
122LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
123                        // ReturnFromInterrupt (RTI)
124RETI = r0;      // We need to load the return address
125
126// Comment the following line for a USER Mode test
127
128JUMP    STARTSUP;   // jump to code start for SUPERVISOR mode
129
130RTI;
131
132STARTSUP:
133LD32_LABEL(p1, BEGIN);
134
135LD32(p0, EVT15);
136    [ P0 ] = P1;   // IVG15 (General) handler (Int 15) load with start
137
138RAISE 15;   // after we RTI, INT 15 should be taken,& return to BEGIN in
139                // SUPERVISOR MODE & go to different RAISE in supervisor mode
140                // until the end of the test.
141
142NOP;    // Workaround for Bug 217
143RTI;
144
145//
146// The Main Program
147//
148STARTUSER:
149LD32_LABEL(sp, USTACK);   // setup the stack pointer
150FP = SP;            // set frame pointer
151JUMP BEGIN;
152
153//*********************************************************************
154
155BEGIN:
156
157                // COMMENT the following line for USER MODE tests
158    [ -- SP ] = RETI;  // enable interrupts in supervisor mode
159
160                // **** YOUR CODE GOES HERE ****
161
162
163
164    // PUT YOUR TEST HERE!
165// PUSH
166LD32(p1, 0xFFE02034);       // wrt-rd     EVT13             = 0xFFE02034
167//LD32(p2, DATA_ADDR_1);
168loadsym P2, DATA;
169LD32(p3, 0xab5fd490);
170LD32(p4, 0xa581bd94);
171
172LD32(r2, 0x14789232);
173    [ P1 ] = R2;
174        R0 = 0x01;
175        R1 = 0x02;
176        R2 = 0x03;
177        R3 = 0x04;
178        R4 = 0x05;
179        R5 = 0x06;
180        R6 = 0x07;
181        R7 = 0x08;
182        [ -- SP ] = ( R7:0 );
183//  RAISE 2;    // RTN
184CSYNC;
185    R0 = [ P2 ++ ];
186    R1 = [ P1 ];
187JUMP.S LABEL1;
188    P3 = R7;
189    R4 = P3;
190        [ -- SP ] = ( R7:0 );
191        R1 = 0x12;
192        R2 = 0x13;
193        R3 = 0x14;
194        R4 = 0x15;
195        R5 = 0x16;
196        R6 = 0x17;
197        R7 = 0x18;
198
199LABEL1:
200//  RAISE 5;    // RTI
201CSYNC;
202    R2 = [ P2 ++ ];
203
204    P4 = R6;
205    R3 = P4;
206
207        [ -- SP ] = ( R7:0 );
208
209        R2 = 0x23;
210        R3 = 0x24;
211        R4 = 0x25;
212        R5 = 0x26;
213        R6 = 0x27;
214        R7 = 0x28;
215
216// wrt-rd     EVT5              = 0xFFE02034
217LD32(p1, 0xFFE02034);       // wrt-rd     EVT13             = 0xFFE02034
218//  RAISE 6;    // RTI
219CSYNC;
220    R4 = [ P2 ++ ];
221    R6 = [ P1 ];
222JUMP.S LABEL2;
223    P3 = R3;
224    R5 = P3;
225        [ -- SP ] = ( R7:0 );
226// POP
227        R0 = 0x00;
228        R1 = 0x00;
229        R2 = 0x00;
230        R3 = 0x00;
231        R4 = 0x00;
232        R5 = 0x00;
233        R6 = 0x00;
234        R7 = 0x00;
235
236LABEL2:
237CSYNC;
238CHECKREG(r0, 0x00010203);
239CHECKREG(r1, 0x14789232);
240CHECKREG(r2, 0x00000023);
241CHECKREG(r3, 0x00000024);
242CHECKREG(r4, 0x08090A0B);
243CHECKREG(r5, 0x00000026);
244CHECKREG(r6, 0x14789232);
245//  RAISE 7;    // RTI
246CSYNC;
247    R0 = [ P2 ++ ];
248    R1 = [ P1 ];
249    P4 = R4;
250    R2 = P4;
251        ( R7:0 ) = [ SP ++ ];
252
253
254
255CHECKREG(r0, 0x00010203);
256CHECKREG(r1, 0x14789232);
257CHECKREG(r2, 0x04050607);
258CHECKREG(r3, 0x00000007);
259CHECKREG(r4, 0x00000005);
260CHECKREG(r5, 0x00000006);
261CHECKREG(r6, 0x00000007);
262CHECKREG(r7, 0x00000008);
263// wrt-rd     EVT13             = 0xFFE02034
264LD32(p1, 0xFFE02034);
265//  RAISE 8;    // RTI
266CSYNC;
267    R0 = [ P2 ++ ];
268    R1 = [ P1 ];
269JUMP.S LABEL3;
270    P1 = R5;
271    R6 = P1;
272        ( R7:0 ) = [ SP ++ ];
273//CHECKREG(r0, 0x000000a1);  // CHECKREG can not be skipped
274//CHECKREG(r1, 0x000000b2);  // so they cannot appear here
275//CHECKREG(r2, 0x000000c3);
276//CHECKREG(r3, 0x000000d4);
277//CHECKREG(r4, 0x000000e5);
278//CHECKREG(r5, 0x000000f6);
279//CHECKREG(r6, 0x00000017);
280//CHECKREG(r7, 0x00000028);
281   R0 = 12;
282   R1 = 13;
283   R2 = 14;
284   R3 = 15;
285   R4 = 16;
286   R5 = 17;
287   R6 = 18;
288   R7 = 19;
289
290
291LABEL3:
292CSYNC;
293CHECKREG(r0, 0x10111213);
294CHECKREG(r1, 0x14789232);
295//  RAISE 9;    // RTI
296CSYNC;
297    P3 = R6;
298    R7 = P3;
299        ( R7:0 ) = [ SP ++ ];
300
301CHECKREG(r0, 0x00000001);
302CHECKREG(r1, 0x00000002);
303CHECKREG(r2, 0x00000003);
304CHECKREG(r3, 0x00000004);
305CHECKREG(r4, 0x00000005);
306CHECKREG(r5, 0x00000006);
307CHECKREG(r6, 0x00000007);
308CHECKREG(r7, 0x00000008);
309R0 = I0;
310R1 = I1;
311R2 = I2;
312R3 = I3;
313CHECKREG(r0, 0x00000000);
314CHECKREG(r1, 0x00000000);
315CHECKREG(r2, 0x00000000);
316CHECKREG(r3, 0x00000000);
317
318
319END:
320dbg_pass;            // End the test
321
322//*********************************************************************
323
324//
325// Handlers for Events
326//
327
328EHANDLE:            // Emulation Handler 0
329RTE;
330
331RHANDLE:            // Reset Handler 1
332RTI;
333
334NHANDLE:            // NMI Handler 2
335    I0 += 2;
336RTN;
337
338XHANDLE:            // Exception Handler 3
339    R1 = 3;
340RTX;
341
342HWHANDLE:           // HW Error Handler 5
343    I1 += 2;
344RTI;
345
346THANDLE:            // Timer Handler 6
347    I2 += 2;
348RTI;
349
350I7HANDLE:           // IVG 7 Handler
351    I3 += 2;
352RTI;
353
354I8HANDLE:           // IVG 8 Handler
355    I0 += 2;
356RTI;
357
358I9HANDLE:           // IVG 9 Handler
359    I0 += 2;
360RTI;
361
362I10HANDLE:          // IVG 10 Handler
363    R7 = 10;
364RTI;
365
366I11HANDLE:          // IVG 11 Handler
367    I0 = R0;
368    I1 = R1;
369    I2 = R2;
370    I3 = R3;
371    M0 = R4;
372    R0 = 11;
373RTI;
374
375I12HANDLE:          // IVG 12 Handler
376    R1 = 12;
377RTI;
378
379I13HANDLE:          // IVG 13 Handler
380    R2 = 13;
381RTI;
382
383I14HANDLE:          // IVG 14 Handler
384    R3 = 14;
385RTI;
386
387I15HANDLE:          // IVG 15 Handler
388    R4 = 15;
389RTI;
390
391NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug
392
393//
394// Data Segment
395//
396
397.section MEM_DATA_ADDR_1,"aw"
398DATA:
399//  .space (0x10);
400.dd 0x00010203
401.dd 0x04050607
402.dd 0x08090A0B
403.dd 0x0C0D0E0F
404.dd 0x10111213
405.dd 0x14151617
406.dd 0x18191A1B
407.dd 0x1C1D1E1F
408.dd 0x11223344
409.dd 0x55667788
410.dd 0x99717273
411.dd 0x74757677
412.dd 0x82838485
413.dd 0x86878889
414.dd 0x80818283
415.dd 0x84858687
416.dd 0x01020304
417.dd 0x05060708
418.dd 0x09101112
419.dd 0x14151617
420.dd 0x18192021
421
422
423// Stack Segments (Both Kernel and User)
424
425    .space (STACKSIZE);
426KSTACK:
427
428    .space (STACKSIZE);
429USTACK:
430
431.section MEM_DATA_ADDR_2,"aw"
432.dd 0x20212223
433.dd 0x24252627
434.dd 0x28292A2B
435.dd 0x2C2D2E2F
436.dd 0x30313233
437.dd 0x34353637
438.dd 0x38393A3B
439.dd 0x3C3D3E3F
440.dd 0x91929394
441.dd 0x95969798
442.dd 0x99A1A2A3
443.dd 0xA5A6A7A8
444.dd 0xA9B0B1B2
445.dd 0xB3B4B5B6
446.dd 0xB7B8B9C0
447