1# frv testcase for thi $ICCi_2,$GRi,$GRj
2# mach: all
3
4	.include "testutils.inc"
5
6	start
7
8	.global thi
9thi:
10	and_spr_immed	-4081,tbr		; clear tbr.tt
11	set_gr_spr	tbr,gr7
12	inc_gr_immed	2112,gr7		; address of exception handler
13	set_bctrlr_0_0	gr7	; bctrlr 0,0
14
15	set_spr_immed	128,lcr
16	set_gr_immed	0,gr7
17	set_gr_immed	4,gr8
18
19	set_psr_et	1
20	set_spr_addr	ok0,lr
21	set_icc		0x0 0
22	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
23	fail
24ok0:
25	set_spr_addr	bad,lr
26	set_icc		0x1 0
27	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
28
29	set_psr_et	1
30	set_spr_addr	ok2,lr
31	set_icc		0x2 0
32	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
33	fail
34ok2:
35	set_spr_addr	bad,lr
36	set_icc		0x3 0
37	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
38
39	set_spr_addr	bad,lr
40	set_icc		0x4 0
41	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
42
43	set_spr_addr	bad,lr
44	set_icc		0x5 0
45	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
46
47	set_spr_addr	bad,lr
48	set_icc		0x6 0
49	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
50
51	set_spr_addr	bad,lr
52	set_icc		0x7 0
53	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
54
55	set_psr_et	1
56	set_spr_addr	ok8,lr
57	set_icc		0x8 0
58	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
59	fail
60ok8:
61	set_spr_addr	bad,lr
62	set_icc		0x9 0
63	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
64
65	set_psr_et	1
66	set_spr_addr	oka,lr
67	set_icc		0xa 0
68	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
69	fail
70oka:
71	set_spr_addr	bad,lr
72	set_icc		0xb 0
73	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
74
75	set_spr_addr	bad,lr
76	set_icc		0xc 0
77	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
78
79	set_spr_addr	bad,lr
80	set_icc		0xd 0
81	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
82
83	set_spr_addr	bad,lr
84	set_icc		0xe 0
85	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
86
87	set_spr_addr	bad,lr
88	set_icc		0xf 0
89	thi 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
90
91	pass
92bad:
93	fail
94