1//Original:/proj/frio/dv/testcases/seq/se_more_ret_haz/se_more_ret_haz.dsp 2// Description: Return insts following pop, move. 3# mach: bfin 4# sim: --environment operating 5 6#include "test.h" 7.include "testutils.inc" 8start 9 10// 11// Constants and Defines 12// 13 14include(gen_int.inc) 15include(selfcheck.inc) 16include(std.inc) 17include(symtable.inc) 18 19#ifndef STACKSIZE 20#define STACKSIZE 0x10 21#endif 22#ifndef EVT 23#define EVT 0xFFE02000 24#endif 25#ifndef EVT15 26#define EVT15 0xFFE0203C 27#endif 28#ifndef EVT_OVERRIDE 29#define EVT_OVERRIDE 0xFFE02100 30#endif 31#ifndef ITABLE 32#define ITABLE 0xF0000000 33#endif 34 35GEN_INT_INIT(ITABLE) // set location for interrupt table 36// 37// Reset/Bootstrap Code 38// (Here we should set the processor operating modes, initialize registers, 39// etc.) 40// 41 42BOOT: 43INIT_R_REGS(0); // initialize general purpose regs 44 45INIT_P_REGS(0); // initialize the pointers 46 47INIT_I_REGS(0); // initialize the dsp address regs 48INIT_M_REGS(0); 49INIT_L_REGS(0); 50INIT_B_REGS(0); 51 52LD32_LABEL(sp, KSTACK); // setup the stack pointer 53FP = SP; // and frame pointer 54 55CLI R1; 56 57LD32(p0, EVT); // Setup Event Vectors and Handlers 58 59LD32_LABEL(r0, EHANDLE); // Emulation Handler (Int0) 60 [ P0 ++ ] = R0; 61 62LD32_LABEL(r0, RHANDLE); // Reset Handler (Int1) 63 [ P0 ++ ] = R0; 64 65LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2) 66 [ P0 ++ ] = R0; 67 68LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3) 69 [ P0 ++ ] = R0; 70 71 [ P0 ++ ] = R0; // IVT4 not used 72 73LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5) 74 [ P0 ++ ] = R0; 75 76LD32_LABEL(r0, THANDLE); // Timer Handler (Int6) 77 [ P0 ++ ] = R0; 78 79LD32_LABEL(r0, I7HANDLE); // IVG7 Handler 80 [ P0 ++ ] = R0; 81 82LD32_LABEL(r0, I8HANDLE); // IVG8 Handler 83 [ P0 ++ ] = R0; 84 85LD32_LABEL(r0, I9HANDLE); // IVG9 Handler 86 [ P0 ++ ] = R0; 87 88LD32_LABEL(r0, I10HANDLE);// IVG10 Handler 89 [ P0 ++ ] = R0; 90 91LD32_LABEL(r0, I11HANDLE);// IVG11 Handler 92 [ P0 ++ ] = R0; 93 94LD32_LABEL(r0, I12HANDLE);// IVG12 Handler 95 [ P0 ++ ] = R0; 96 97LD32_LABEL(r0, I13HANDLE);// IVG13 Handler 98 [ P0 ++ ] = R0; 99 100LD32_LABEL(r0, I14HANDLE);// IVG14 Handler 101 [ P0 ++ ] = R0; 102 103LD32_LABEL(r0, I15HANDLE);// IVG15 Handler 104 [ P0 ++ ] = R0; 105 106LD32(p0, EVT_OVERRIDE); 107 R0 = 0; 108 [ P0 ++ ] = R0; 109 110 R1 = -1; // Change this to mask interrupts (*) 111CSYNC; 112STI R1; 113 114DUMMY: 115 116 R0 = 0 (Z); 117 118LT0 = r0; // set loop counters to something deterministic 119LB0 = r0; 120LC0 = r0; 121LT1 = r0; 122LB1 = r0; 123LC1 = r0; 124 125ASTAT = r0; // reset other internal regs 126 127// The following code sets up the test for running in USER mode 128 129LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a 130 // ReturnFromInterrupt (RTI) 131RETI = r0; // We need to load the return address 132 133// Comment the following line for a USER Mode test 134 135JUMP STARTSUP; // jump to code start for SUPERVISOR mode 136 137RTI; 138 139STARTSUP: 140LD32_LABEL(p1, BEGIN); 141 142LD32(p0, EVT15); 143 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start 144 145RAISE 15; // after we RTI, INT 15 should be taken 146 147NOP; // Workaround for Bug 217 148RTI; 149 150// 151// The Main Program 152// 153 154STARTUSER: 155LD32_LABEL(sp, USTACK); // setup the stack pointer 156FP = SP; // set frame pointer 157JUMP BEGIN; 158 159//********************************************************************* 160 161BEGIN: 162CHECK_INIT_DEF(p0); //CHECK_INIT(p0, 0xFF7FFFFC); 163 164 165 // COMMENT the following line for USER MODE tests 166 [ -- SP ] = RETI; // enable interrupts in supervisor mode 167 168 // **** YOUR CODE GOES HERE **** 169 170 // PUT YOUR TEST HERE! 171 // Can't Raise 0, 3, or 4 172 173 // Raise 1 requires some intelligence so the test 174 // doesn't loop forever - use SFTRESET bit in SEQSTAT (TBD) 175RAISE 2; 176 R2.L = 0xBAD; 177CHECKREG(r2, 0); 178 179AFTER_RTN: 180EXCPT 5; 181 R2.L = 0xBAD; 182CHECKREG(r2, 0); 183 184AFTER_RTX: 185RAISE 5; 186 R2.L = 0xBAD; 187CHECKREG(r2, 0); 188 189END: 190dbg_pass; // End the test 191 192//********************************************************************* 193 194// 195// Handlers for Events 196// 197 198EHANDLE: // Emulation Handler 0 199RTE; 200 201RHANDLE: // Reset Handler 1 202RTI; 203 204NHANDLE: // NMI Handler 2 205 R1.L = AFTER_RTN; 206 R1.H = AFTER_RTN; 207 [ -- SP ] = R1; 208RETN = [ SP ++ ]; 209RTN; 210 211XHANDLE: // Exception Handler 3 212 R1.L = AFTER_RTX; 213 R1.H = AFTER_RTX; 214 [ -- SP ] = R1; 215RETX = [ SP ++ ]; 216RTX; 217 218HWHANDLE: // HW Error Handler 5 219 R1.L = END; 220 R1.H = END; 221 [ -- SP ] = R1; 222RETI = [ SP ++ ]; 223RTI; 224 225THANDLE: // Timer Handler 6 226RTI; 227 228I7HANDLE: // IVG 7 Handler 229RTI; 230 231I8HANDLE: // IVG 8 Handler 232RTI; 233 234I9HANDLE: // IVG 9 Handler 235RTI; 236 237I10HANDLE: // IVG 10 Handler 238RTI; 239 240I11HANDLE: // IVG 11 Handler 241RTI; 242 243I12HANDLE: // IVG 12 Handler 244RTI; 245 246I13HANDLE: // IVG 13 Handler 247RTI; 248 249I14HANDLE: // IVG 14 Handler 250RTI; 251 252I15HANDLE: // IVG 15 Handler 253RTI; 254 255NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug 256 257// 258// Data Segment 259// 260 261.data 262DATA: 263 .space (0x10); 264 265// Stack Segments (Both Kernel and User) 266 267 .space (STACKSIZE); 268KSTACK: 269 270 .space (STACKSIZE); 271USTACK: 272