1//Original:/proj/frio/dv/testcases/core/c_dsp32shift_rot/c_dsp32shift_rot.dsp 2// Spec Reference: dsp32shift rot 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 9 R0 = 0; 10 ASTAT = R0; 11 12 imm32 r0, 0x01230001; 13 imm32 r1, 0x12345678; 14 imm32 r2, 0x23456789; 15 imm32 r3, 0x3456789a; 16 imm32 r4, 0x456789ab; 17 imm32 r5, 0x56789abc; 18 imm32 r6, 0x6789abcd; 19 imm32 r7, 0x789abcde; 20 R1 = ROT R0 BY R0.L; 21 R2 = ROT R1 BY R0.L; 22 R3 = ROT R2 BY R0.L; 23 R4 = ROT R3 BY R0.L; 24 R5 = ROT R4 BY R0.L; 25 R6 = ROT R5 BY R0.L; 26 R7 = ROT R6 BY R0.L; 27 R0 = ROT R7 BY R0.L; 28 CHECKREG r1, 0x02460002; 29 CHECKREG r0, 0x23000100; 30 CHECKREG r2, 0x048C0004; 31 CHECKREG r3, 0x09180008; 32 CHECKREG r4, 0x12300010; 33 CHECKREG r5, 0x24600020; 34 CHECKREG r6, 0x48C00040; 35 CHECKREG r7, 0x91800080; 36 37 imm32 r0, 0x01230001; 38 imm32 r1, 0x12345678; 39 imm32 r2, 0x23456789; 40 imm32 r3, 0x3456789a; 41 imm32 r4, 0x456789ab; 42 imm32 r5, 0x56789abc; 43 imm32 r6, 0x6789abcd; 44 imm32 r7, 0x789abcde; 45 R1.L = 15; 46 R2 = ROT R0 BY R1.L; 47 R3 = ROT R1 BY R1.L; 48 R4 = ROT R2 BY R1.L; 49 R5 = ROT R3 BY R1.L; 50 R6 = ROT R4 BY R1.L; 51 R7 = ROT R5 BY R1.L; 52 R0 = ROT R6 BY R1.L; 53 R1 = ROT R7 BY R1.L; 54 CHECKREG r0, 0x2C04C400; 55 CHECKREG r1, 0x5C489000; 56 CHECKREG r2, 0x8000C048; 57 CHECKREG r3, 0x0007C48D; 58 CHECKREG r4, 0x60242000; 59 CHECKREG r5, 0xE2468001; 60 CHECKREG r6, 0x10005809; 61 CHECKREG r7, 0x4000B891; 62 63 imm32 r0, 0x01230002; 64 imm32 r1, 0x12345678; 65 imm32 r2, 0x23456789; 66 imm32 r3, 0x3456789a; 67 imm32 r4, 0x456789ab; 68 imm32 r5, 0x56789abc; 69 imm32 r6, 0x6789abcd; 70 imm32 r7, 0x789abcde; 71 R2 = 16; 72 R3 = ROT R0 BY R2.L; 73 R4 = ROT R1 BY R2.L; 74 R5 = ROT R2 BY R2.L; 75 R6 = ROT R3 BY R2.L; 76 R7 = ROT R4 BY R2.L; 77 R0 = ROT R5 BY R2.L; 78 R1 = ROT R6 BY R2.L; 79 R2 = ROT R7 BY R2.L; 80 CHECKREG r0, 0x00000008; 81 CHECKREG r1, 0x00010048; 82 CHECKREG r2, 0x2B3CC48D; 83 CHECKREG r3, 0x00020091; 84 CHECKREG r4, 0x5678891A; 85 CHECKREG r5, 0x00100000; 86 CHECKREG r6, 0x00910001; 87 CHECKREG r7, 0x891A2B3C; 88 89 imm32 r0, 0x01230003; 90 imm32 r1, 0x12345678; 91 imm32 r2, 0x23456789; 92 imm32 r3, 0x3456789a; 93 imm32 r4, 0x456789ab; 94 imm32 r5, 0x56789abc; 95 imm32 r6, 0x6789abcd; 96 imm32 r7, 0x789abcde; 97 R3.L = 31; 98 R4 = ROT R0 BY R3.L; 99 R5 = ROT R1 BY R3.L; 100 R6 = ROT R2 BY R3.L; 101 R7 = ROT R3 BY R3.L; 102 R0 = ROT R4 BY R3.L; 103 R1 = ROT R5 BY R3.L; 104 R2 = ROT R6 BY R3.L; 105 R3 = ROT R7 BY R3.L; 106 CHECKREG r0, 0x60123000; 107 CHECKREG r1, 0x11234567; 108 CHECKREG r2, 0x62345678; 109 CHECKREG r3, 0xE3456001; 110 CHECKREG r4, 0x8048C000; 111 CHECKREG r5, 0x448D159E; 112 CHECKREG r6, 0x88D159E2; 113 CHECKREG r7, 0x8D158007; 114 115 imm32 r0, 0x01230004; 116 imm32 r1, 0x12345678; 117 imm32 r2, 0x23456789; 118 imm32 r3, 0x3456789a; 119 imm32 r4, 0x456789ab; 120 imm32 r5, 0x56789abc; 121 imm32 r6, 0x6789abcd; 122 imm32 r7, 0x789abcde; 123 R4.L = -1; 124 R0 = ROT R0 BY R4.L; 125 R1 = ROT R1 BY R4.L; 126 R2 = ROT R2 BY R4.L; 127 R3 = ROT R3 BY R4.L; 128 R4 = ROT R4 BY R4.L; 129 R5 = ROT R5 BY R4.L; 130 R6 = ROT R6 BY R4.L; 131 R7 = ROT R7 BY R4.L; 132 CHECKREG r0, 0x80918002; 133 CHECKREG r1, 0x091A2B3C; 134 CHECKREG r2, 0x11A2B3C4; 135 CHECKREG r3, 0x9A2B3C4D; 136 CHECKREG r4, 0x22B3FFFF; 137 CHECKREG r5, 0xAB3C4D5E; 138 CHECKREG r6, 0x33C4D5E6; 139 CHECKREG r7, 0xBC4D5E6F; 140 141 imm32 r0, 0x01230005; 142 imm32 r1, 0x12345678; 143 imm32 r2, 0x23456789; 144 imm32 r3, 0x3456789a; 145 imm32 r4, 0x456789ab; 146 imm32 r5, 0x56789abc; 147 imm32 r6, 0x6789abcd; 148 imm32 r7, 0x789abcde; 149 R5.L = -15; 150 R6 = ROT R0 BY R5.L; 151 R7 = ROT R1 BY R5.L; 152 R0 = ROT R2 BY R5.L; 153 R1 = ROT R3 BY R5.L; 154 R2 = ROT R4 BY R5.L; 155 R3 = ROT R5 BY R5.L; 156 R4 = ROT R6 BY R5.L; 157 R5 = ROT R7 BY R5.L; 158 CHECKREG r0, 0x9E26468A; 159 CHECKREG r1, 0xE26A68AC; 160 CHECKREG r2, 0x26AE8ACF; 161 CHECKREG r3, 0xFFC4ACF1; 162 CHECKREG r4, 0x091A0028; 163 CHECKREG r5, 0x91A0B3C0; 164 CHECKREG r6, 0x00140246; 165 CHECKREG r7, 0x59E02468; 166 167 imm32 r0, 0x01230006; 168 imm32 r1, 0x12345678; 169 imm32 r2, 0x23456789; 170 imm32 r3, 0x3456789a; 171 imm32 r4, 0x456789ab; 172 imm32 r5, 0x56789abc; 173 imm32 r6, 0x6789abcd; 174 imm32 r7, 0x789abcde; 175 R6.L = -16; 176 R7 = ROT R0 BY R6.L; 177 R0 = ROT R1 BY R6.L; 178 R1 = ROT R2 BY R6.L; 179 R2 = ROT R3 BY R6.L; 180 R3 = ROT R4 BY R6.L; 181 R4 = ROT R5 BY R6.L; 182 R5 = ROT R6 BY R6.L; 183 R6 = ROT R7 BY R6.L; 184 CHECKREG r0, 0xACF01234; 185 CHECKREG r1, 0xCF122345; 186 CHECKREG r2, 0xF1343456; 187 CHECKREG r3, 0x13564567; 188 CHECKREG r4, 0x35795678; 189 CHECKREG r5, 0xFFE16789; 190 CHECKREG r6, 0x0247000C; 191 CHECKREG r7, 0x000C0123; 192 193 imm32 r0, 0x01230007; 194 imm32 r1, 0x12345678; 195 imm32 r2, 0x23456789; 196 imm32 r3, 0x3456789a; 197 imm32 r4, 0x456789ab; 198 imm32 r5, 0x56789abc; 199 imm32 r6, 0x6789abcd; 200 imm32 r7, 0x789abcde; 201 R7.L = -27; 202 R0 = ROT R0 BY R7.L; 203 R1 = ROT R1 BY R7.L; 204 R2 = ROT R2 BY R7.L; 205 R3 = ROT R3 BY R7.L; 206 R4 = ROT R4 BY R7.L; 207 R5 = ROT R5 BY R7.L; 208 R6 = ROT R6 BY R7.L; 209 R7 = ROT R7 BY R7.L; 210 CHECKREG r0, 0x48C001C0; 211 CHECKREG r1, 0x8D159E02; 212 CHECKREG r2, 0xD159E244; 213 CHECKREG r3, 0x159E2686; 214 CHECKREG r4, 0x59E26AE8; 215 CHECKREG r5, 0x9E26AF2A; 216 CHECKREG r6, 0xE26AF36C; 217 CHECKREG r7, 0x26BFF96F; 218 219 imm32 r0, 0x01230008; 220 imm32 r1, 0x12345678; 221 imm32 r2, 0x23456789; 222 imm32 r3, 0x3456789a; 223 imm32 r4, 0x456789ab; 224 imm32 r5, 0x56789abc; 225 imm32 r6, 0x6789abcd; 226 imm32 r7, 0x789abcde; 227 R0.L = 7; 228//r0 = rot (r0 by rl0); 229 R1 = ROT R1 BY R0.L; 230 R2 = ROT R2 BY R0.L; 231 R3 = ROT R3 BY R0.L; 232 R4 = ROT R4 BY R0.L; 233 R5 = ROT R5 BY R0.L; 234 R6 = ROT R6 BY R0.L; 235 R7 = ROT R7 BY R0.L; 236 CHECKREG r0, 0x01230007; 237 CHECKREG r1, 0x1A2B3C04; 238 CHECKREG r2, 0xA2B3C4C8; 239 CHECKREG r3, 0x2B3C4D4D; 240 CHECKREG r4, 0xB3C4D591; 241 CHECKREG r5, 0x3C4D5E15; 242 CHECKREG r6, 0xC4D5E6D9; 243 CHECKREG r7, 0x4D5E6F5E; 244 245 imm32 r0, 0x01230009; 246 imm32 r1, 0x12345678; 247 imm32 r2, 0x23456789; 248 imm32 r3, 0x3456789a; 249 imm32 r4, 0x456789ab; 250 imm32 r5, 0x56789abc; 251 imm32 r6, 0x6789abcd; 252 imm32 r7, 0x789abcde; 253 R1.L = 16; 254 R0 = ROT R0 BY R1.L; 255//r1 = rot (r1 by rl1); 256 R2 = ROT R2 BY R1.L; 257 R3 = ROT R3 BY R1.L; 258 R4 = ROT R4 BY R1.L; 259 R5 = ROT R5 BY R1.L; 260 R6 = ROT R6 BY R1.L; 261 R7 = ROT R7 BY R1.L; 262 CHECKREG r0, 0x00090091; 263 CHECKREG r1, 0x12340010; 264 CHECKREG r2, 0x678991A2; 265 CHECKREG r3, 0x789A9A2B; 266 CHECKREG r4, 0x89AB22B3; 267 CHECKREG r5, 0x9ABCAB3C; 268 CHECKREG r6, 0xABCD33C4; 269 CHECKREG r7, 0xBCDEBC4D; 270 271 imm32 r0, 0x0123000a; 272 imm32 r1, 0x12345678; 273 imm32 r2, 0x23456789; 274 imm32 r3, 0x3456789a; 275 imm32 r4, 0x456789ab; 276 imm32 r5, 0x56789abc; 277 imm32 r6, 0x6789abcd; 278 imm32 r7, 0x789abcde; 279 R2.L = 30; 280 R0 = ROT R0 BY R2.L; 281 R1 = ROT R1 BY R2.L; 282//r2 = rot (r2 by rl2); 283 R3 = ROT R3 BY R2.L; 284 R4 = ROT R4 BY R2.L; 285 R5 = ROT R5 BY R2.L; 286 R6 = ROT R6 BY R2.L; 287 R7 = ROT R7 BY R2.L; 288 CHECKREG r0, 0x80246001; 289 CHECKREG r1, 0x02468ACF; 290 CHECKREG r2, 0x2345001E; 291 CHECKREG r3, 0x868ACF13; 292 CHECKREG r4, 0xC8ACF135; 293 CHECKREG r5, 0x0ACF1357; 294 CHECKREG r6, 0x6CF13579; 295 CHECKREG r7, 0xAF13579B; 296 297 imm32 r0, 0x0123000b; 298 imm32 r1, 0x12345678; 299 imm32 r2, 0x23456789; 300 imm32 r3, 0x3456789a; 301 imm32 r4, 0x456789ab; 302 imm32 r5, 0x56789abc; 303 imm32 r6, 0x6789abcd; 304 imm32 r7, 0x789abcde; 305 R3.L = 31; 306 R0 = ROT R0 BY R3.L; 307 R1 = ROT R1 BY R3.L; 308 R2 = ROT R2 BY R3.L; 309//r3 = rot (r3 by rl3); 310 R4 = ROT R4 BY R3.L; 311 R5 = ROT R5 BY R3.L; 312 R6 = ROT R6 BY R3.L; 313 R7 = ROT R7 BY R3.L; 314 CHECKREG r0, 0xC048C002; 315 CHECKREG r1, 0x448D159E; 316 CHECKREG r2, 0x88D159E2; 317 CHECKREG r3, 0x3456001F; 318 CHECKREG r4, 0x9159E26A; 319 CHECKREG r5, 0x559E26AF; 320 CHECKREG r6, 0x99E26AF3; 321 CHECKREG r7, 0x1E26AF37; 322 323 imm32 r0, 0x0123000c; 324 imm32 r1, 0x12345678; 325 imm32 r2, 0x23456789; 326 imm32 r3, 0x3456789a; 327 imm32 r4, 0x456789ab; 328 imm32 r5, 0x56789abc; 329 imm32 r6, 0x6789abcd; 330 imm32 r7, 0x789abcde; 331 R4.L = -2; 332 R0 = ROT R0 BY R4.L; 333 R1 = ROT R1 BY R4.L; 334 R2 = ROT R2 BY R4.L; 335 R3 = ROT R3 BY R4.L; 336//r4 = rot (r4 by rl4); 337 R5 = ROT R5 BY R4.L; 338 R6 = ROT R6 BY R4.L; 339 R7 = ROT R7 BY R4.L; 340 CHECKREG r0, 0x4048C003; 341 CHECKREG r1, 0x048D159E; 342 CHECKREG r2, 0x88D159E2; 343 CHECKREG r3, 0x0D159E26; 344 CHECKREG r4, 0x4567FFFE; 345 CHECKREG r5, 0x559E26AF; 346 CHECKREG r6, 0x99E26AF3; 347 CHECKREG r7, 0x1E26AF37; 348 349 imm32 r0, 0x0123000d; 350 imm32 r1, 0x12345678; 351 imm32 r2, 0x23456789; 352 imm32 r3, 0x3456789a; 353 imm32 r4, 0x456789ab; 354 imm32 r5, 0x56789abc; 355 imm32 r6, 0x6789abcd; 356 imm32 r7, 0x789abcde; 357 R5.L = -17; 358 R0 = ROT R0 BY R5.L; 359 R1 = ROT R1 BY R5.L; 360 R2 = ROT R2 BY R5.L; 361 R3 = ROT R3 BY R5.L; 362 R4 = ROT R4 BY R5.L; 363//r5 = rot (r5 by rl5); 364 R6 = ROT R6 BY R5.L; 365 R7 = ROT R7 BY R5.L; 366 CHECKREG r0, 0x000D8091; 367 CHECKREG r1, 0x5678891A; 368 CHECKREG r2, 0x678911A2; 369 CHECKREG r3, 0x789A9A2B; 370 CHECKREG r4, 0x89AB22B3; 371 CHECKREG r5, 0x5678FFEF; 372 CHECKREG r6, 0xABCDB3C4; 373 CHECKREG r7, 0xBCDEBC4D; 374 375 imm32 r0, 0x0123000e; 376 imm32 r1, 0x12345678; 377 imm32 r2, 0x23456789; 378 imm32 r3, 0x3456789a; 379 imm32 r4, 0x456789ab; 380 imm32 r5, 0x56789abc; 381 imm32 r6, 0x6789abcd; 382 imm32 r7, 0x789abcde; 383 R6.L = -30; 384 R0 = ROT R0 BY R6.L; 385 R1 = ROT R1 BY R6.L; 386 R2 = ROT R2 BY R6.L; 387 R3 = ROT R3 BY R6.L; 388 R4 = ROT R4 BY R6.L; 389 R5 = ROT R5 BY R6.L; 390//r6 = rot (r6 by rl6); 391 R7 = ROT R7 BY R6.L; 392 CHECKREG r0, 0x09180070; 393 CHECKREG r1, 0x91A2B3C0; 394 CHECKREG r2, 0x1A2B3C48; 395 CHECKREG r3, 0xA2B3C4D4; 396 CHECKREG r4, 0x2B3C4D5D; 397 CHECKREG r5, 0xB3C4D5E1; 398 CHECKREG r6, 0x6789FFE2; 399 CHECKREG r7, 0xC4D5E6F1; 400 401 imm32 r0, 0x0123000f; 402 imm32 r1, 0x12345678; 403 imm32 r2, 0x23456789; 404 imm32 r3, 0x3456789a; 405 imm32 r4, 0x456789ab; 406 imm32 r5, 0x56789abc; 407 imm32 r6, 0x6789abcd; 408 imm32 r7, 0x789abcde; 409 R7.L = -31; 410 R0 = ROT R0 BY R7.L; 411 R1 = ROT R1 BY R7.L; 412 R2 = ROT R2 BY R7.L; 413 R3 = ROT R3 BY R7.L; 414 R4 = ROT R4 BY R7.L; 415 R5 = ROT R5 BY R7.L; 416 R6 = ROT R6 BY R7.L; 417 R7 = ROT R7 BY R7.L; 418 CHECKREG r0, 0x048C003E; 419 CHECKREG r1, 0x48D159E0; 420 CHECKREG r2, 0x8D159E24; 421 CHECKREG r3, 0xD159E268; 422 CHECKREG r4, 0x159E26AC; 423 CHECKREG r5, 0x59E26AF2; 424 CHECKREG r6, 0x9E26AF36; 425 CHECKREG r7, 0xE26BFF86; 426 427 pass 428