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..22-Mar-202344

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aclocal.m4H A D12-Oct-20160

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altivec_expression.hH A D22-Mar-20231.5 KiB

altivec_registers.hH A D22-Mar-20232 KiB

basics.hH A D12-Oct-20162.9 KiB

bits.cH A D12-Oct-20162.5 KiB

bits.hH A D12-Oct-20167.6 KiB

BUGSH A D12-Oct-20162.4 KiB

cap.cH A D12-Oct-20163.1 KiB

cap.hH A D12-Oct-20161.3 KiB

ChangeLogH A D22-Mar-2023149.1 KiB

ChangeLog.00H A D12-Oct-201679.8 KiB

config.inH A D14-Sep-20209.5 KiB

configureH A D14-Sep-2020254.6 KiB

configure.acH A D14-Sep-202027.9 KiB

COPYINGH A D12-Oct-201634.3 KiB

COPYING.LIBH A D12-Oct-201624.7 KiB

corefile-n.hH A D12-Oct-20162.7 KiB

corefile.cH A D12-Oct-20169.4 KiB

corefile.hH A D12-Oct-20166 KiB

cpu.cH A D12-Oct-20168 KiB

cpu.hH A D27-May-20195.4 KiB

dc-complexH A D12-Oct-20162.1 KiB

dc-simpleH A D12-Oct-2016935

dc-stupidH A D12-Oct-20162.1 KiB

dc-test.01H A D12-Oct-20161 KiB

dc-test.02H A D12-Oct-20161 KiB

debug.cH A D12-Oct-20165 KiB

debug.hH A D19-Jan-20184 KiB

device.cH A D12-Oct-201648.6 KiB

device.hH A D12-Oct-201617.1 KiB

device_table.cH A D12-Oct-20167.3 KiB

device_table.hH A D12-Oct-20168.3 KiB

dgen.cH A D12-Oct-20168.5 KiB

double.cH A D12-Oct-20161.1 KiB

dp-bit.cH A D22-Mar-202327.1 KiB

e500.igenH A D22-Mar-2023109.2 KiB

e500_expression.hH A D22-Mar-20235.4 KiB

e500_registers.hH A D22-Mar-20233.1 KiB

emul_bugapi.cH A D27-May-201918.7 KiB

emul_bugapi.hH A D12-Oct-2016867

emul_chirp.cH A D12-Oct-201656.4 KiB

emul_chirp.hH A D12-Oct-20162.8 KiB

emul_generic.cH A D22-Mar-20238.6 KiB

emul_generic.hH A D27-May-20194 KiB

emul_netbsd.cH A D22-Mar-202346.5 KiB

emul_netbsd.hH A D12-Oct-2016867

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emul_unix.hH A D12-Oct-2016892

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events.hH A D12-Oct-20161.8 KiB

filter.cH A D12-Oct-20163 KiB

filter.hH A D12-Oct-20161.2 KiB

filter_filename.cH A D12-Oct-20161.1 KiB

filter_filename.hH A D12-Oct-2016938

gdb-sim.cH A D22-Mar-202366.8 KiB

gen-icache.cH A D12-Oct-201618.8 KiB

gen-icache.hH A D12-Oct-20161.8 KiB

gen-idecode.cH A D12-Oct-201645.7 KiB

gen-idecode.hH A D12-Oct-20161.2 KiB

gen-itable.cH A D12-Oct-20163.4 KiB

gen-itable.hH A D12-Oct-2016891

gen-model.cH A D12-Oct-201612.1 KiB

gen-model.hH A D12-Oct-2016891

gen-semantics.cH A D12-Oct-20166.8 KiB

gen-semantics.hH A D12-Oct-20162.5 KiB

gen-support.cH A D12-Oct-20163.7 KiB

gen-support.hH A D12-Oct-2016894

hw_com.cH A D12-Oct-201614.2 KiB

hw_core.cH A D12-Oct-20163.4 KiB

hw_cpu.cH A D12-Oct-20164.3 KiB

hw_cpu.hH A D12-Oct-20161,021

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hw_eeprom.cH A D12-Oct-201621.8 KiB

hw_glue.cH A D12-Oct-201610.7 KiB

hw_htab.cH A D22-Mar-202320.5 KiB

hw_ide.cH A D12-Oct-201624.3 KiB

hw_init.cH A D22-Mar-202319.8 KiB

hw_iobus.cH A D12-Oct-20162.5 KiB

hw_memory.cH A D14-Sep-202015.5 KiB

hw_nvram.cH A D12-Oct-20166.7 KiB

hw_opic.cH A D12-Oct-201653 KiB

hw_pal.cH A D12-Oct-20169.2 KiB

hw_phb.cH A D12-Oct-201628.9 KiB

hw_phb.hH A D12-Oct-20161.1 KiB

hw_register.cH A D12-Oct-20163.5 KiB

hw_sem.cH A D12-Oct-20166.7 KiB

hw_shm.cH A D12-Oct-20165.8 KiB

hw_trace.cH A D12-Oct-20162.6 KiB

hw_vm.cH A D12-Oct-20167.2 KiB

idecode_branch.hH A D12-Oct-20161.8 KiB

idecode_expression.hH A D12-Oct-201610.2 KiB

idecode_fields.hH A D12-Oct-20162.8 KiB

igen.cH A D12-Oct-201615.2 KiB

igen.hH A D12-Oct-20165.1 KiB

inline.cH A D12-Oct-20162 KiB

inline.hH A D19-Jan-201813.5 KiB

INSTALLH A D19-Jan-201819.9 KiB

interrupts.cH A D12-Oct-201615.1 KiB

interrupts.hH A D12-Oct-20165 KiB

ld-cache.cH A D12-Oct-20163.1 KiB

ld-cache.hH A D12-Oct-20162.5 KiB

ld-decode.cH A D12-Oct-20164.4 KiB

ld-decode.hH A D12-Oct-20164.1 KiB

ld-insn.cH A D22-Mar-202326.9 KiB

ld-insn.hH A D22-Mar-20235.3 KiB

lf.cH A D12-Oct-20168.9 KiB

lf.hH A D12-Oct-20162.5 KiB

main.cH A D19-Jan-20186.6 KiB

Makefile.inH A D22-Mar-202323.3 KiB

misc.cH A D12-Oct-20163.7 KiB

misc.hH A D12-Oct-20162.1 KiB

mon.cH A D12-Oct-201611.6 KiB

mon.hH A D12-Oct-20162.2 KiB

options.cH A D27-May-20197.4 KiB

options.hH A D12-Oct-2016937

os_emul.cH A D12-Oct-20163.7 KiB

os_emul.hH A D12-Oct-20161.7 KiB

pk_disklabel.cH A D12-Oct-201611 KiB

ppc-instructionsH A D14-Sep-2020172 KiB

ppc-spr-tableH A D12-Oct-20161.7 KiB

ppc.mtH A D12-Oct-201651

psim.cH A D19-Jan-201832.5 KiB

psim.hH A D19-Jan-20183.8 KiB

psim.texinfoH A D22-Mar-202341.2 KiB

READMEH A D12-Oct-20169.3 KiB

registers.cH A D12-Oct-20165 KiB

registers.hH A D12-Oct-20168.1 KiB

RUNH A D12-Oct-201627.7 KiB

sim-endian-n.hH A D12-Oct-20162.6 KiB

sim-endian.cH A D12-Oct-20161.8 KiB

sim-endian.hH A D19-Jan-201810.5 KiB

sim-main.hH A D12-Oct-2016146

sim_callbacks.hH A D12-Oct-20162.7 KiB

sim_calls.cH A D27-May-20198.9 KiB

std-config.hH A D19-Jan-201817.1 KiB

table.cH A D12-Oct-20167.6 KiB

table.hH A D12-Oct-20162 KiB

tree.cH A D12-Oct-201631.5 KiB

tree.hH A D12-Oct-20163.3 KiB

vm.cH A D12-Oct-201631.4 KiB

vm.hH A D12-Oct-20163.3 KiB

vm_n.hH A D12-Oct-20164.2 KiB

words.hH A D12-Oct-20163 KiB

README

1
2
3		PSIM 1.0.1 - Model of the PowerPC Environments
4
5
6    Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>.
7
8    This program is free software; you can redistribute it and/or modify
9    it under the terms of the GNU General Public License as published by
10    the Free Software Foundation; either version 3 of the License, or
11    (at your option) any later version.
12
13    This program is distributed in the hope that it will be useful,
14    but WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16    GNU General Public License for more details.
17 
18    You should have received a copy of the GNU General Public License
19    along with this program; if not, see <http://www.gnu.org/licenses/>.
20 
21
22    ----------------------------------------------------------------------
23
24
25PSIM is a program written in extended ANSI-C that implements an
26instruction level simulation of the PowerPC environment.  It is freely
27available in source code form under the terms of the GNU General
28Public License (version 3 or later).
29
30The PowerPC Architecture is described as having three levels of
31compliance:
32
33	UEA - User Environment Architecture
34	VEA - Virtual Environment Architecture
35	OEA - Operating Environment Architecture
36
37PSIM both implements all three levels of the PowerPC and includes (for
38each level) a corresponding simulated run-time environment.
39
40In addition, PSIM, to the execution unit level, models the performance
41of most of the current PowerPC implementations (contributed by Michael
42Meissner).  This detailed performance monitoring (unlike many other
43simulators) resulting in only a relatively marginal reduction in the
44simulators performance.
45
46
47A description of how to build PSIM is contained in the file:
48
49		ftp://ftp.ci.com.au/pub/psim/INSTALL
50	or	ftp://cambridge.cygnus.com/pub/psim/INSTALL
51
52while an overview of how to use PSIM is in:
53
54	ftp://ftp.ci.com.au/pub/psim/RUN
55or	ftp://cambridge.cygnus.com/pub/psim/RUN
56
57This file is found in:
58
59	ftp://ftp.ci.com.au/pub/psim/README
60or	ftp://cambridge.cygnus.com/pub/psim/README
61
62
63Thanks goes firstly to:
64
65	Corinthian Engineering Pty Ltd
66	Cygnus Support
67	Highland Logic Pty Ltd
68
69who provided the resources needed for making this software available
70on the Internet.
71
72More importantly I'd like to thank the following individuals who each
73contributed in their own unique way:
74
75	Allen Briggs, Bett Koch, David Edelsohn, Gordon Irlam,
76	Michael Meissner, Bob Mercier, Richard Perini, Dale Rahn,
77	Richard Stallman, Mitchele Walker
78
79
80				Andrew Cagney
81				Feb, 1995
82
83
84    ----------------------------------------------------------------------
85
86
87    What features does PSIM include?
88
89	Monitoring and modeling
90
91		PSIM includes (thanks to Michael Meissner)
92		a detailed model of most of the PowerPC
93		implementations to the functional unit level.
94
95
96	SMP
97		
98		The PowerPC ISA defines SMP synchronizing instructions.
99		This simulator implements a limited, but functional,
100		subset of the PowerPC synchronization instructions
101		behaviour.  Programs that restrict their synchronization
102		primitives to those that work with this functional
103		sub-set (eg P() and V()) are able to run on the SMP
104		version of PSIM.
105
106		People intending to use this system should study
107		the code implementing the lwarx instruction.
108		
109	ENDIAN SUPPORT
110
111		PSIM implements the PowerPC's big and little (xor
112		endian) modes and correctly simulates code that
113		switches between these two modes.
114
115		In addition, psim can model a true little-endian
116		machine.
117
118	ISA (Instruction Set Architecture) models
119
120		PSIM includes a model of the UEA, VEA and OEA.  This
121		includes the time base registers (VEA) and HTAB
122		and BATS (OEA).
123
124		In addition, a preliminary model of the 64 bit
125		PowerPC architecture is implemented.
126
127	IO Hardware
128
129		PSIM's internals are based around the concept
130		of a Device Tree.  This tree intentionally
131		resembles that of the Device Tree found in
132		OpenBoot firmware.  PSIM is flexible enough
133		to allow the user to fully configure this device
134		tree (and consequently the hardware model) at
135		run time.
136
137	Run-time environments:
138
139		PSIM's UEA model includes emulation for BSD
140		based UNIX system calls.
141
142		PSIM's OEA model includes emulation of either:
143
144			o	OpenBoot client interface
145
146			o	MOTO's BUG interface.
147
148
149	Floating point
150
151		Preliminary support for floating point is included.
152
153
154    Who would be interested in PSIM?
155
156	o	the curious
157
158		Using psim, gdb, gcc and binutils the curious
159		user can construct an environment that allows
160		them to play with PowerPC Environment without
161		the need for real hardware.
162
163
164	o	the analyst
165
166		PSIM includes many (contributed) monitoring
167		features which (unlike many other simulators)
168		do not come with a great penalty in performance.
169
170		Thus the performance analyst is able to use
171		this simulator to analyse the performance of
172		the system under test.
173
174		If PSIM doesn't monitor a components of interest,
175		the source code is freely available, and hence
176		there is no hinderance to changing things
177		to meet a specific analysts needs.
178
179
180	o	the serious SW developer
181
182		PSIM models all three levels of the PowerPC
183		Architecture: UEA, VEA and OEA.  Further,
184		the internal design is such that PSIM can
185		be extended to support additional requirements.
186
187
188    What performance analysis measurements can PSIM perform?
189
190	Below is the output from a recent analysis run
191	(contributed by Michael Meissner):
192
193	For the following program:
194
195	long
196	simple_rand ()
197	{
198	  static unsigned long seed = 47114711;
199	  unsigned long this = seed * 1103515245 + 12345;
200	  seed = this;
201	/* cut-cut-cut - see the file RUN.psim */
202	}
203
204	Here is the current output generated with the -I switch on a P90
205	(the compiler used is the development version of GCC with a new
206	scheduler replacing the old one):
207	
208	CPU #1 executed     41,994 AND instructions.
209	CPU #1 executed    519,785 AND Immediate instructions.
210	.
211	.
212	.
213	CPU #1 executed          1 System Call instruction.
214	CPU #1 executed    207,746 XOR instructions.
215	
216	CPU #1 executed 23,740,856 cycles.
217	CPU #1 executed 10,242,780 stalls waiting for data.
218	CPU #1 executed          1 stall waiting for a function unit.
219	.
220	.
221	.
222	CPU #1 executed  3,136,229 branch functional unit instructions.
223	CPU #1 executed 16,949,396 instructions that were accounted for in timing info.
224	CPU #1 executed    871,920 data reads.
225	CPU #1 executed    971,926 data writes.
226	CPU #1 executed        221 icache misses.
227	CPU #1 executed 16,949,396 instructions in total.
228	
229	Simulator speed was 250,731 instructions/second
230
231
232    What motivated PSIM?
233
234	As an idea, psim was first discussed seriously during mid
235	1994.  At that time its main objectives were:
236
237
238		o	good performance
239
240			Many simulators loose out by only providing
241			a binary interface to the internals.  This
242			interface eventually becomes a bottle neck
243			in the simulators performance.
244
245			It was intended that PSIM would avoid this
246			problem by giving the user access to the
247			full source code.
248
249			Further, by exploiting the power of modern
250			compilers it was hoped that PSIM would achieve
251			good performance with out having to compromise
252			its internal design.
253
254
255		o	practical portability
256
257			Rather than try to be portable to every
258			C compiler on every platform, it was decided
259			that PSIM would restrict its self to supporting
260			ANSI compilers that included the extension
261			of a long long type.
262
263			GCC is one such compiler, consequently PSIM
264			should be portable to any machine running GCC.
265
266
267		o	flexibility in its design
268
269			PSIM should allow the user to select the
270			features required and customise the build
271			accordingly.  By having the source code,
272			the compiler is able to eliminate any un
273			used features of the simulator.
274
275			After all, let the compiler do the work.
276
277
278		o	SMP
279
280			A model that allowed the simulation of
281			SMP platforms with out the large overhead
282			often encountered with such models.
283
284
285	PSIM achieves each of these objectives.
286
287
288    Is PSIM PowerPC Platform (PPCP) (nee CHRP) Compliant?
289
290	No.
291
292	Among other things it does not have an Apple ROM socket.
293
294
295    Could PSIM be extended so that it models a CHRP machine?
296
297	Yes.
298
299	PSIM has been designed with the CHRP spec in mind. To model
300	a CHRP desktop the following would need to be added:
301
302		o	An apple ROM socket :-)
303
304		o	Model of each of the desktop IO devices
305
306		o	An OpenPIC device.
307
308		o	RTAS (Run Time Abstraction Services).
309
310		o	A fully populated device tree.
311
312
313    Is the source code available?
314
315	Yes.
316
317	The source code to PSIM is available under the terms of
318	the GNU Public Licence.  This allows you to distribute
319	the source code for free but with certain conditions.
320
321	See the file:
322
323		ftp://archie.au/gnu/COPYING
324
325	For details of the terms and conditions.
326
327
328    Where do I send bugs or report problems?
329
330	There is a mailing list (subscribe through majordomo@ci.com.au) at:
331
332	powerpc-psim@ci.com.au
333
334	If I get the ftp archive updated I post a note to that mailing list.
335	In addition your welcome to send bugs or problems either to me or to
336	that e-mail list.
337
338	This list currently averages zero articles a day.
339
340
341     Does PSIM have any limitations or problems?
342
343	PSIM can't run rs6000/AIX binaries - At present PSIM can only
344	simulate static executables.  Since an AIX executable is
345	never static, PSIM is unable to simulate its execution.
346
347	PSIM is still under development - consequently there are going
348	to be bugs.
349
350	See the file BUGS (included in the distribution) for any
351	other outstanding issues.
352
353