1/* Cache support for the FRV simulator
2   Copyright (C) 1999-2020 Free Software Foundation, Inc.
3   Contributed by Red Hat.
4
5This file is part of the GNU Simulators.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 3 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
20#ifndef CACHE_H
21#define CACHE_H
22
23/* A representation of a set-associative cache with LRU replacement,
24   cache line locking, non-blocking support and multiple read ports.  */
25
26/* An enumeration of cache pipeline request kinds.  */
27typedef enum
28{
29  req_load,
30  req_store,
31  req_invalidate,
32  req_flush,
33  req_preload,
34  req_unlock,
35  req_WAR
36} FRV_CACHE_REQUEST_KIND;
37
38/* The cache pipeline requests.  */
39typedef struct {
40  int preload;
41  int lock;
42} FRV_CACHE_WAR_REQUEST;
43
44typedef struct {
45  char *data;
46  int length;
47} FRV_CACHE_STORE_REQUEST;
48
49typedef struct {
50  int flush;
51  int all;
52} FRV_CACHE_INVALIDATE_REQUEST;
53
54typedef struct {
55  int lock;
56  int length;
57} FRV_CACHE_PRELOAD_REQUEST;
58
59/* A cache pipeline request.  */
60typedef struct frv_cache_request
61{
62  struct frv_cache_request *next;
63  struct frv_cache_request *prev;
64  FRV_CACHE_REQUEST_KIND kind;
65  unsigned reqno;
66  unsigned priority;
67  SI address;
68  union {
69    FRV_CACHE_STORE_REQUEST store;
70    FRV_CACHE_INVALIDATE_REQUEST invalidate;
71    FRV_CACHE_PRELOAD_REQUEST preload;
72    FRV_CACHE_WAR_REQUEST WAR;
73  } u;
74} FRV_CACHE_REQUEST;
75
76/* The buffer for returning data to the caller.  */
77typedef struct {
78  unsigned reqno;
79  SI address;
80  char *data;
81  int valid;
82} FRV_CACHE_RETURN_BUFFER;
83
84/* The status of flush requests.  */
85typedef struct {
86  unsigned reqno;
87  SI address;
88  int valid;
89} FRV_CACHE_FLUSH_STATUS;
90
91/* Communicate status of requests to the caller.  */
92typedef struct {
93  FRV_CACHE_FLUSH_STATUS  flush;
94  FRV_CACHE_RETURN_BUFFER return_buffer;
95} FRV_CACHE_STATUS;
96
97/* A cache pipeline stage.  */
98typedef struct {
99  FRV_CACHE_REQUEST *request;
100} FRV_CACHE_STAGE;
101
102enum {
103  FIRST_STAGE,
104  A_STAGE = FIRST_STAGE, /* Addressing stage */
105  I_STAGE,               /* Interference stage */
106  LAST_STAGE = I_STAGE,
107  FRV_CACHE_STAGES
108};
109
110/* Representation of the WAR register.  */
111typedef struct {
112  unsigned reqno;
113  unsigned priority;
114  SI address;
115  int preload;
116  int lock;
117  int latency;
118  int valid;
119} FRV_CACHE_WAR;
120
121/* A cache pipeline.  */
122#define NUM_WARS 2
123typedef struct {
124  FRV_CACHE_REQUEST      *requests;
125  FRV_CACHE_STAGE         stages[FRV_CACHE_STAGES];
126  FRV_CACHE_WAR           WAR[NUM_WARS];
127  FRV_CACHE_STATUS        status;
128} FRV_CACHE_PIPELINE;
129
130enum {LS, LD, FRV_CACHE_PIPELINES};
131
132/* Representation of the xARS registers.  */
133typedef struct {
134  int pipe;
135  unsigned reqno;
136  unsigned priority;
137  SI address;
138  int preload;
139  int lock;
140  int valid;
141} FRV_CACHE_ARS;
142
143/* A cache tag.  */
144typedef struct {
145  USI   tag;    /* Address tag.  */
146  int   lru;    /* Lower values indicates less recently used.  */
147  char *line;   /* Points to storage for line in data_storage.  */
148  char  dirty;  /* line has been written to since last stored?  */
149  char  locked; /* line is locked?  */
150  char  valid;  /* tag is valid?  */
151} FRV_CACHE_TAG;
152
153/* Cache statistics.  */
154typedef struct {
155  unsigned long accesses;   /* number of cache accesses.  */
156  unsigned long hits;       /* number of cache hits.  */
157} FRV_CACHE_STATISTICS;
158
159/* The cache itself.
160   Notes:
161   - line_size must be a power of 2
162   - sets must be a power of 2
163   - ways must be a power of 2
164*/
165typedef struct {
166  SIM_CPU *cpu;
167  unsigned configured_ways;   /* Number of ways configured in each set.  */
168  unsigned configured_sets;   /* Number of sets configured in the cache.  */
169  unsigned ways;              /* Number of ways in each set.  */
170  unsigned sets;              /* Number of sets in the cache.  */
171  unsigned line_size;         /* Size of each cache line.  */
172  unsigned memory_latency;    /* Latency of main memory in cycles.  */
173  FRV_CACHE_TAG *tag_storage; /* Storage for tags.  */
174  char *data_storage;         /* Storage for data (cache lines).  */
175  FRV_CACHE_PIPELINE pipeline[2];  /* Cache pipelines.  */
176  FRV_CACHE_ARS BARS;         /* BARS register.  */
177  FRV_CACHE_ARS NARS;         /* BARS register.  */
178  FRV_CACHE_STATISTICS statistics; /* Operation statistics.  */
179} FRV_CACHE;
180
181/* The tags are stored by ways within sets in order to make computations
182   easier.  */
183#define CACHE_TAG(cache, set, way) ( \
184  & ((cache)->tag_storage[(set) * (cache)->ways + (way)]) \
185)
186
187/* Compute the address tag corresponding to the given address.  */
188#define CACHE_ADDRESS_TAG(cache, address) ( \
189  (address) & ~(((cache)->line_size * (cache)->sets) - 1) \
190)
191
192/* Determine the index at which the set containing this tag starts.  */
193#define CACHE_TAG_SET_START(cache, tag) ( \
194  ((tag) - (cache)->tag_storage) & ~((cache)->ways - 1) \
195)
196
197/* Determine the number of the set which this cache tag is in.  */
198#define CACHE_TAG_SET_NUMBER(cache, tag) ( \
199  CACHE_TAG_SET_START ((cache), (tag)) / (cache)->ways \
200)
201
202#define CACHE_RETURN_DATA(cache, slot, address, mode, N) (               \
203  T2H_##N (*(mode *)(& (cache)->pipeline[slot].status.return_buffer.data \
204		     [((address) & ((cache)->line_size - 1))]))          \
205)
206#define CACHE_RETURN_DATA_ADDRESS(cache, slot, address, N) (              \
207  ((void *)& (cache)->pipeline[slot].status.return_buffer.data[(address)  \
208			                       & ((cache)->line_size - 1)]) \
209)
210
211#define DATA_CROSSES_CACHE_LINE(cache, address, size) ( \
212  ((address) & ((cache)->line_size - 1)) + (size) > (cache)->line_size \
213)
214
215#define CACHE_INITIALIZED(cache) ((cache)->data_storage != NULL)
216
217/* These functions are used to initialize and terminate a cache.  */
218void
219frv_cache_init (SIM_CPU *, FRV_CACHE *);
220void
221frv_cache_term (FRV_CACHE *);
222void
223frv_cache_reconfigure (SIM_CPU *, FRV_CACHE *);
224int
225frv_cache_enabled (FRV_CACHE *);
226
227/* These functions are used to operate the cache in non-cycle-accurate mode.
228   Each request is handled individually and immediately using the current
229   cache internal state.  */
230int
231frv_cache_read (FRV_CACHE *, int, SI);
232int
233frv_cache_write (FRV_CACHE *, SI, char *, unsigned);
234int
235frv_cache_preload (FRV_CACHE *, SI, USI, int);
236int
237frv_cache_invalidate (FRV_CACHE *, SI, int);
238int
239frv_cache_invalidate_all (FRV_CACHE *, int);
240
241/* These functions are used to operate the cache in cycle-accurate mode.
242   The internal operation of the cache is simulated down to the cycle level.  */
243#define NO_REQNO 0xffffffff
244void
245frv_cache_request_load (FRV_CACHE *, unsigned, SI, int);
246void
247frv_cache_request_store (FRV_CACHE *, SI, int, char *, unsigned);
248void
249frv_cache_request_invalidate (FRV_CACHE *, unsigned, SI, int, int, int);
250void
251frv_cache_request_preload (FRV_CACHE *, SI, int, int, int);
252void
253frv_cache_request_unlock (FRV_CACHE *, SI, int);
254
255void
256frv_cache_run (FRV_CACHE *, int);
257
258int
259frv_cache_data_in_buffer (FRV_CACHE*, int, SI, unsigned);
260int
261frv_cache_data_flushed (FRV_CACHE*, int, SI, unsigned);
262
263int
264frv_cache_read_passive_SI (FRV_CACHE *, SI, SI *);
265
266#endif /* CACHE_H */
267