1/*
2 * test relax
3 * lw <-> lwp!  : rs = r2, offset & 0x3 == 0, offset >> 2 : 5b
4 * lh <-> lhp!  : rs = r2, offset & 0x1 == 0, offset >> 1 : 5b
5 * lbu <-> lbu! : rs = r2, offset != 0, offset : 5b
6 * sw <-> swp!  : rs = r2, offset & 0x3 == 0, offset >> 2 : 5b
7 * sh <-> shp!  : rs = r2, offset & 0x1 == 0, offset >> 1 : 5b
8 * sb <-> sb!   : rs = r2, offset != 0, offset : 5b
9
10 * Author: ligang
11 */
12
13/* This macro transform 32b instruction to 16b. */
14.macro tran3216 insn32, insn16, shift
15.align 4
16
17  \insn32 r3, [r2, 0x4 << \shift]     #32b -> 16b
18  \insn16 r3, 0x4 << \shift
19
20  \insn32 r4, [r2, 0xC << \shift]      #32b -> 16b
21  \insn16 r4, 0xC << \shift
22
23  \insn32 r7, [r2, 0x12 << \shift]     #32b -> 16b
24  \insn32 r7, [r2, 0x12 << \shift]     #32b -> 16b
25
26  \insn16 r8, 0x8 << \shift
27  \insn32 r8, [r2, 0x8 << \shift]      #32b -> 16b
28
29  \insn32 r5, [r2, 0x20 << \shift]     #No transform
30  \insn32 r5, [r2, 0x20 << \shift]     #No transform
31
32  \insn32 r6, [r6, 0x8 << \shift]      #No transform
33  \insn32 r6, [r6, 0x8 << \shift]      #No transform
34
35.endm
36
37/* This macro transform 16b instruction to 32b. */
38.macro tran1632 insn32, insn16, shift
39.align 4
40
41  \insn16 r0, 0xC                      #16b -> 32b
42  \insn32 r0, [r5, 0xFF]
43
44  \insn16 r15, 0x0                     #16b -> 32b
45  \insn32 r15, [r4, 0xFF]
46
47  \insn16 r4, 0x8                      #No transform
48  \insn16 r4, 0x8                      #No transform
49
50  \insn16 r7, 0x8                      #No transform
51  \insn32 r7, [r2, 0x8 << \shift]
52
53.endm
54
55  tran3216 "lw", "lwp!", 2
56  tran3216 "lh", "lhp!", 1
57  tran3216 "lbu", "lbup!", 0
58  tran3216 "sw", "swp!", 2
59  tran3216 "sh", "shp!", 1
60  tran3216 "sb", "sbp!", 0
61
62  tran1632 "lw", "lwp!", 2
63  tran1632 "lh", "lhp!", 1
64  tran1632 "lbu", "lbup!", 0
65  tran1632 "sw", "swp!", 2
66  tran1632 "sh", "shp!", 1
67  tran1632 "sb", "sbp!", 0
68
69