1#objdump: -dr --prefix-addresses --show-raw-insn
2#name: MIPS MIPSR6 instructions
3#as: -32
4
5# Check MIPSR6 instructions
6
7.*: +file format .*mips.*
8
9Disassembly of section .text:
100+0000 <[^>]*> 46020818 	maddf.s	\$f0,\$f1,\$f2
110+0004 <[^>]*> 462520d8 	maddf.d	\$f3,\$f4,\$f5
120+0008 <[^>]*> 46083999 	msubf.s	\$f6,\$f7,\$f8
130+000c <[^>]*> 462b5259 	msubf.d	\$f9,\$f10,\$f11
140+0010 <[^>]*> 46820800 	cmp.af.s	\$f0,\$f1,\$f2
150+0014 <[^>]*> 46a20800 	cmp.af.d	\$f0,\$f1,\$f2
160+0018 <[^>]*> 46820801 	cmp.un.s	\$f0,\$f1,\$f2
170+001c <[^>]*> 46a20801 	cmp.un.d	\$f0,\$f1,\$f2
180+0020 <[^>]*> 46820802 	cmp.eq.s	\$f0,\$f1,\$f2
190+0024 <[^>]*> 46a20802 	cmp.eq.d	\$f0,\$f1,\$f2
200+0028 <[^>]*> 46820803 	cmp.ueq.s	\$f0,\$f1,\$f2
210+002c <[^>]*> 46a20803 	cmp.ueq.d	\$f0,\$f1,\$f2
220+0030 <[^>]*> 46820804 	cmp.lt.s	\$f0,\$f1,\$f2
230+0034 <[^>]*> 46a20804 	cmp.lt.d	\$f0,\$f1,\$f2
240+0038 <[^>]*> 46820805 	cmp.ult.s	\$f0,\$f1,\$f2
250+003c <[^>]*> 46a20805 	cmp.ult.d	\$f0,\$f1,\$f2
260+0040 <[^>]*> 46820806 	cmp.le.s	\$f0,\$f1,\$f2
270+0044 <[^>]*> 46a20806 	cmp.le.d	\$f0,\$f1,\$f2
280+0048 <[^>]*> 46820807 	cmp.ule.s	\$f0,\$f1,\$f2
290+004c <[^>]*> 46a20807 	cmp.ule.d	\$f0,\$f1,\$f2
300+0050 <[^>]*> 46820808 	cmp.saf.s	\$f0,\$f1,\$f2
310+0054 <[^>]*> 46a20808 	cmp.saf.d	\$f0,\$f1,\$f2
320+0058 <[^>]*> 46820809 	cmp.sun.s	\$f0,\$f1,\$f2
330+005c <[^>]*> 46a20809 	cmp.sun.d	\$f0,\$f1,\$f2
340+0060 <[^>]*> 4682080a 	cmp.seq.s	\$f0,\$f1,\$f2
350+0064 <[^>]*> 46a2080a 	cmp.seq.d	\$f0,\$f1,\$f2
360+0068 <[^>]*> 4682080b 	cmp.sueq.s	\$f0,\$f1,\$f2
370+006c <[^>]*> 46a2080b 	cmp.sueq.d	\$f0,\$f1,\$f2
380+0070 <[^>]*> 4682080c 	cmp.slt.s	\$f0,\$f1,\$f2
390+0074 <[^>]*> 46a2080c 	cmp.slt.d	\$f0,\$f1,\$f2
400+0078 <[^>]*> 4682080d 	cmp.sult.s	\$f0,\$f1,\$f2
410+007c <[^>]*> 46a2080d 	cmp.sult.d	\$f0,\$f1,\$f2
420+0080 <[^>]*> 4682080e 	cmp.sle.s	\$f0,\$f1,\$f2
430+0084 <[^>]*> 46a2080e 	cmp.sle.d	\$f0,\$f1,\$f2
440+0088 <[^>]*> 4682080f 	cmp.sule.s	\$f0,\$f1,\$f2
450+008c <[^>]*> 46a2080f 	cmp.sule.d	\$f0,\$f1,\$f2
460+0090 <[^>]*> 46820811 	cmp.or.s	\$f0,\$f1,\$f2
470+0094 <[^>]*> 46a20811 	cmp.or.d	\$f0,\$f1,\$f2
480+0098 <[^>]*> 46820812 	cmp.une.s	\$f0,\$f1,\$f2
490+009c <[^>]*> 46a20812 	cmp.une.d	\$f0,\$f1,\$f2
500+00a0 <[^>]*> 46820813 	cmp.ne.s	\$f0,\$f1,\$f2
510+00a4 <[^>]*> 46a20813 	cmp.ne.d	\$f0,\$f1,\$f2
520+00a8 <[^>]*> 46820819 	cmp.sor.s	\$f0,\$f1,\$f2
530+00ac <[^>]*> 46a20819 	cmp.sor.d	\$f0,\$f1,\$f2
540+00b0 <[^>]*> 4682081a 	cmp.sune.s	\$f0,\$f1,\$f2
550+00b4 <[^>]*> 46a2081a 	cmp.sune.d	\$f0,\$f1,\$f2
560+00b8 <[^>]*> 4682081b 	cmp.sne.s	\$f0,\$f1,\$f2
570+00bc <[^>]*> 46a2081b 	cmp.sne.d	\$f0,\$f1,\$f2
580+00c0 <[^>]*> 4520ffff 	bc1eqz	\$f0,000000c0 <[^>]*>
59[	]*c0: R_MIPS_PC16	.L1.*1
600+00c4 <[^>]*> 00000000 	nop
610+00c8 <[^>]*> 453fffff 	bc1eqz	\$f31,000000c8 <[^>]*>
62[	]*c8: R_MIPS_PC16	.L1.*1
630+00cc <[^>]*> 00000000 	nop
640+00d0 <[^>]*> 453fffff 	bc1eqz	\$f31,000000d0 <[^>]*>
65[	]*d0: R_MIPS_PC16	new
660+00d4 <[^>]*> 00000000 	nop
670+00d8 <[^>]*> 453fffff 	bc1eqz	\$f31,000000d8 <[^>]*>
68[	]*d8: R_MIPS_PC16	external_label
690+00dc <[^>]*> 00000000 	nop
700+00e0 <[^>]*> 45a0ffff 	bc1nez	\$f0,000000e0 <[^>]*>
71[	]*e0: R_MIPS_PC16	.L1.*1
720+00e4 <[^>]*> 00000000 	nop
730+00e8 <[^>]*> 45bfffff 	bc1nez	\$f31,000000e8 <[^>]*>
74[	]*e8: R_MIPS_PC16	.L1.*1
750+00ec <[^>]*> 00000000 	nop
760+00f0 <[^>]*> 45bfffff 	bc1nez	\$f31,000000f0 <[^>]*>
77[	]*f0: R_MIPS_PC16	new
780+00f4 <[^>]*> 00000000 	nop
790+00f8 <[^>]*> 45bfffff 	bc1nez	\$f31,000000f8 <[^>]*>
80[	]*f8: R_MIPS_PC16	external_label
810+00fc <[^>]*> 00000000 	nop
820+0100 <[^>]*> 4920ffff 	bc2eqz	\$0,00000100 <[^>]*>
83[	]*100: R_MIPS_PC16	.L1.*1
840+0104 <[^>]*> 00000000 	nop
850+0108 <[^>]*> 493fffff 	bc2eqz	\$31,00000108 <[^>]*>
86[	]*108: R_MIPS_PC16	.L1.*1
870+010c <[^>]*> 00000000 	nop
880+0110 <[^>]*> 493fffff 	bc2eqz	\$31,00000110 <[^>]*>
89[	]*110: R_MIPS_PC16	new
900+0114 <[^>]*> 00000000 	nop
910+0118 <[^>]*> 493fffff 	bc2eqz	\$31,00000118 <[^>]*>
92[	]*118: R_MIPS_PC16	external_label
930+011c <[^>]*> 00000000 	nop
940+0120 <[^>]*> 49a0ffff 	bc2nez	\$0,00000120 <[^>]*>
95[	]*120: R_MIPS_PC16	.L1.*1
960+0124 <[^>]*> 00000000 	nop
970+0128 <[^>]*> 49bfffff 	bc2nez	\$31,00000128 <[^>]*>
98[	]*128: R_MIPS_PC16	.L1.*1
990+012c <[^>]*> 00000000 	nop
1000+0130 <[^>]*> 49bfffff 	bc2nez	\$31,00000130 <[^>]*>
101[	]*130: R_MIPS_PC16	new
1020+0134 <[^>]*> 00000000 	nop
1030+0138 <[^>]*> 49bfffff 	bc2nez	\$31,00000138 <[^>]*>
104[	]*138: R_MIPS_PC16	external_label
1050+013c <[^>]*> 00000000 	nop
1060+0140 <[^>]*> 46020810 	sel.s	\$f0,\$f1,\$f2
1070+0144 <[^>]*> 46220810 	sel.d	\$f0,\$f1,\$f2
1080+0148 <[^>]*> 46020814 	seleqz.s	\$f0,\$f1,\$f2
1090+014c <[^>]*> 46220814 	seleqz.d	\$f0,\$f1,\$f2
1100+0150 <[^>]*> 46020817 	selnez.s	\$f0,\$f1,\$f2
1110+0154 <[^>]*> 46220817 	selnez.d	\$f0,\$f1,\$f2
1120+0158 <[^>]*> 00641035 	seleqz	v0,v1,a0
1130+015c <[^>]*> 00641037 	selnez	v0,v1,a0
1140+0160 <[^>]*> 00641098 	mul	v0,v1,a0
1150+0164 <[^>]*> 006410d8 	muh	v0,v1,a0
1160+0168 <[^>]*> 00641099 	mulu	v0,v1,a0
1170+016c <[^>]*> 006410d9 	muhu	v0,v1,a0
1180+0170 <[^>]*> 0064109a 	div	v0,v1,a0
1190+0174 <[^>]*> 006410da 	mod	v0,v1,a0
1200+0178 <[^>]*> 0064109b 	divu	v0,v1,a0
1210+017c <[^>]*> 006410db 	modu	v0,v1,a0
1220+0180 <[^>]*> 49422000 	lwc2	\$2,0\(a0\)
1230+0184 <[^>]*> 49422400 	lwc2	\$2,-1024\(a0\)
1240+0188 <[^>]*> 494223ff 	lwc2	\$2,1023\(a0\)
1250+018c <[^>]*> 49622000 	swc2	\$2,0\(a0\)
1260+0190 <[^>]*> 49622400 	swc2	\$2,-1024\(a0\)
1270+0194 <[^>]*> 496223ff 	swc2	\$2,1023\(a0\)
1280+0198 <[^>]*> 49c22000 	ldc2	\$2,0\(a0\)
1290+019c <[^>]*> 49c22400 	ldc2	\$2,-1024\(a0\)
1300+01a0 <[^>]*> 49c223ff 	ldc2	\$2,1023\(a0\)
1310+01a4 <[^>]*> 49e22000 	sdc2	\$2,0\(a0\)
1320+01a8 <[^>]*> 49e22400 	sdc2	\$2,-1024\(a0\)
1330+01ac <[^>]*> 49e223ff 	sdc2	\$2,1023\(a0\)
1340+01b0 <[^>]*> 00641005 	lsa	v0,v1,a0,0x1
1350+01b4 <[^>]*> 006410c5 	lsa	v0,v1,a0,0x4
1360+01b8 <[^>]*> 00601050 	clz	v0,v1
1370+01bc <[^>]*> 00601051 	clo	v0,v1
1380+01c0 <[^>]*> 0000000e 	sdbbp
1390+01c4 <[^>]*> 0000000e 	sdbbp
1400+01c8 <[^>]*> 0000004e 	sdbbp	0x1
1410+01cc <[^>]*> 03ffffce 	sdbbp	0xfffff
1420+01d0 <[^>]*> 3c02ffff 	lui	v0,0xffff
1430+01d4 <[^>]*> 7c008035 	pref	0x0,-256\(zero\)
1440+01d8 <[^>]*> 7fff7fb5 	pref	0x1f,255\(ra\)
1450+01dc <[^>]*> 7c628036 	ll	v0,-256\(v1\)
1460+01e0 <[^>]*> 7c627fb6 	ll	v0,255\(v1\)
1470+01e4 <[^>]*> 7c628026 	sc	v0,-256\(v1\)
1480+01e8 <[^>]*> 7c627fa6 	sc	v0,255\(v1\)
1490+01ec <[^>]*> 7c608025 	cache	0x0,-256\(v1\)
1500+01f0 <[^>]*> 7c7f7fa5 	cache	0x1f,255\(v1\)
1510+01f4 <[^>]*> 7c432220 	align	a0,v0,v1,0
1520+01f8 <[^>]*> 7c432260 	align	a0,v0,v1,1
1530+01fc <[^>]*> 7c4322a0 	align	a0,v0,v1,2
1540+0200 <[^>]*> 7c4322e0 	align	a0,v0,v1,3
1550+0204 <[^>]*> 7c022020 	bitswap	a0,v0
1560+0208 <[^>]*> 2000ffff 	bovc	zero,zero,00000208 <[^>]*>
157[	]*208: R_MIPS_PC16	ext
1580+020c <[^>]*> 00000000 	nop
1590+0210 <[^>]*> 2040ffff 	bovc	v0,zero,00000210 <[^>]*>
160[	]*210: R_MIPS_PC16	ext
1610+0214 <[^>]*> 00000000 	nop
1620+0218 <[^>]*> 2040ffff 	bovc	v0,zero,00000218 <[^>]*>
163[	]*218: R_MIPS_PC16	ext
1640+021c <[^>]*> 00000000 	nop
1650+0220 <[^>]*> 2082ffff 	bovc	a0,v0,00000220 <[^>]*>
166[	]*220: R_MIPS_PC16	ext
1670+0224 <[^>]*> 00000000 	nop
1680+0228 <[^>]*> 2082ffff 	bovc	a0,v0,00000228 <[^>]*>
169[	]*228: R_MIPS_PC16	ext
1700+022c <[^>]*> 00000000 	nop
1710+0230 <[^>]*> 20828000 	bovc	a0,v0,fffe0234 <[^>]*>
172[	]*230: R_MIPS_PC16	L0.*
1730+0234 <[^>]*> 00000000 	nop
1740+0238 <[^>]*> 20827fff 	bovc	a0,v0,00020238 <[^>]*>
175[	]*238: R_MIPS_PC16	L0.*
1760+023c <[^>]*> 00000000 	nop
1770+0240 <[^>]*> 2082ffff 	bovc	a0,v0,00000240 <[^>]*>
178[	]*240: R_MIPS_PC16	.L1.*2
1790+0244 <[^>]*> 00000000 	nop
1800+0248 <[^>]*> 2042ffff 	bovc	v0,v0,00000248 <[^>]*>
181[	]*248: R_MIPS_PC16	ext
1820+024c <[^>]*> 00000000 	nop
1830+0250 <[^>]*> 20428000 	bovc	v0,v0,fffe0254 <[^>]*>
184[	]*250: R_MIPS_PC16	L0.*
1850+0254 <[^>]*> 00000000 	nop
1860+0258 <[^>]*> 2002ffff 	beqzalc	v0,00000258 <[^>]*>
187[	]*258: R_MIPS_PC16	ext
1880+025c <[^>]*> 00000000 	nop
1890+0260 <[^>]*> 20028000 	beqzalc	v0,fffe0264 <[^>]*>
190[	]*260: R_MIPS_PC16	L0.*
1910+0264 <[^>]*> 00000000 	nop
1920+0268 <[^>]*> 20027fff 	beqzalc	v0,00020268 <[^>]*>
193[	]*268: R_MIPS_PC16	L0.*
1940+026c <[^>]*> 00000000 	nop
1950+0270 <[^>]*> 2002ffff 	beqzalc	v0,00000270 <[^>]*>
196[	]*270: R_MIPS_PC16	.L1.*2
1970+0274 <[^>]*> 00000000 	nop
1980+0278 <[^>]*> 2043ffff 	beqc	v0,v1,00000278 <[^>]*>
199[	]*278: R_MIPS_PC16	ext
2000+027c <[^>]*> 00000000 	nop
2010+0280 <[^>]*> 2043ffff 	beqc	v0,v1,00000280 <[^>]*>
202[	]*280: R_MIPS_PC16	ext
2030+0284 <[^>]*> 00000000 	nop
2040+0288 <[^>]*> 20438000 	beqc	v0,v1,fffe028c <[^>]*>
205[	]*288: R_MIPS_PC16	L0.*
2060+028c <[^>]*> 00000000 	nop
2070+0290 <[^>]*> 20437fff 	beqc	v0,v1,00020290 <[^>]*>
208[	]*290: R_MIPS_PC16	L0.*
2090+0294 <[^>]*> 00000000 	nop
2100+0298 <[^>]*> 2043ffff 	beqc	v0,v1,00000298 <[^>]*>
211[	]*298: R_MIPS_PC16	.L1.*2
2120+029c <[^>]*> 00000000 	nop
2130+02a0 <[^>]*> 6000ffff 	bnvc	zero,zero,000002a0 <[^>]*>
214[	]*2a0: R_MIPS_PC16	ext
2150+02a4 <[^>]*> 00000000 	nop
2160+02a8 <[^>]*> 6040ffff 	bnvc	v0,zero,000002a8 <[^>]*>
217[	]*2a8: R_MIPS_PC16	ext
2180+02ac <[^>]*> 00000000 	nop
2190+02b0 <[^>]*> 6040ffff 	bnvc	v0,zero,000002b0 <[^>]*>
220[	]*2b0: R_MIPS_PC16	ext
2210+02b4 <[^>]*> 00000000 	nop
2220+02b8 <[^>]*> 6082ffff 	bnvc	a0,v0,000002b8 <[^>]*>
223[	]*2b8: R_MIPS_PC16	ext
2240+02bc <[^>]*> 00000000 	nop
2250+02c0 <[^>]*> 6082ffff 	bnvc	a0,v0,000002c0 <[^>]*>
226[	]*2c0: R_MIPS_PC16	ext
2270+02c4 <[^>]*> 00000000 	nop
2280+02c8 <[^>]*> 60828000 	bnvc	a0,v0,fffe02cc <[^>]*>
229[	]*2c8: R_MIPS_PC16	L0.*
2300+02cc <[^>]*> 00000000 	nop
2310+02d0 <[^>]*> 60827fff 	bnvc	a0,v0,000202d0 <[^>]*>
232[	]*2d0: R_MIPS_PC16	L0.*
2330+02d4 <[^>]*> 00000000 	nop
2340+02d8 <[^>]*> 6082ffff 	bnvc	a0,v0,000002d8 <[^>]*>
235[	]*2d8: R_MIPS_PC16	.L1.*2
2360+02dc <[^>]*> 00000000 	nop
2370+02e0 <[^>]*> 6042ffff 	bnvc	v0,v0,000002e0 <[^>]*>
238[	]*2e0: R_MIPS_PC16	ext
2390+02e4 <[^>]*> 00000000 	nop
2400+02e8 <[^>]*> 60428000 	bnvc	v0,v0,fffe02ec <[^>]*>
241[	]*2e8: R_MIPS_PC16	L0.*
2420+02ec <[^>]*> 00000000 	nop
2430+02f0 <[^>]*> 6002ffff 	bnezalc	v0,000002f0 <[^>]*>
244[	]*2f0: R_MIPS_PC16	ext
2450+02f4 <[^>]*> 00000000 	nop
2460+02f8 <[^>]*> 60028000 	bnezalc	v0,fffe02fc <[^>]*>
247[	]*2f8: R_MIPS_PC16	L0.*
2480+02fc <[^>]*> 00000000 	nop
2490+0300 <[^>]*> 60027fff 	bnezalc	v0,00020300 <[^>]*>
250[	]*300: R_MIPS_PC16	L0.*
2510+0304 <[^>]*> 00000000 	nop
2520+0308 <[^>]*> 6002ffff 	bnezalc	v0,00000308 <[^>]*>
253[	]*308: R_MIPS_PC16	.L1.*2
2540+030c <[^>]*> 00000000 	nop
2550+0310 <[^>]*> 6043ffff 	bnec	v0,v1,00000310 <[^>]*>
256[	]*310: R_MIPS_PC16	ext
2570+0314 <[^>]*> 00000000 	nop
2580+0318 <[^>]*> 6043ffff 	bnec	v0,v1,00000318 <[^>]*>
259[	]*318: R_MIPS_PC16	ext
2600+031c <[^>]*> 00000000 	nop
2610+0320 <[^>]*> 60438000 	bnec	v0,v1,fffe0324 <[^>]*>
262[	]*320: R_MIPS_PC16	L0.*
2630+0324 <[^>]*> 00000000 	nop
2640+0328 <[^>]*> 60437fff 	bnec	v0,v1,00020328 <[^>]*>
265[	]*328: R_MIPS_PC16	L0.*
2660+032c <[^>]*> 00000000 	nop
2670+0330 <[^>]*> 6043ffff 	bnec	v0,v1,00000330 <[^>]*>
268[	]*330: R_MIPS_PC16	.L1.*2
2690+0334 <[^>]*> 00000000 	nop
2700+0338 <[^>]*> 5802ffff 	blezc	v0,00000338 <[^>]*>
271[	]*338: R_MIPS_PC16	ext
2720+033c <[^>]*> 00000000 	nop
2730+0340 <[^>]*> 58028000 	blezc	v0,fffe0344 <[^>]*>
274[	]*340: R_MIPS_PC16	L0.*
2750+0344 <[^>]*> 00000000 	nop
2760+0348 <[^>]*> 58027fff 	blezc	v0,00020348 <[^>]*>
277[	]*348: R_MIPS_PC16	L0.*
2780+034c <[^>]*> 00000000 	nop
2790+0350 <[^>]*> 5802ffff 	blezc	v0,00000350 <[^>]*>
280[	]*350: R_MIPS_PC16	.L1.*2
2810+0354 <[^>]*> 00000000 	nop
2820+0358 <[^>]*> 5842ffff 	bgezc	v0,00000358 <[^>]*>
283[	]*358: R_MIPS_PC16	ext
2840+035c <[^>]*> 00000000 	nop
2850+0360 <[^>]*> 58428000 	bgezc	v0,fffe0364 <[^>]*>
286[	]*360: R_MIPS_PC16	L0.*
2870+0364 <[^>]*> 00000000 	nop
2880+0368 <[^>]*> 58427fff 	bgezc	v0,00020368 <[^>]*>
289[	]*368: R_MIPS_PC16	L0.*
2900+036c <[^>]*> 00000000 	nop
2910+0370 <[^>]*> 5842ffff 	bgezc	v0,00000370 <[^>]*>
292[	]*370: R_MIPS_PC16	.L1.*2
2930+0374 <[^>]*> 00000000 	nop
2940+0378 <[^>]*> 5843ffff 	bgec	v0,v1,00000378 <[^>]*>
295[	]*378: R_MIPS_PC16	ext
2960+037c <[^>]*> 00000000 	nop
2970+0380 <[^>]*> 58438000 	bgec	v0,v1,fffe0384 <[^>]*>
298[	]*380: R_MIPS_PC16	L0.*
2990+0384 <[^>]*> 00000000 	nop
3000+0388 <[^>]*> 58437fff 	bgec	v0,v1,00020388 <[^>]*>
301[	]*388: R_MIPS_PC16	L0.*
3020+038c <[^>]*> 00000000 	nop
3030+0390 <[^>]*> 5843ffff 	bgec	v0,v1,00000390 <[^>]*>
304[	]*390: R_MIPS_PC16	.L1.*2
3050+0394 <[^>]*> 00000000 	nop
3060+0398 <[^>]*> 5862ffff 	bgec	v1,v0,00000398 <[^>]*>
307[	]*398: R_MIPS_PC16	.L1.*2
3080+039c <[^>]*> 00000000 	nop
3090+03a0 <[^>]*> 5c02ffff 	bgtzc	v0,000003a0 <[^>]*>
310[	]*3a0: R_MIPS_PC16	ext
3110+03a4 <[^>]*> 00000000 	nop
3120+03a8 <[^>]*> 5c028000 	bgtzc	v0,fffe03ac <[^>]*>
313[	]*3a8: R_MIPS_PC16	L0.*
3140+03ac <[^>]*> 00000000 	nop
3150+03b0 <[^>]*> 5c027fff 	bgtzc	v0,000203b0 <[^>]*>
316[	]*3b0: R_MIPS_PC16	L0.*
3170+03b4 <[^>]*> 00000000 	nop
3180+03b8 <[^>]*> 5c02ffff 	bgtzc	v0,000003b8 <[^>]*>
319[	]*3b8: R_MIPS_PC16	.L1.*2
3200+03bc <[^>]*> 00000000 	nop
3210+03c0 <[^>]*> 5c42ffff 	bltzc	v0,000003c0 <[^>]*>
322[	]*3c0: R_MIPS_PC16	ext
3230+03c4 <[^>]*> 00000000 	nop
3240+03c8 <[^>]*> 5c428000 	bltzc	v0,fffe03cc <[^>]*>
325[	]*3c8: R_MIPS_PC16	L0.*
3260+03cc <[^>]*> 00000000 	nop
3270+03d0 <[^>]*> 5c427fff 	bltzc	v0,000203d0 <[^>]*>
328[	]*3d0: R_MIPS_PC16	L0.*
3290+03d4 <[^>]*> 00000000 	nop
3300+03d8 <[^>]*> 5c42ffff 	bltzc	v0,000003d8 <[^>]*>
331[	]*3d8: R_MIPS_PC16	.L1.*2
3320+03dc <[^>]*> 00000000 	nop
3330+03e0 <[^>]*> 5c43ffff 	bltc	v0,v1,000003e0 <[^>]*>
334[	]*3e0: R_MIPS_PC16	ext
3350+03e4 <[^>]*> 00000000 	nop
3360+03e8 <[^>]*> 5c438000 	bltc	v0,v1,fffe03ec <[^>]*>
337[	]*3e8: R_MIPS_PC16	L0.*
3380+03ec <[^>]*> 00000000 	nop
3390+03f0 <[^>]*> 5c437fff 	bltc	v0,v1,000203f0 <[^>]*>
340[	]*3f0: R_MIPS_PC16	L0.*
3410+03f4 <[^>]*> 00000000 	nop
3420+03f8 <[^>]*> 5c43ffff 	bltc	v0,v1,000003f8 <[^>]*>
343[	]*3f8: R_MIPS_PC16	.L1.*2
3440+03fc <[^>]*> 00000000 	nop
3450+0400 <[^>]*> 5c62ffff 	bltc	v1,v0,00000400 <[^>]*>
346[	]*400: R_MIPS_PC16	.L1.*2
3470+0404 <[^>]*> 00000000 	nop
3480+0408 <[^>]*> 1802ffff 	blezalc	v0,00000408 <[^>]*>
349[	]*408: R_MIPS_PC16	ext
3500+040c <[^>]*> 00000000 	nop
3510+0410 <[^>]*> 18028000 	blezalc	v0,fffe0414 <[^>]*>
352[	]*410: R_MIPS_PC16	L0.*
3530+0414 <[^>]*> 00000000 	nop
3540+0418 <[^>]*> 18027fff 	blezalc	v0,00020418 <[^>]*>
355[	]*418: R_MIPS_PC16	L0.*
3560+041c <[^>]*> 00000000 	nop
3570+0420 <[^>]*> 1802ffff 	blezalc	v0,00000420 <[^>]*>
358[	]*420: R_MIPS_PC16	.L1.*2
3590+0424 <[^>]*> 00000000 	nop
3600+0428 <[^>]*> 1842ffff 	bgezalc	v0,00000428 <[^>]*>
361[	]*428: R_MIPS_PC16	ext
3620+042c <[^>]*> 00000000 	nop
3630+0430 <[^>]*> 18428000 	bgezalc	v0,fffe0434 <[^>]*>
364[	]*430: R_MIPS_PC16	L0.*
3650+0434 <[^>]*> 00000000 	nop
3660+0438 <[^>]*> 18427fff 	bgezalc	v0,00020438 <[^>]*>
367[	]*438: R_MIPS_PC16	L0.*
3680+043c <[^>]*> 00000000 	nop
3690+0440 <[^>]*> 1842ffff 	bgezalc	v0,00000440 <[^>]*>
370[	]*440: R_MIPS_PC16	.L1.*2
3710+0444 <[^>]*> 00000000 	nop
3720+0448 <[^>]*> 1843ffff 	bgeuc	v0,v1,00000448 <[^>]*>
373[	]*448: R_MIPS_PC16	ext
3740+044c <[^>]*> 00000000 	nop
3750+0450 <[^>]*> 18438000 	bgeuc	v0,v1,fffe0454 <[^>]*>
376[	]*450: R_MIPS_PC16	L0.*
3770+0454 <[^>]*> 00000000 	nop
3780+0458 <[^>]*> 18437fff 	bgeuc	v0,v1,00020458 <[^>]*>
379[	]*458: R_MIPS_PC16	L0.*
3800+045c <[^>]*> 00000000 	nop
3810+0460 <[^>]*> 1843ffff 	bgeuc	v0,v1,00000460 <[^>]*>
382[	]*460: R_MIPS_PC16	.L1.*2
3830+0464 <[^>]*> 00000000 	nop
3840+0468 <[^>]*> 1862ffff 	bgeuc	v1,v0,00000468 <[^>]*>
385[	]*468: R_MIPS_PC16	.L1.*2
3860+046c <[^>]*> 00000000 	nop
3870+0470 <[^>]*> 1c02ffff 	bgtzalc	v0,00000470 <[^>]*>
388[	]*470: R_MIPS_PC16	ext
3890+0474 <[^>]*> 00000000 	nop
3900+0478 <[^>]*> 1c028000 	bgtzalc	v0,fffe047c <[^>]*>
391[	]*478: R_MIPS_PC16	L0.*
3920+047c <[^>]*> 00000000 	nop
3930+0480 <[^>]*> 1c027fff 	bgtzalc	v0,00020480 <[^>]*>
394[	]*480: R_MIPS_PC16	L0.*
3950+0484 <[^>]*> 00000000 	nop
3960+0488 <[^>]*> 1c02ffff 	bgtzalc	v0,00000488 <[^>]*>
397[	]*488: R_MIPS_PC16	.L1.*2
3980+048c <[^>]*> 00000000 	nop
3990+0490 <[^>]*> 1c42ffff 	bltzalc	v0,00000490 <[^>]*>
400[	]*490: R_MIPS_PC16	ext
4010+0494 <[^>]*> 00000000 	nop
4020+0498 <[^>]*> 1c428000 	bltzalc	v0,fffe049c <[^>]*>
403[	]*498: R_MIPS_PC16	L0.*
4040+049c <[^>]*> 00000000 	nop
4050+04a0 <[^>]*> 1c427fff 	bltzalc	v0,000204a0 <[^>]*>
406[	]*4a0: R_MIPS_PC16	L0.*
4070+04a4 <[^>]*> 00000000 	nop
4080+04a8 <[^>]*> 1c42ffff 	bltzalc	v0,000004a8 <[^>]*>
409[	]*4a8: R_MIPS_PC16	.L1.*2
4100+04ac <[^>]*> 00000000 	nop
4110+04b0 <[^>]*> 1c43ffff 	bltuc	v0,v1,000004b0 <[^>]*>
412[	]*4b0: R_MIPS_PC16	ext
4130+04b4 <[^>]*> 00000000 	nop
4140+04b8 <[^>]*> 1c438000 	bltuc	v0,v1,fffe04bc <[^>]*>
415[	]*4b8: R_MIPS_PC16	L0.*
4160+04bc <[^>]*> 00000000 	nop
4170+04c0 <[^>]*> 1c437fff 	bltuc	v0,v1,000204c0 <[^>]*>
418[	]*4c0: R_MIPS_PC16	L0.*
4190+04c4 <[^>]*> 00000000 	nop
4200+04c8 <[^>]*> 1c43ffff 	bltuc	v0,v1,000004c8 <[^>]*>
421[	]*4c8: R_MIPS_PC16	.L1.*2
4220+04cc <[^>]*> 00000000 	nop
4230+04d0 <[^>]*> 1c62ffff 	bltuc	v1,v0,000004d0 <[^>]*>
424[	]*4d0: R_MIPS_PC16	.L1.*2
4250+04d4 <[^>]*> 00000000 	nop
4260+04d8 <[^>]*> cbffffff 	bc	000004d8 <[^>]*>
427[	]*4d8: R_MIPS_PC26_S2	ext
4280+04dc <[^>]*> ca000000 	bc	f80004e0 <[^>]*>
429[	]*4dc: R_MIPS_PC26_S2	L0.*
4300+04e0 <[^>]*> c9ffffff 	bc	080004e0 <[^>]*>
431[	]*4e0: R_MIPS_PC26_S2	L0.*
4320+04e4 <[^>]*> cbffffff 	bc	000004e4 <[^>]*>
433[	]*4e4: R_MIPS_PC26_S2	.L1.*2
4340+04e8 <[^>]*> ebffffff 	balc	000004e8 <[^>]*>
435[	]*4e8: R_MIPS_PC26_S2	ext
4360+04ec <[^>]*> ea000000 	balc	f80004f0 <[^>]*>
437[	]*4ec: R_MIPS_PC26_S2	L0.*
4380+04f0 <[^>]*> e9ffffff 	balc	080004f0 <[^>]*>
439[	]*4f0: R_MIPS_PC26_S2	L0.*
4400+04f4 <[^>]*> ebffffff 	balc	000004f4 <[^>]*>
441[	]*4f4: R_MIPS_PC26_S2	.L1.*2
4420+04f8 <[^>]*> d85fffff 	beqzc	v0,000004f8 <[^>]*>
443[	]*4f8: R_MIPS_PC21_S2	ext
4440+04fc <[^>]*> 00000000 	nop
4450+0500 <[^>]*> d8500000 	beqzc	v0,ffc00504 <[^>]*>
446[	]*500: R_MIPS_PC21_S2	L0.*
4470+0504 <[^>]*> 00000000 	nop
4480+0508 <[^>]*> d84fffff 	beqzc	v0,00400508 <[^>]*>
449[	]*508: R_MIPS_PC21_S2	L0.*
4500+050c <[^>]*> 00000000 	nop
4510+0510 <[^>]*> d85fffff 	beqzc	v0,00000510 <[^>]*>
452[	]*510: R_MIPS_PC21_S2	.L1.*2
4530+0514 <[^>]*> 00000000 	nop
4540+0518 <[^>]*> d8038000 	jic	v1,-32768
4550+051c <[^>]*> d8037fff 	jic	v1,32767
4560+0520 <[^>]*> d81f0000 	jrc	ra
4570+0524 <[^>]*> f85fffff 	bnezc	v0,00000524 <[^>]*>
458[	]*524: R_MIPS_PC21_S2	ext
4590+0528 <[^>]*> 00000000 	nop
4600+052c <[^>]*> f8500000 	bnezc	v0,ffc00530 <[^>]*>
461[	]*52c: R_MIPS_PC21_S2	L0.*
4620+0530 <[^>]*> 00000000 	nop
4630+0534 <[^>]*> f84fffff 	bnezc	v0,00400534 <[^>]*>
464[	]*534: R_MIPS_PC21_S2	L0.*
4650+0538 <[^>]*> 00000000 	nop
4660+053c <[^>]*> f85fffff 	bnezc	v0,0000053c <[^>]*>
467[	]*53c: R_MIPS_PC21_S2	.L1.*2
4680+0540 <[^>]*> 00000000 	nop
4690+0544 <[^>]*> f8038000 	jialc	v1,-32768
4700+0548 <[^>]*> f8037fff 	jialc	v1,32767
4710+054c <[^>]*> 3c43ffff 	aui	v1,v0,0xffff
4720+0550 <[^>]*> ec600000 	lapc	v1,00000550 <[^>]*>
473[	]*550: R_MIPS_PC19_S2	.L1.*2
4740+0554 <[^>]*> ec840000 	lapc	a0,fff00554 <[^>]*>
475[	]*554: R_MIPS_PC19_S2	L0.*
4760+0558 <[^>]*> ec83ffff 	lapc	a0,00100554 <[^>]*>
477[	]*558: R_MIPS_PC19_S2	L0.*
4780+055c <[^>]*> ec840000 	lapc	a0,fff0055c <[^>]*>
4790+0560 <[^>]*> ec83ffff 	lapc	a0,0010055c <[^>]*>
4800+0564 <[^>]*> ec7effff 	auipc	v1,0xffff
4810+0568 <[^>]*> ec7fffff 	aluipc	v1,0xffff
4820+056c <[^>]*> ec880000 	lwpc	a0,0000056c <[^>]*>
483[	]*56c: R_MIPS_PC19_S2	.L1.*2
4840+0570 <[^>]*> ec8c0000 	lwpc	a0,fff00570 <[^>]*>
485[	]*570: R_MIPS_PC19_S2	L0.*
4860+0574 <[^>]*> ec8bffff 	lwpc	a0,00100570 <[^>]*>
487[	]*574: R_MIPS_PC19_S2	L0.*
4880+0578 <[^>]*> ec8c0000 	lwpc	a0,fff00578 <[^>]*>
4890+057c <[^>]*> ec8bffff 	lwpc	a0,00100578 <[^>]*>
4900+0580 <[^>]*> 00000000 	nop
4910+0584 <[^>]*> ec83ffff 	lapc	a0,00100580 <[^>]*>
4920+0588 <[^>]*> f8040000 	jalrc	a0
4930+058c <[^>]*> 04100000 	nal
4940+0590 <[^>]*> 00000000 	nop
4950+0594 <[^>]*> 41600004 	evp
4960+0598 <[^>]*> 41600024 	dvp
4970+059c <[^>]*> 41620004 	evp	v0
4980+05a0 <[^>]*> 41620024 	dvp	v0
4990+05a4 <[^>]*> 04170000 	sigrie	0x0
5000+05a8 <[^>]*> 0417ffff 	sigrie	0xffff
5010+05ac <[^>]*> 7cc52076 	llwp	a1,a0,a2
5020+05b0 <[^>]*> 7cc52066 	scwp	a1,a0,a2
503	\.\.\.
504