1/* tc-sh.c -- Assemble code for the Renesas / SuperH SH 2 Copyright (C) 1993-2020 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21/* Written By Steve Chamberlain <sac@cygnus.com> */ 22 23#include "as.h" 24#include "subsegs.h" 25#define DEFINE_TABLE 26#include "opcodes/sh-opc.h" 27#include "safe-ctype.h" 28 29#ifdef OBJ_ELF 30#include "elf/sh.h" 31#endif 32 33#include "dwarf2dbg.h" 34#include "dw2gencfi.h" 35 36typedef struct 37 { 38 sh_arg_type type; 39 int reg; 40 expressionS immediate; 41 } 42sh_operand_info; 43 44const char comment_chars[] = "!"; 45const char line_separator_chars[] = ";"; 46const char line_comment_chars[] = "!#"; 47 48static void s_uses (int); 49static void s_uacons (int); 50 51#ifdef OBJ_ELF 52static void sh_elf_cons (int); 53 54symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 55#endif 56 57static void 58big (int ignore ATTRIBUTE_UNUSED) 59{ 60 if (! target_big_endian) 61 as_bad (_("directive .big encountered when option -big required")); 62 63 /* Stop further messages. */ 64 target_big_endian = 1; 65} 66 67static void 68little (int ignore ATTRIBUTE_UNUSED) 69{ 70 if (target_big_endian) 71 as_bad (_("directive .little encountered when option -little required")); 72 73 /* Stop further messages. */ 74 target_big_endian = 0; 75} 76 77/* This table describes all the machine specific pseudo-ops the assembler 78 has to support. The fields are: 79 pseudo-op name without dot 80 function to call to execute this pseudo-op 81 Integer arg to pass to the function. */ 82 83const pseudo_typeS md_pseudo_table[] = 84{ 85#ifdef OBJ_ELF 86 {"long", sh_elf_cons, 4}, 87 {"int", sh_elf_cons, 4}, 88 {"word", sh_elf_cons, 2}, 89 {"short", sh_elf_cons, 2}, 90#else 91 {"int", cons, 4}, 92 {"word", cons, 2}, 93#endif /* OBJ_ELF */ 94 {"big", big, 0}, 95 {"form", listing_psize, 0}, 96 {"little", little, 0}, 97 {"heading", listing_title, 0}, 98 {"import", s_ignore, 0}, 99 {"page", listing_eject, 0}, 100 {"program", s_ignore, 0}, 101 {"uses", s_uses, 0}, 102 {"uaword", s_uacons, 2}, 103 {"ualong", s_uacons, 4}, 104 {"uaquad", s_uacons, 8}, 105 {"2byte", s_uacons, 2}, 106 {"4byte", s_uacons, 4}, 107 {"8byte", s_uacons, 8}, 108 {0, 0, 0} 109}; 110 111int sh_relax; /* set if -relax seen */ 112 113/* Whether -small was seen. */ 114 115int sh_small; 116 117/* Flag to generate relocations against symbol values for local symbols. */ 118 119static int dont_adjust_reloc_32; 120 121/* Flag to indicate that '$' is allowed as a register prefix. */ 122 123static int allow_dollar_register_prefix; 124 125/* Preset architecture set, if given; zero otherwise. */ 126 127static unsigned int preset_target_arch; 128 129/* The bit mask of architectures that could 130 accommodate the insns seen so far. */ 131static unsigned int valid_arch; 132 133#ifdef OBJ_ELF 134/* Whether --fdpic was given. */ 135static int sh_fdpic; 136#endif 137 138const char EXP_CHARS[] = "eE"; 139 140/* Chars that mean this number is a floating point constant. */ 141/* As in 0f12.456 */ 142/* or 0d1.2345e12 */ 143const char FLT_CHARS[] = "rRsSfFdDxXpP"; 144 145#define C(a,b) ENCODE_RELAX(a,b) 146 147#define ENCODE_RELAX(what,length) (((what) << 4) + (length)) 148#define GET_WHAT(x) ((x>>4)) 149 150/* These are the three types of relaxable instruction. */ 151/* These are the types of relaxable instructions; except for END which is 152 a marker. */ 153#define COND_JUMP 1 154#define COND_JUMP_DELAY 2 155#define UNCOND_JUMP 3 156 157#define END 4 158 159#define UNDEF_DISP 0 160#define COND8 1 161#define COND12 2 162#define COND32 3 163#define UNDEF_WORD_DISP 4 164 165#define UNCOND12 1 166#define UNCOND32 2 167 168/* Branch displacements are from the address of the branch plus 169 four, thus all minimum and maximum values have 4 added to them. */ 170#define COND8_F 258 171#define COND8_M -252 172#define COND8_LENGTH 2 173 174/* There is one extra instruction before the branch, so we must add 175 two more bytes to account for it. */ 176#define COND12_F 4100 177#define COND12_M -4090 178#define COND12_LENGTH 6 179 180#define COND12_DELAY_LENGTH 4 181 182/* ??? The minimum and maximum values are wrong, but this does not matter 183 since this relocation type is not supported yet. */ 184#define COND32_F (1<<30) 185#define COND32_M -(1<<30) 186#define COND32_LENGTH 14 187 188#define UNCOND12_F 4098 189#define UNCOND12_M -4092 190#define UNCOND12_LENGTH 2 191 192/* ??? The minimum and maximum values are wrong, but this does not matter 193 since this relocation type is not supported yet. */ 194#define UNCOND32_F (1<<30) 195#define UNCOND32_M -(1<<30) 196#define UNCOND32_LENGTH 14 197 198#define EMPTY { 0, 0, 0, 0 } 199 200const relax_typeS md_relax_table[C (END, 0)] = { 201 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 202 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 203 204 EMPTY, 205 /* C (COND_JUMP, COND8) */ 206 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, 207 /* C (COND_JUMP, COND12) */ 208 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, 209 /* C (COND_JUMP, COND32) */ 210 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 211 /* C (COND_JUMP, UNDEF_WORD_DISP) */ 212 { 0, 0, COND32_LENGTH, 0, }, 213 EMPTY, EMPTY, EMPTY, 214 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 215 216 EMPTY, 217 /* C (COND_JUMP_DELAY, COND8) */ 218 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, 219 /* C (COND_JUMP_DELAY, COND12) */ 220 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, 221 /* C (COND_JUMP_DELAY, COND32) */ 222 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 223 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ 224 { 0, 0, COND32_LENGTH, 0, }, 225 EMPTY, EMPTY, EMPTY, 226 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 227 228 EMPTY, 229 /* C (UNCOND_JUMP, UNCOND12) */ 230 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, 231 /* C (UNCOND_JUMP, UNCOND32) */ 232 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, 233 EMPTY, 234 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ 235 { 0, 0, UNCOND32_LENGTH, 0, }, 236 EMPTY, EMPTY, EMPTY, 237 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 238 239}; 240 241#undef EMPTY 242 243static htab_t opcode_hash_control; /* Opcode mnemonics */ 244 245 246#ifdef OBJ_ELF 247/* Determine whether the symbol needs any kind of PIC relocation. */ 248 249inline static int 250sh_PIC_related_p (symbolS *sym) 251{ 252 expressionS *exp; 253 254 if (! sym) 255 return 0; 256 257 if (sym == GOT_symbol) 258 return 1; 259 260 exp = symbol_get_value_expression (sym); 261 262 return (exp->X_op == O_PIC_reloc 263 || sh_PIC_related_p (exp->X_add_symbol) 264 || sh_PIC_related_p (exp->X_op_symbol)); 265} 266 267/* Determine the relocation type to be used to represent the 268 expression, that may be rearranged. */ 269 270static int 271sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) 272{ 273 expressionS *exp = main_exp; 274 275 /* This is here for backward-compatibility only. GCC used to generated: 276 277 f@PLT + . - (.LPCS# + 2) 278 279 but we'd rather be able to handle this as a PIC-related reference 280 plus/minus a symbol. However, gas' parser gives us: 281 282 O_subtract (O_add (f@PLT, .), .LPCS#+2) 283 284 so we attempt to transform this into: 285 286 O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) 287 288 which we can handle simply below. */ 289 if (exp->X_op == O_subtract) 290 { 291 if (sh_PIC_related_p (exp->X_op_symbol)) 292 return 1; 293 294 exp = symbol_get_value_expression (exp->X_add_symbol); 295 296 if (exp && sh_PIC_related_p (exp->X_op_symbol)) 297 return 1; 298 299 if (exp && exp->X_op == O_add 300 && sh_PIC_related_p (exp->X_add_symbol)) 301 { 302 symbolS *sym = exp->X_add_symbol; 303 304 exp->X_op = O_subtract; 305 exp->X_add_symbol = main_exp->X_op_symbol; 306 307 main_exp->X_op_symbol = main_exp->X_add_symbol; 308 main_exp->X_add_symbol = sym; 309 310 main_exp->X_add_number += exp->X_add_number; 311 exp->X_add_number = 0; 312 } 313 314 exp = main_exp; 315 } 316 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) 317 return 1; 318 319 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) 320 { 321 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 322 { 323 *r_type_p = BFD_RELOC_SH_GOTPC; 324 return 0; 325 } 326 exp = symbol_get_value_expression (exp->X_add_symbol); 327 if (! exp) 328 return 0; 329 } 330 331 if (exp->X_op == O_PIC_reloc) 332 { 333 switch (*r_type_p) 334 { 335 case BFD_RELOC_NONE: 336 case BFD_RELOC_UNUSED: 337 *r_type_p = exp->X_md; 338 break; 339 340 case BFD_RELOC_SH_DISP20: 341 switch (exp->X_md) 342 { 343 case BFD_RELOC_32_GOT_PCREL: 344 *r_type_p = BFD_RELOC_SH_GOT20; 345 break; 346 347 case BFD_RELOC_32_GOTOFF: 348 *r_type_p = BFD_RELOC_SH_GOTOFF20; 349 break; 350 351 case BFD_RELOC_SH_GOTFUNCDESC: 352 *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20; 353 break; 354 355 case BFD_RELOC_SH_GOTOFFFUNCDESC: 356 *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20; 357 break; 358 359 default: 360 abort (); 361 } 362 break; 363 364 default: 365 abort (); 366 } 367 if (exp == main_exp) 368 exp->X_op = O_symbol; 369 else 370 { 371 main_exp->X_add_symbol = exp->X_add_symbol; 372 main_exp->X_add_number += exp->X_add_number; 373 } 374 } 375 else 376 return (sh_PIC_related_p (exp->X_add_symbol) 377 || sh_PIC_related_p (exp->X_op_symbol)); 378 379 return 0; 380} 381 382/* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ 383 384void 385sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, 386 bfd_reloc_code_real_type r_type) 387{ 388 r_type = BFD_RELOC_UNUSED; 389 390 if (sh_check_fixup (exp, &r_type)) 391 as_bad (_("Invalid PIC expression.")); 392 393 if (r_type == BFD_RELOC_UNUSED) 394 switch (size) 395 { 396 case 1: 397 r_type = BFD_RELOC_8; 398 break; 399 400 case 2: 401 r_type = BFD_RELOC_16; 402 break; 403 404 case 4: 405 r_type = BFD_RELOC_32; 406 break; 407 408 case 8: 409 r_type = BFD_RELOC_64; 410 break; 411 412 default: 413 goto error; 414 } 415 else if (size != 4) 416 { 417 error: 418 as_bad (_("unsupported BFD relocation size %u"), size); 419 r_type = BFD_RELOC_UNUSED; 420 } 421 422 fix_new_exp (frag, off, size, exp, 0, r_type); 423} 424 425/* The regular cons() function, that reads constants, doesn't support 426 suffixes such as @GOT, @GOTOFF and @PLT, that generate 427 machine-specific relocation types. So we must define it here. */ 428/* Clobbers input_line_pointer, checks end-of-line. */ 429/* NBYTES 1=.byte, 2=.word, 4=.long */ 430static void 431sh_elf_cons (int nbytes) 432{ 433 expressionS exp; 434 435 if (is_it_end_of_statement ()) 436 { 437 demand_empty_rest_of_line (); 438 return; 439 } 440 441#ifdef md_cons_align 442 md_cons_align (nbytes); 443#endif 444 445 do 446 { 447 expression (&exp); 448 emit_expr (&exp, (unsigned int) nbytes); 449 } 450 while (*input_line_pointer++ == ','); 451 452 input_line_pointer--; /* Put terminator back into stream. */ 453 if (*input_line_pointer == '#' || *input_line_pointer == '!') 454 { 455 while (! is_end_of_line[(unsigned char) *input_line_pointer++]); 456 } 457 else 458 demand_empty_rest_of_line (); 459} 460 461/* The regular frag_offset_fixed_p doesn't work for rs_align_test 462 frags. */ 463 464static bfd_boolean 465align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, 466 bfd_vma *offset) 467{ 468 const fragS *frag; 469 bfd_vma off; 470 471 /* Start with offset initialised to difference between the two frags. 472 Prior to assigning frag addresses this will be zero. */ 473 off = frag1->fr_address - frag2->fr_address; 474 if (frag1 == frag2) 475 { 476 *offset = off; 477 return TRUE; 478 } 479 480 /* Maybe frag2 is after frag1. */ 481 frag = frag1; 482 while (frag->fr_type == rs_fill 483 || frag->fr_type == rs_align_test) 484 { 485 if (frag->fr_type == rs_fill) 486 off += frag->fr_fix + frag->fr_offset * frag->fr_var; 487 else 488 off += frag->fr_fix; 489 frag = frag->fr_next; 490 if (frag == NULL) 491 break; 492 if (frag == frag2) 493 { 494 *offset = off; 495 return TRUE; 496 } 497 } 498 499 /* Maybe frag1 is after frag2. */ 500 off = frag1->fr_address - frag2->fr_address; 501 frag = frag2; 502 while (frag->fr_type == rs_fill 503 || frag->fr_type == rs_align_test) 504 { 505 if (frag->fr_type == rs_fill) 506 off -= frag->fr_fix + frag->fr_offset * frag->fr_var; 507 else 508 off -= frag->fr_fix; 509 frag = frag->fr_next; 510 if (frag == NULL) 511 break; 512 if (frag == frag1) 513 { 514 *offset = off; 515 return TRUE; 516 } 517 } 518 519 return FALSE; 520} 521 522/* Optimize a difference of symbols which have rs_align_test frag if 523 possible. */ 524 525int 526sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) 527{ 528 bfd_vma frag_off; 529 530 if (op == O_subtract 531 && l->X_op == O_symbol 532 && r->X_op == O_symbol 533 && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) 534 && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) 535 || r->X_add_symbol == l->X_add_symbol) 536 && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), 537 symbol_get_frag (r->X_add_symbol), 538 &frag_off)) 539 { 540 offsetT symval_diff = S_GET_VALUE (l->X_add_symbol) 541 - S_GET_VALUE (r->X_add_symbol); 542 subtract_from_result (l, r->X_add_number, r->X_extrabit); 543 subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0); 544 add_to_result (l, symval_diff, symval_diff < 0); 545 l->X_op = O_constant; 546 l->X_add_symbol = 0; 547 return 1; 548 } 549 return 0; 550} 551#endif /* OBJ_ELF */ 552 553/* This function is called once, at assembler startup time. This should 554 set up all the tables, etc that the MD part of the assembler needs. */ 555 556void 557md_begin (void) 558{ 559 const sh_opcode_info *opcode; 560 const char *prev_name = ""; 561 unsigned int target_arch; 562 563 target_arch 564 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; 565 valid_arch = target_arch; 566 567 opcode_hash_control = str_htab_create (); 568 569 /* Insert unique names into hash table. */ 570 for (opcode = sh_table; opcode->name; opcode++) 571 { 572 if (strcmp (prev_name, opcode->name) != 0) 573 { 574 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) 575 continue; 576 prev_name = opcode->name; 577 str_hash_insert (opcode_hash_control, opcode->name, opcode, 0); 578 } 579 } 580} 581 582static int reg_m; 583static int reg_n; 584static int reg_x, reg_y; 585static int reg_efg; 586static int reg_b; 587 588#define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') 589 590/* Try to parse a reg name. Return the number of chars consumed. */ 591 592static unsigned int 593parse_reg_without_prefix (char *src, sh_arg_type *mode, int *reg) 594{ 595 char l0 = TOLOWER (src[0]); 596 char l1 = l0 ? TOLOWER (src[1]) : 0; 597 598 /* We use ! IDENT_CHAR for the next character after the register name, to 599 make sure that we won't accidentally recognize a symbol name such as 600 'sram' or sr_ram as being a reference to the register 'sr'. */ 601 602 if (l0 == 'r') 603 { 604 if (l1 == '1') 605 { 606 if (src[2] >= '0' && src[2] <= '5' 607 && ! IDENT_CHAR ((unsigned char) src[3])) 608 { 609 *mode = A_REG_N; 610 *reg = 10 + src[2] - '0'; 611 return 3; 612 } 613 } 614 if (l1 >= '0' && l1 <= '9' 615 && ! IDENT_CHAR ((unsigned char) src[2])) 616 { 617 *mode = A_REG_N; 618 *reg = (l1 - '0'); 619 return 2; 620 } 621 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 622 && ! IDENT_CHAR ((unsigned char) src[7])) 623 { 624 *mode = A_REG_B; 625 *reg = (l1 - '0'); 626 return 7; 627 } 628 629 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) 630 { 631 *mode = A_RE; 632 return 2; 633 } 634 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) 635 { 636 *mode = A_RS; 637 return 2; 638 } 639 } 640 641 if (l0 == 'a') 642 { 643 if (l1 == '0') 644 { 645 if (! IDENT_CHAR ((unsigned char) src[2])) 646 { 647 *mode = DSP_REG_N; 648 *reg = A_A0_NUM; 649 return 2; 650 } 651 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 652 { 653 *mode = DSP_REG_N; 654 *reg = A_A0G_NUM; 655 return 3; 656 } 657 } 658 if (l1 == '1') 659 { 660 if (! IDENT_CHAR ((unsigned char) src[2])) 661 { 662 *mode = DSP_REG_N; 663 *reg = A_A1_NUM; 664 return 2; 665 } 666 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 667 { 668 *mode = DSP_REG_N; 669 *reg = A_A1G_NUM; 670 return 3; 671 } 672 } 673 674 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' 675 && ! IDENT_CHAR ((unsigned char) src[3])) 676 { 677 *mode = A_REG_N; 678 *reg = 4 + (l1 - '0'); 679 return 3; 680 } 681 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' 682 && ! IDENT_CHAR ((unsigned char) src[3])) 683 { 684 *mode = A_REG_N; 685 *reg = 6 + (l1 - '0'); 686 return 3; 687 } 688 if (l1 == 's' && src[2] >= '0' && src[2] <= '3' 689 && ! IDENT_CHAR ((unsigned char) src[3])) 690 { 691 int n = l1 - '0'; 692 693 *mode = A_REG_N; 694 *reg = n | ((~n & 2) << 1); 695 return 3; 696 } 697 } 698 699 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) 700 { 701 if (l1 == 's') 702 { 703 *mode = A_REG_N; 704 *reg = 8; 705 return 2; 706 } 707 if (l1 == 'x') 708 { 709 *mode = A_REG_N; 710 *reg = 8; 711 return 2; 712 } 713 if (l1 == 'y') 714 { 715 *mode = A_REG_N; 716 *reg = 9; 717 return 2; 718 } 719 } 720 721 if (l0 == 'x' && l1 >= '0' && l1 <= '1' 722 && ! IDENT_CHAR ((unsigned char) src[2])) 723 { 724 *mode = DSP_REG_N; 725 *reg = A_X0_NUM + l1 - '0'; 726 return 2; 727 } 728 729 if (l0 == 'y' && l1 >= '0' && l1 <= '1' 730 && ! IDENT_CHAR ((unsigned char) src[2])) 731 { 732 *mode = DSP_REG_N; 733 *reg = A_Y0_NUM + l1 - '0'; 734 return 2; 735 } 736 737 if (l0 == 'm' && l1 >= '0' && l1 <= '1' 738 && ! IDENT_CHAR ((unsigned char) src[2])) 739 { 740 *mode = DSP_REG_N; 741 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; 742 return 2; 743 } 744 745 if (l0 == 's' 746 && l1 == 's' 747 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) 748 { 749 *mode = A_SSR; 750 return 3; 751 } 752 753 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' 754 && ! IDENT_CHAR ((unsigned char) src[3])) 755 { 756 *mode = A_SPC; 757 return 3; 758 } 759 760 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' 761 && ! IDENT_CHAR ((unsigned char) src[3])) 762 { 763 *mode = A_SGR; 764 return 3; 765 } 766 767 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' 768 && ! IDENT_CHAR ((unsigned char) src[3])) 769 { 770 *mode = A_DSR; 771 return 3; 772 } 773 774 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' 775 && ! IDENT_CHAR ((unsigned char) src[3])) 776 { 777 *mode = A_DBR; 778 return 3; 779 } 780 781 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 782 { 783 *mode = A_SR; 784 return 2; 785 } 786 787 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) 788 { 789 *mode = A_REG_N; 790 *reg = 15; 791 return 2; 792 } 793 794 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 795 { 796 *mode = A_PR; 797 return 2; 798 } 799 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) 800 { 801 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' 802 and use an uninitialized immediate. */ 803 *mode = A_PC; 804 return 2; 805 } 806 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' 807 && ! IDENT_CHAR ((unsigned char) src[3])) 808 { 809 *mode = A_GBR; 810 return 3; 811 } 812 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' 813 && ! IDENT_CHAR ((unsigned char) src[3])) 814 { 815 *mode = A_VBR; 816 return 3; 817 } 818 819 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' 820 && ! IDENT_CHAR ((unsigned char) src[3])) 821 { 822 *mode = A_TBR; 823 return 3; 824 } 825 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' 826 && ! IDENT_CHAR ((unsigned char) src[4])) 827 { 828 if (TOLOWER (src[3]) == 'l') 829 { 830 *mode = A_MACL; 831 return 4; 832 } 833 if (TOLOWER (src[3]) == 'h') 834 { 835 *mode = A_MACH; 836 return 4; 837 } 838 } 839 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' 840 && ! IDENT_CHAR ((unsigned char) src[3])) 841 { 842 *mode = A_MOD; 843 return 3; 844 } 845 if (l0 == 'f' && l1 == 'r') 846 { 847 if (src[2] == '1') 848 { 849 if (src[3] >= '0' && src[3] <= '5' 850 && ! IDENT_CHAR ((unsigned char) src[4])) 851 { 852 *mode = F_REG_N; 853 *reg = 10 + src[3] - '0'; 854 return 4; 855 } 856 } 857 if (src[2] >= '0' && src[2] <= '9' 858 && ! IDENT_CHAR ((unsigned char) src[3])) 859 { 860 *mode = F_REG_N; 861 *reg = (src[2] - '0'); 862 return 3; 863 } 864 } 865 if (l0 == 'd' && l1 == 'r') 866 { 867 if (src[2] == '1') 868 { 869 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 870 && ! IDENT_CHAR ((unsigned char) src[4])) 871 { 872 *mode = D_REG_N; 873 *reg = 10 + src[3] - '0'; 874 return 4; 875 } 876 } 877 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 878 && ! IDENT_CHAR ((unsigned char) src[3])) 879 { 880 *mode = D_REG_N; 881 *reg = (src[2] - '0'); 882 return 3; 883 } 884 } 885 if (l0 == 'x' && l1 == 'd') 886 { 887 if (src[2] == '1') 888 { 889 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 890 && ! IDENT_CHAR ((unsigned char) src[4])) 891 { 892 *mode = X_REG_N; 893 *reg = 11 + src[3] - '0'; 894 return 4; 895 } 896 } 897 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 898 && ! IDENT_CHAR ((unsigned char) src[3])) 899 { 900 *mode = X_REG_N; 901 *reg = (src[2] - '0') + 1; 902 return 3; 903 } 904 } 905 if (l0 == 'f' && l1 == 'v') 906 { 907 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) 908 { 909 *mode = V_REG_N; 910 *reg = 12; 911 return 4; 912 } 913 if ((src[2] == '0' || src[2] == '4' || src[2] == '8') 914 && ! IDENT_CHAR ((unsigned char) src[3])) 915 { 916 *mode = V_REG_N; 917 *reg = (src[2] - '0'); 918 return 3; 919 } 920 } 921 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' 922 && TOLOWER (src[3]) == 'l' 923 && ! IDENT_CHAR ((unsigned char) src[4])) 924 { 925 *mode = FPUL_N; 926 return 4; 927 } 928 929 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' 930 && TOLOWER (src[3]) == 'c' 931 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) 932 { 933 *mode = FPSCR_N; 934 return 5; 935 } 936 937 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' 938 && TOLOWER (src[3]) == 'r' 939 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) 940 { 941 *mode = XMTRX_M4; 942 return 5; 943 } 944 945 return 0; 946} 947 948/* Like parse_reg_without_prefix, but this version supports 949 $-prefixed register names if enabled by the user. */ 950 951static unsigned int 952parse_reg (char *src, sh_arg_type *mode, int *reg) 953{ 954 unsigned int prefix; 955 unsigned int consumed; 956 957 if (src[0] == '$') 958 { 959 if (allow_dollar_register_prefix) 960 { 961 src ++; 962 prefix = 1; 963 } 964 else 965 return 0; 966 } 967 else 968 prefix = 0; 969 970 consumed = parse_reg_without_prefix (src, mode, reg); 971 972 if (consumed == 0) 973 return 0; 974 975 return consumed + prefix; 976} 977 978static char * 979parse_exp (char *s, sh_operand_info *op) 980{ 981 char *save; 982 char *new_pointer; 983 984 save = input_line_pointer; 985 input_line_pointer = s; 986 expression (&op->immediate); 987 if (op->immediate.X_op == O_absent) 988 as_bad (_("missing operand")); 989 new_pointer = input_line_pointer; 990 input_line_pointer = save; 991 return new_pointer; 992} 993 994/* The many forms of operand: 995 996 Rn Register direct 997 @Rn Register indirect 998 @Rn+ Autoincrement 999 @-Rn Autodecrement 1000 @(disp:4,Rn) 1001 @(disp:8,GBR) 1002 @(disp:8,PC) 1003 1004 @(R0,Rn) 1005 @(R0,GBR) 1006 1007 disp:8 1008 disp:12 1009 #imm8 1010 pr, gbr, vbr, macl, mach 1011 */ 1012 1013static char * 1014parse_at (char *src, sh_operand_info *op) 1015{ 1016 int len; 1017 sh_arg_type mode; 1018 src++; 1019 if (src[0] == '@') 1020 { 1021 src = parse_at (src, op); 1022 if (op->type == A_DISP_TBR) 1023 op->type = A_DISP2_TBR; 1024 else 1025 as_bad (_("illegal double indirection")); 1026 } 1027 else if (src[0] == '-') 1028 { 1029 /* Must be predecrement. */ 1030 src++; 1031 1032 len = parse_reg (src, &mode, &(op->reg)); 1033 if (mode != A_REG_N) 1034 as_bad (_("illegal register after @-")); 1035 1036 op->type = A_DEC_N; 1037 src += len; 1038 } 1039 else if (src[0] == '(') 1040 { 1041 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or 1042 @(r0, rn). */ 1043 src++; 1044 len = parse_reg (src, &mode, &(op->reg)); 1045 if (len && mode == A_REG_N) 1046 { 1047 src += len; 1048 if (op->reg != 0) 1049 { 1050 as_bad (_("must be @(r0,...)")); 1051 } 1052 if (src[0] == ',') 1053 { 1054 src++; 1055 /* Now can be rn or gbr. */ 1056 len = parse_reg (src, &mode, &(op->reg)); 1057 } 1058 else 1059 { 1060 len = 0; 1061 } 1062 if (len) 1063 { 1064 if (mode == A_GBR) 1065 { 1066 op->type = A_R0_GBR; 1067 } 1068 else if (mode == A_REG_N) 1069 { 1070 op->type = A_IND_R0_REG_N; 1071 } 1072 else 1073 { 1074 as_bad (_("syntax error in @(r0,...)")); 1075 } 1076 } 1077 else 1078 { 1079 as_bad (_("syntax error in @(r0...)")); 1080 } 1081 } 1082 else 1083 { 1084 /* Must be an @(disp,.. thing). */ 1085 src = parse_exp (src, op); 1086 if (src[0] == ',') 1087 src++; 1088 /* Now can be rn, gbr or pc. */ 1089 len = parse_reg (src, &mode, &op->reg); 1090 if (len) 1091 { 1092 if (mode == A_REG_N) 1093 { 1094 op->type = A_DISP_REG_N; 1095 } 1096 else if (mode == A_GBR) 1097 { 1098 op->type = A_DISP_GBR; 1099 } 1100 else if (mode == A_TBR) 1101 { 1102 op->type = A_DISP_TBR; 1103 } 1104 else if (mode == A_PC) 1105 { 1106 /* We want @(expr, pc) to uniformly address . + expr, 1107 no matter if expr is a constant, or a more complex 1108 expression, e.g. sym-. or sym1-sym2. 1109 However, we also used to accept @(sym,pc) 1110 as addressing sym, i.e. meaning the same as plain sym. 1111 Some existing code does use the @(sym,pc) syntax, so 1112 we give it the old semantics for now, but warn about 1113 its use, so that users have some time to fix their code. 1114 1115 Note that due to this backward compatibility hack, 1116 we'll get unexpected results when @(offset, pc) is used, 1117 and offset is a symbol that is set later to an an address 1118 difference, or an external symbol that is set to an 1119 address difference in another source file, so we want to 1120 eventually remove it. */ 1121 if (op->immediate.X_op == O_symbol) 1122 { 1123 op->type = A_DISP_PC; 1124 as_warn (_("Deprecated syntax.")); 1125 } 1126 else 1127 { 1128 op->type = A_DISP_PC_ABS; 1129 /* Such operands don't get corrected for PC==.+4, so 1130 make the correction here. */ 1131 op->immediate.X_add_number -= 4; 1132 } 1133 } 1134 else 1135 { 1136 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1137 } 1138 } 1139 else 1140 { 1141 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1142 } 1143 } 1144 src += len; 1145 if (src[0] != ')') 1146 as_bad (_("expecting )")); 1147 else 1148 src++; 1149 } 1150 else 1151 { 1152 src += parse_reg (src, &mode, &(op->reg)); 1153 if (mode != A_REG_N) 1154 as_bad (_("illegal register after @")); 1155 1156 if (src[0] == '+') 1157 { 1158 char l0, l1; 1159 1160 src++; 1161 l0 = TOLOWER (src[0]); 1162 l1 = TOLOWER (src[1]); 1163 1164 if ((l0 == 'r' && l1 == '8') 1165 || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) 1166 { 1167 src += 2; 1168 op->type = AX_PMOD_N; 1169 } 1170 else if ( (l0 == 'r' && l1 == '9') 1171 || (l0 == 'i' && l1 == 'y')) 1172 { 1173 src += 2; 1174 op->type = AY_PMOD_N; 1175 } 1176 else 1177 op->type = A_INC_N; 1178 } 1179 else 1180 op->type = A_IND_N; 1181 } 1182 return src; 1183} 1184 1185static void 1186get_operand (char **ptr, sh_operand_info *op) 1187{ 1188 char *src = *ptr; 1189 sh_arg_type mode = (sh_arg_type) -1; 1190 unsigned int len; 1191 1192 if (src[0] == '#') 1193 { 1194 src++; 1195 *ptr = parse_exp (src, op); 1196 op->type = A_IMM; 1197 return; 1198 } 1199 1200 else if (src[0] == '@') 1201 { 1202 *ptr = parse_at (src, op); 1203 return; 1204 } 1205 len = parse_reg (src, &mode, &(op->reg)); 1206 if (len) 1207 { 1208 *ptr = src + len; 1209 op->type = mode; 1210 return; 1211 } 1212 else 1213 { 1214 /* Not a reg, the only thing left is a displacement. */ 1215 *ptr = parse_exp (src, op); 1216 op->type = A_DISP_PC; 1217 return; 1218 } 1219} 1220 1221static char * 1222get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) 1223{ 1224 char *ptr = args; 1225 if (info->arg[0]) 1226 { 1227 /* The pre-processor will eliminate whitespace in front of '@' 1228 after the first argument; we may be called multiple times 1229 from assemble_ppi, so don't insist on finding whitespace here. */ 1230 if (*ptr == ' ') 1231 ptr++; 1232 1233 get_operand (&ptr, operand + 0); 1234 if (info->arg[1]) 1235 { 1236 if (*ptr == ',') 1237 { 1238 ptr++; 1239 } 1240 get_operand (&ptr, operand + 1); 1241 /* ??? Hack: psha/pshl have a varying operand number depending on 1242 the type of the first operand. We handle this by having the 1243 three-operand version first and reducing the number of operands 1244 parsed to two if we see that the first operand is an immediate. 1245 This works because no insn with three operands has an immediate 1246 as first operand. */ 1247 if (info->arg[2] && operand[0].type != A_IMM) 1248 { 1249 if (*ptr == ',') 1250 { 1251 ptr++; 1252 } 1253 get_operand (&ptr, operand + 2); 1254 } 1255 else 1256 { 1257 operand[2].type = 0; 1258 } 1259 } 1260 else 1261 { 1262 operand[1].type = 0; 1263 operand[2].type = 0; 1264 } 1265 } 1266 else 1267 { 1268 operand[0].type = 0; 1269 operand[1].type = 0; 1270 operand[2].type = 0; 1271 } 1272 return ptr; 1273} 1274 1275/* Passed a pointer to a list of opcodes which use different 1276 addressing modes, return the opcode which matches the opcodes 1277 provided. */ 1278 1279static sh_opcode_info * 1280get_specific (sh_opcode_info *opcode, sh_operand_info *operands) 1281{ 1282 sh_opcode_info *this_try = opcode; 1283 const char *name = opcode->name; 1284 int n = 0; 1285 1286 while (opcode->name) 1287 { 1288 this_try = opcode++; 1289 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) 1290 { 1291 /* We've looked so far down the table that we've run out of 1292 opcodes with the same name. */ 1293 return 0; 1294 } 1295 1296 /* Look at both operands needed by the opcodes and provided by 1297 the user - since an arg test will often fail on the same arg 1298 again and again, we'll try and test the last failing arg the 1299 first on each opcode try. */ 1300 for (n = 0; this_try->arg[n]; n++) 1301 { 1302 sh_operand_info *user = operands + n; 1303 sh_arg_type arg = this_try->arg[n]; 1304 1305 switch (arg) 1306 { 1307 case A_DISP_PC: 1308 if (user->type == A_DISP_PC_ABS) 1309 break; 1310 /* Fall through. */ 1311 case A_IMM: 1312 case A_BDISP12: 1313 case A_BDISP8: 1314 case A_DISP_GBR: 1315 case A_DISP2_TBR: 1316 case A_MACH: 1317 case A_PR: 1318 case A_MACL: 1319 if (user->type != arg) 1320 goto fail; 1321 break; 1322 case A_R0: 1323 /* opcode needs r0 */ 1324 if (user->type != A_REG_N || user->reg != 0) 1325 goto fail; 1326 break; 1327 case A_R0_GBR: 1328 if (user->type != A_R0_GBR || user->reg != 0) 1329 goto fail; 1330 break; 1331 case F_FR0: 1332 if (user->type != F_REG_N || user->reg != 0) 1333 goto fail; 1334 break; 1335 1336 case A_REG_N: 1337 case A_INC_N: 1338 case A_DEC_N: 1339 case A_IND_N: 1340 case A_IND_R0_REG_N: 1341 case A_DISP_REG_N: 1342 case F_REG_N: 1343 case D_REG_N: 1344 case X_REG_N: 1345 case V_REG_N: 1346 case FPUL_N: 1347 case FPSCR_N: 1348 case DSP_REG_N: 1349 /* Opcode needs rn */ 1350 if (user->type != arg) 1351 goto fail; 1352 reg_n = user->reg; 1353 break; 1354 case DX_REG_N: 1355 if (user->type != D_REG_N && user->type != X_REG_N) 1356 goto fail; 1357 reg_n = user->reg; 1358 break; 1359 case A_GBR: 1360 case A_TBR: 1361 case A_SR: 1362 case A_VBR: 1363 case A_DSR: 1364 case A_MOD: 1365 case A_RE: 1366 case A_RS: 1367 case A_SSR: 1368 case A_SPC: 1369 case A_SGR: 1370 case A_DBR: 1371 if (user->type != arg) 1372 goto fail; 1373 break; 1374 1375 case A_REG_B: 1376 if (user->type != arg) 1377 goto fail; 1378 reg_b = user->reg; 1379 break; 1380 1381 case A_INC_R15: 1382 if (user->type != A_INC_N) 1383 goto fail; 1384 if (user->reg != 15) 1385 goto fail; 1386 reg_n = user->reg; 1387 break; 1388 1389 case A_DEC_R15: 1390 if (user->type != A_DEC_N) 1391 goto fail; 1392 if (user->reg != 15) 1393 goto fail; 1394 reg_n = user->reg; 1395 break; 1396 1397 case A_REG_M: 1398 case A_INC_M: 1399 case A_DEC_M: 1400 case A_IND_M: 1401 case A_IND_R0_REG_M: 1402 case A_DISP_REG_M: 1403 case DSP_REG_M: 1404 /* Opcode needs rn */ 1405 if (user->type != arg - A_REG_M + A_REG_N) 1406 goto fail; 1407 reg_m = user->reg; 1408 break; 1409 1410 case AS_DEC_N: 1411 if (user->type != A_DEC_N) 1412 goto fail; 1413 if (user->reg < 2 || user->reg > 5) 1414 goto fail; 1415 reg_n = user->reg; 1416 break; 1417 1418 case AS_INC_N: 1419 if (user->type != A_INC_N) 1420 goto fail; 1421 if (user->reg < 2 || user->reg > 5) 1422 goto fail; 1423 reg_n = user->reg; 1424 break; 1425 1426 case AS_IND_N: 1427 if (user->type != A_IND_N) 1428 goto fail; 1429 if (user->reg < 2 || user->reg > 5) 1430 goto fail; 1431 reg_n = user->reg; 1432 break; 1433 1434 case AS_PMOD_N: 1435 if (user->type != AX_PMOD_N) 1436 goto fail; 1437 if (user->reg < 2 || user->reg > 5) 1438 goto fail; 1439 reg_n = user->reg; 1440 break; 1441 1442 case AX_INC_N: 1443 if (user->type != A_INC_N) 1444 goto fail; 1445 if (user->reg < 4 || user->reg > 5) 1446 goto fail; 1447 reg_n = user->reg; 1448 break; 1449 1450 case AX_IND_N: 1451 if (user->type != A_IND_N) 1452 goto fail; 1453 if (user->reg < 4 || user->reg > 5) 1454 goto fail; 1455 reg_n = user->reg; 1456 break; 1457 1458 case AX_PMOD_N: 1459 if (user->type != AX_PMOD_N) 1460 goto fail; 1461 if (user->reg < 4 || user->reg > 5) 1462 goto fail; 1463 reg_n = user->reg; 1464 break; 1465 1466 case AXY_INC_N: 1467 if (user->type != A_INC_N) 1468 goto fail; 1469 if ((user->reg < 4 || user->reg > 5) 1470 && (user->reg < 0 || user->reg > 1)) 1471 goto fail; 1472 reg_n = user->reg; 1473 break; 1474 1475 case AXY_IND_N: 1476 if (user->type != A_IND_N) 1477 goto fail; 1478 if ((user->reg < 4 || user->reg > 5) 1479 && (user->reg < 0 || user->reg > 1)) 1480 goto fail; 1481 reg_n = user->reg; 1482 break; 1483 1484 case AXY_PMOD_N: 1485 if (user->type != AX_PMOD_N) 1486 goto fail; 1487 if ((user->reg < 4 || user->reg > 5) 1488 && (user->reg < 0 || user->reg > 1)) 1489 goto fail; 1490 reg_n = user->reg; 1491 break; 1492 1493 case AY_INC_N: 1494 if (user->type != A_INC_N) 1495 goto fail; 1496 if (user->reg < 6 || user->reg > 7) 1497 goto fail; 1498 reg_n = user->reg; 1499 break; 1500 1501 case AY_IND_N: 1502 if (user->type != A_IND_N) 1503 goto fail; 1504 if (user->reg < 6 || user->reg > 7) 1505 goto fail; 1506 reg_n = user->reg; 1507 break; 1508 1509 case AY_PMOD_N: 1510 if (user->type != AY_PMOD_N) 1511 goto fail; 1512 if (user->reg < 6 || user->reg > 7) 1513 goto fail; 1514 reg_n = user->reg; 1515 break; 1516 1517 case AYX_INC_N: 1518 if (user->type != A_INC_N) 1519 goto fail; 1520 if ((user->reg < 6 || user->reg > 7) 1521 && (user->reg < 2 || user->reg > 3)) 1522 goto fail; 1523 reg_n = user->reg; 1524 break; 1525 1526 case AYX_IND_N: 1527 if (user->type != A_IND_N) 1528 goto fail; 1529 if ((user->reg < 6 || user->reg > 7) 1530 && (user->reg < 2 || user->reg > 3)) 1531 goto fail; 1532 reg_n = user->reg; 1533 break; 1534 1535 case AYX_PMOD_N: 1536 if (user->type != AY_PMOD_N) 1537 goto fail; 1538 if ((user->reg < 6 || user->reg > 7) 1539 && (user->reg < 2 || user->reg > 3)) 1540 goto fail; 1541 reg_n = user->reg; 1542 break; 1543 1544 case DSP_REG_A_M: 1545 if (user->type != DSP_REG_N) 1546 goto fail; 1547 if (user->reg != A_A0_NUM 1548 && user->reg != A_A1_NUM) 1549 goto fail; 1550 reg_m = user->reg; 1551 break; 1552 1553 case DSP_REG_AX: 1554 if (user->type != DSP_REG_N) 1555 goto fail; 1556 switch (user->reg) 1557 { 1558 case A_A0_NUM: 1559 reg_x = 0; 1560 break; 1561 case A_A1_NUM: 1562 reg_x = 2; 1563 break; 1564 case A_X0_NUM: 1565 reg_x = 1; 1566 break; 1567 case A_X1_NUM: 1568 reg_x = 3; 1569 break; 1570 default: 1571 goto fail; 1572 } 1573 break; 1574 1575 case DSP_REG_XY: 1576 if (user->type != DSP_REG_N) 1577 goto fail; 1578 switch (user->reg) 1579 { 1580 case A_X0_NUM: 1581 reg_x = 0; 1582 break; 1583 case A_X1_NUM: 1584 reg_x = 2; 1585 break; 1586 case A_Y0_NUM: 1587 reg_x = 1; 1588 break; 1589 case A_Y1_NUM: 1590 reg_x = 3; 1591 break; 1592 default: 1593 goto fail; 1594 } 1595 break; 1596 1597 case DSP_REG_AY: 1598 if (user->type != DSP_REG_N) 1599 goto fail; 1600 switch (user->reg) 1601 { 1602 case A_A0_NUM: 1603 reg_y = 0; 1604 break; 1605 case A_A1_NUM: 1606 reg_y = 1; 1607 break; 1608 case A_Y0_NUM: 1609 reg_y = 2; 1610 break; 1611 case A_Y1_NUM: 1612 reg_y = 3; 1613 break; 1614 default: 1615 goto fail; 1616 } 1617 break; 1618 1619 case DSP_REG_YX: 1620 if (user->type != DSP_REG_N) 1621 goto fail; 1622 switch (user->reg) 1623 { 1624 case A_Y0_NUM: 1625 reg_y = 0; 1626 break; 1627 case A_Y1_NUM: 1628 reg_y = 1; 1629 break; 1630 case A_X0_NUM: 1631 reg_y = 2; 1632 break; 1633 case A_X1_NUM: 1634 reg_y = 3; 1635 break; 1636 default: 1637 goto fail; 1638 } 1639 break; 1640 1641 case DSP_REG_X: 1642 if (user->type != DSP_REG_N) 1643 goto fail; 1644 switch (user->reg) 1645 { 1646 case A_X0_NUM: 1647 reg_x = 0; 1648 break; 1649 case A_X1_NUM: 1650 reg_x = 1; 1651 break; 1652 case A_A0_NUM: 1653 reg_x = 2; 1654 break; 1655 case A_A1_NUM: 1656 reg_x = 3; 1657 break; 1658 default: 1659 goto fail; 1660 } 1661 break; 1662 1663 case DSP_REG_Y: 1664 if (user->type != DSP_REG_N) 1665 goto fail; 1666 switch (user->reg) 1667 { 1668 case A_Y0_NUM: 1669 reg_y = 0; 1670 break; 1671 case A_Y1_NUM: 1672 reg_y = 1; 1673 break; 1674 case A_M0_NUM: 1675 reg_y = 2; 1676 break; 1677 case A_M1_NUM: 1678 reg_y = 3; 1679 break; 1680 default: 1681 goto fail; 1682 } 1683 break; 1684 1685 case DSP_REG_E: 1686 if (user->type != DSP_REG_N) 1687 goto fail; 1688 switch (user->reg) 1689 { 1690 case A_X0_NUM: 1691 reg_efg = 0 << 10; 1692 break; 1693 case A_X1_NUM: 1694 reg_efg = 1 << 10; 1695 break; 1696 case A_Y0_NUM: 1697 reg_efg = 2 << 10; 1698 break; 1699 case A_A1_NUM: 1700 reg_efg = 3 << 10; 1701 break; 1702 default: 1703 goto fail; 1704 } 1705 break; 1706 1707 case DSP_REG_F: 1708 if (user->type != DSP_REG_N) 1709 goto fail; 1710 switch (user->reg) 1711 { 1712 case A_Y0_NUM: 1713 reg_efg |= 0 << 8; 1714 break; 1715 case A_Y1_NUM: 1716 reg_efg |= 1 << 8; 1717 break; 1718 case A_X0_NUM: 1719 reg_efg |= 2 << 8; 1720 break; 1721 case A_A1_NUM: 1722 reg_efg |= 3 << 8; 1723 break; 1724 default: 1725 goto fail; 1726 } 1727 break; 1728 1729 case DSP_REG_G: 1730 if (user->type != DSP_REG_N) 1731 goto fail; 1732 switch (user->reg) 1733 { 1734 case A_M0_NUM: 1735 reg_efg |= 0 << 2; 1736 break; 1737 case A_M1_NUM: 1738 reg_efg |= 1 << 2; 1739 break; 1740 case A_A0_NUM: 1741 reg_efg |= 2 << 2; 1742 break; 1743 case A_A1_NUM: 1744 reg_efg |= 3 << 2; 1745 break; 1746 default: 1747 goto fail; 1748 } 1749 break; 1750 1751 case A_A0: 1752 if (user->type != DSP_REG_N || user->reg != A_A0_NUM) 1753 goto fail; 1754 break; 1755 case A_X0: 1756 if (user->type != DSP_REG_N || user->reg != A_X0_NUM) 1757 goto fail; 1758 break; 1759 case A_X1: 1760 if (user->type != DSP_REG_N || user->reg != A_X1_NUM) 1761 goto fail; 1762 break; 1763 case A_Y0: 1764 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) 1765 goto fail; 1766 break; 1767 case A_Y1: 1768 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) 1769 goto fail; 1770 break; 1771 1772 case F_REG_M: 1773 case D_REG_M: 1774 case X_REG_M: 1775 case V_REG_M: 1776 case FPUL_M: 1777 case FPSCR_M: 1778 /* Opcode needs rn */ 1779 if (user->type != arg - F_REG_M + F_REG_N) 1780 goto fail; 1781 reg_m = user->reg; 1782 break; 1783 case DX_REG_M: 1784 if (user->type != D_REG_N && user->type != X_REG_N) 1785 goto fail; 1786 reg_m = user->reg; 1787 break; 1788 case XMTRX_M4: 1789 if (user->type != XMTRX_M4) 1790 goto fail; 1791 reg_m = 4; 1792 break; 1793 1794 default: 1795 printf (_("unhandled %d\n"), arg); 1796 goto fail; 1797 } 1798 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) 1799 && ( arg == A_DISP_REG_M 1800 || arg == A_DISP_REG_N)) 1801 { 1802 /* Check a few key IMM* fields for overflow. */ 1803 int opf; 1804 long val = user->immediate.X_add_number; 1805 1806 for (opf = 0; opf < 4; opf ++) 1807 switch (this_try->nibbles[opf]) 1808 { 1809 case IMM0_4: 1810 case IMM1_4: 1811 if (val < 0 || val > 15) 1812 goto fail; 1813 break; 1814 case IMM0_4BY2: 1815 case IMM1_4BY2: 1816 if (val < 0 || val > 15 * 2) 1817 goto fail; 1818 break; 1819 case IMM0_4BY4: 1820 case IMM1_4BY4: 1821 if (val < 0 || val > 15 * 4) 1822 goto fail; 1823 break; 1824 default: 1825 break; 1826 } 1827 } 1828 } 1829 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) 1830 goto fail; 1831 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); 1832 return this_try; 1833 fail: 1834 ; 1835 } 1836 1837 return 0; 1838} 1839 1840static void 1841insert (char *where, bfd_reloc_code_real_type how, int pcrel, 1842 sh_operand_info *op) 1843{ 1844 fix_new_exp (frag_now, 1845 where - frag_now->fr_literal, 1846 2, 1847 &op->immediate, 1848 pcrel, 1849 how); 1850} 1851 1852static void 1853insert4 (char * where, bfd_reloc_code_real_type how, int pcrel, 1854 sh_operand_info * op) 1855{ 1856 fix_new_exp (frag_now, 1857 where - frag_now->fr_literal, 1858 4, 1859 & op->immediate, 1860 pcrel, 1861 how); 1862} 1863static void 1864build_relax (sh_opcode_info *opcode, sh_operand_info *op) 1865{ 1866 int high_byte = target_big_endian ? 0 : 1; 1867 char *p; 1868 1869 if (opcode->arg[0] == A_BDISP8) 1870 { 1871 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; 1872 p = frag_var (rs_machine_dependent, 1873 md_relax_table[C (what, COND32)].rlx_length, 1874 md_relax_table[C (what, COND8)].rlx_length, 1875 C (what, 0), 1876 op->immediate.X_add_symbol, 1877 op->immediate.X_add_number, 1878 0); 1879 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); 1880 } 1881 else if (opcode->arg[0] == A_BDISP12) 1882 { 1883 p = frag_var (rs_machine_dependent, 1884 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, 1885 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, 1886 C (UNCOND_JUMP, 0), 1887 op->immediate.X_add_symbol, 1888 op->immediate.X_add_number, 1889 0); 1890 p[high_byte] = (opcode->nibbles[0] << 4); 1891 } 1892 1893} 1894 1895/* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ 1896 1897static char * 1898insert_loop_bounds (char *output, sh_operand_info *operand) 1899{ 1900 symbolS *end_sym; 1901 1902 /* Since the low byte of the opcode will be overwritten by the reloc, we 1903 can just stash the high byte into both bytes and ignore endianness. */ 1904 output[0] = 0x8c; 1905 output[1] = 0x8c; 1906 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 1907 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 1908 1909 if (sh_relax) 1910 { 1911 static int count = 0; 1912 char name[11]; 1913 expressionS *symval; 1914 1915 /* If the last loop insn is a two-byte-insn, it is in danger of being 1916 swapped with the insn after it. To prevent this, create a new 1917 symbol - complete with SH_LABEL reloc - after the last loop insn. 1918 If the last loop insn is four bytes long, the symbol will be 1919 right in the middle, but four byte insns are not swapped anyways. */ 1920 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. 1921 Hence a 9 digit number should be enough to count all REPEATs. */ 1922 sprintf (name, "_R%x", count++ & 0x3fffffff); 1923 end_sym = symbol_new (name, undefined_section, &zero_address_frag, 0); 1924 /* Make this a local symbol. */ 1925#ifdef OBJ_COFF 1926 SF_SET_LOCAL (end_sym); 1927#endif /* OBJ_COFF */ 1928 symbol_table_insert (end_sym); 1929 symval = symbol_get_value_expression (end_sym); 1930 *symval = operand[1].immediate; 1931 symval->X_add_number += 2; 1932 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); 1933 } 1934 1935 output = frag_more (2); 1936 output[0] = 0x8e; 1937 output[1] = 0x8e; 1938 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 1939 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 1940 1941 return frag_more (2); 1942} 1943 1944/* Now we know what sort of opcodes it is, let's build the bytes. */ 1945 1946static unsigned int 1947build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) 1948{ 1949 int indx; 1950 char nbuf[8]; 1951 char *output; 1952 unsigned int size = 2; 1953 int low_byte = target_big_endian ? 1 : 0; 1954 int max_index = 4; 1955 bfd_reloc_code_real_type r_type; 1956#ifdef OBJ_ELF 1957 int unhandled_pic = 0; 1958#endif 1959 1960 nbuf[0] = 0; 1961 nbuf[1] = 0; 1962 nbuf[2] = 0; 1963 nbuf[3] = 0; 1964 nbuf[4] = 0; 1965 nbuf[5] = 0; 1966 nbuf[6] = 0; 1967 nbuf[7] = 0; 1968 1969#ifdef OBJ_ELF 1970 for (indx = 0; indx < 3; indx++) 1971 if (opcode->arg[indx] == A_IMM 1972 && operand[indx].type == A_IMM 1973 && (operand[indx].immediate.X_op == O_PIC_reloc 1974 || sh_PIC_related_p (operand[indx].immediate.X_add_symbol) 1975 || sh_PIC_related_p (operand[indx].immediate.X_op_symbol))) 1976 unhandled_pic = 1; 1977#endif 1978 1979 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 1980 { 1981 output = frag_more (4); 1982 size = 4; 1983 max_index = 8; 1984 } 1985 else 1986 output = frag_more (2); 1987 1988 for (indx = 0; indx < max_index; indx++) 1989 { 1990 sh_nibble_type i = opcode->nibbles[indx]; 1991 if (i < 16) 1992 { 1993 nbuf[indx] = i; 1994 } 1995 else 1996 { 1997 switch (i) 1998 { 1999 case REG_N: 2000 case REG_N_D: 2001 nbuf[indx] = reg_n; 2002 break; 2003 case REG_M: 2004 nbuf[indx] = reg_m; 2005 break; 2006 case SDT_REG_N: 2007 if (reg_n < 2 || reg_n > 5) 2008 as_bad (_("Invalid register: 'r%d'"), reg_n); 2009 nbuf[indx] = (reg_n & 3) | 4; 2010 break; 2011 case REG_NM: 2012 nbuf[indx] = reg_n | (reg_m >> 2); 2013 break; 2014 case REG_B: 2015 nbuf[indx] = reg_b | 0x08; 2016 break; 2017 case REG_N_B01: 2018 nbuf[indx] = reg_n | 0x01; 2019 break; 2020 case IMM0_3s: 2021 nbuf[indx] |= 0x08; 2022 /* Fall through. */ 2023 case IMM0_3c: 2024 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); 2025 break; 2026 case IMM0_3Us: 2027 nbuf[indx] |= 0x80; 2028 /* Fall through. */ 2029 case IMM0_3Uc: 2030 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); 2031 break; 2032 case DISP0_12: 2033 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); 2034 break; 2035 case DISP0_12BY2: 2036 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); 2037 break; 2038 case DISP0_12BY4: 2039 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); 2040 break; 2041 case DISP0_12BY8: 2042 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); 2043 break; 2044 case DISP1_12: 2045 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); 2046 break; 2047 case DISP1_12BY2: 2048 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); 2049 break; 2050 case DISP1_12BY4: 2051 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); 2052 break; 2053 case DISP1_12BY8: 2054 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); 2055 break; 2056 case IMM0_20_4: 2057 break; 2058 case IMM0_20: 2059 r_type = BFD_RELOC_SH_DISP20; 2060#ifdef OBJ_ELF 2061 if (sh_check_fixup (&operand->immediate, &r_type)) 2062 as_bad (_("Invalid PIC expression.")); 2063 unhandled_pic = 0; 2064#endif 2065 insert4 (output, r_type, 0, operand); 2066 break; 2067 case IMM0_20BY8: 2068 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); 2069 break; 2070 case IMM0_4BY4: 2071 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); 2072 break; 2073 case IMM0_4BY2: 2074 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); 2075 break; 2076 case IMM0_4: 2077 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); 2078 break; 2079 case IMM1_4BY4: 2080 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); 2081 break; 2082 case IMM1_4BY2: 2083 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); 2084 break; 2085 case IMM1_4: 2086 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); 2087 break; 2088 case IMM0_8BY4: 2089 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); 2090 break; 2091 case IMM0_8BY2: 2092 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); 2093 break; 2094 case IMM0_8U: 2095 case IMM0_8S: 2096 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); 2097 break; 2098 case IMM1_8BY4: 2099 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); 2100 break; 2101 case IMM1_8BY2: 2102 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); 2103 break; 2104 case IMM1_8: 2105 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); 2106 break; 2107 case PCRELIMM_8BY4: 2108 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 2109 operand->type != A_DISP_PC_ABS, operand); 2110 break; 2111 case PCRELIMM_8BY2: 2112 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 2113 operand->type != A_DISP_PC_ABS, operand); 2114 break; 2115 case REPEAT: 2116 output = insert_loop_bounds (output, operand); 2117 nbuf[indx] = opcode->nibbles[3]; 2118 operand += 2; 2119 break; 2120 default: 2121 printf (_("failed for %d\n"), i); 2122 } 2123 } 2124 } 2125#ifdef OBJ_ELF 2126 if (unhandled_pic) 2127 as_bad (_("misplaced PIC operand")); 2128#endif 2129 if (!target_big_endian) 2130 { 2131 output[1] = (nbuf[0] << 4) | (nbuf[1]); 2132 output[0] = (nbuf[2] << 4) | (nbuf[3]); 2133 } 2134 else 2135 { 2136 output[0] = (nbuf[0] << 4) | (nbuf[1]); 2137 output[1] = (nbuf[2] << 4) | (nbuf[3]); 2138 } 2139 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2140 { 2141 if (!target_big_endian) 2142 { 2143 output[3] = (nbuf[4] << 4) | (nbuf[5]); 2144 output[2] = (nbuf[6] << 4) | (nbuf[7]); 2145 } 2146 else 2147 { 2148 output[2] = (nbuf[4] << 4) | (nbuf[5]); 2149 output[3] = (nbuf[6] << 4) | (nbuf[7]); 2150 } 2151 } 2152 return size; 2153} 2154 2155/* Find an opcode at the start of *STR_P in the hash table, and set 2156 *STR_P to the first character after the last one read. */ 2157 2158static sh_opcode_info * 2159find_cooked_opcode (char **str_p) 2160{ 2161 char *str = *str_p; 2162 unsigned char *op_start; 2163 unsigned char *op_end; 2164 char name[20]; 2165 unsigned int nlen = 0; 2166 2167 /* Drop leading whitespace. */ 2168 while (*str == ' ') 2169 str++; 2170 2171 /* Find the op code end. 2172 The pre-processor will eliminate whitespace in front of 2173 any '@' after the first argument; we may be called from 2174 assemble_ppi, so the opcode might be terminated by an '@'. */ 2175 for (op_start = op_end = (unsigned char *) str; 2176 *op_end 2177 && nlen < sizeof (name) - 1 2178 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; 2179 op_end++) 2180 { 2181 unsigned char c = op_start[nlen]; 2182 2183 /* The machine independent code will convert CMP/EQ into cmp/EQ 2184 because it thinks the '/' is the end of the symbol. Moreover, 2185 all but the first sub-insn is a parallel processing insn won't 2186 be capitalized. Instead of hacking up the machine independent 2187 code, we just deal with it here. */ 2188 c = TOLOWER (c); 2189 name[nlen] = c; 2190 nlen++; 2191 } 2192 2193 name[nlen] = 0; 2194 *str_p = (char *) op_end; 2195 2196 if (nlen == 0) 2197 as_bad (_("can't find opcode ")); 2198 2199 return (sh_opcode_info *) str_hash_find (opcode_hash_control, name); 2200} 2201 2202/* Assemble a parallel processing insn. */ 2203#define DDT_BASE 0xf000 /* Base value for double data transfer insns */ 2204 2205static unsigned int 2206assemble_ppi (char *op_end, sh_opcode_info *opcode) 2207{ 2208 unsigned int movx = 0; 2209 unsigned int movy = 0; 2210 unsigned int cond = 0; 2211 unsigned int field_b = 0; 2212 char *output; 2213 unsigned int move_code; 2214 unsigned int size; 2215 2216 for (;;) 2217 { 2218 sh_operand_info operand[3]; 2219 2220 /* Some insn ignore one or more register fields, e.g. psts machl,a0. 2221 Make sure we encode a defined insn pattern. */ 2222 reg_x = 0; 2223 reg_y = 0; 2224 reg_n = 0; 2225 2226 if (opcode->arg[0] != A_END) 2227 op_end = get_operands (opcode, op_end, operand); 2228 try_another_opcode: 2229 opcode = get_specific (opcode, operand); 2230 if (opcode == 0) 2231 { 2232 /* Couldn't find an opcode which matched the operands. */ 2233 char *where = frag_more (2); 2234 size = 2; 2235 2236 where[0] = 0x0; 2237 where[1] = 0x0; 2238 as_bad (_("invalid operands for opcode")); 2239 return size; 2240 } 2241 2242 if (opcode->nibbles[0] != PPI) 2243 as_bad (_("insn can't be combined with parallel processing insn")); 2244 2245 switch (opcode->nibbles[1]) 2246 { 2247 2248 case NOPX: 2249 if (movx) 2250 as_bad (_("multiple movx specifications")); 2251 movx = DDT_BASE; 2252 break; 2253 case NOPY: 2254 if (movy) 2255 as_bad (_("multiple movy specifications")); 2256 movy = DDT_BASE; 2257 break; 2258 2259 case MOVX_NOPY: 2260 if (movx) 2261 as_bad (_("multiple movx specifications")); 2262 if ((reg_n < 4 || reg_n > 5) 2263 && (reg_n < 0 || reg_n > 1)) 2264 as_bad (_("invalid movx address register")); 2265 if (movy && movy != DDT_BASE) 2266 as_bad (_("insn cannot be combined with non-nopy")); 2267 movx = ((((reg_n & 1) != 0) << 9) 2268 + (((reg_n & 4) == 0) << 8) 2269 + (reg_x << 6) 2270 + (opcode->nibbles[2] << 4) 2271 + opcode->nibbles[3] 2272 + DDT_BASE); 2273 break; 2274 2275 case MOVY_NOPX: 2276 if (movy) 2277 as_bad (_("multiple movy specifications")); 2278 if ((reg_n < 6 || reg_n > 7) 2279 && (reg_n < 2 || reg_n > 3)) 2280 as_bad (_("invalid movy address register")); 2281 if (movx && movx != DDT_BASE) 2282 as_bad (_("insn cannot be combined with non-nopx")); 2283 movy = ((((reg_n & 1) != 0) << 8) 2284 + (((reg_n & 4) == 0) << 9) 2285 + (reg_y << 6) 2286 + (opcode->nibbles[2] << 4) 2287 + opcode->nibbles[3] 2288 + DDT_BASE); 2289 break; 2290 2291 case MOVX: 2292 if (movx) 2293 as_bad (_("multiple movx specifications")); 2294 if (movy & 0x2ac) 2295 as_bad (_("previous movy requires nopx")); 2296 if (reg_n < 4 || reg_n > 5) 2297 as_bad (_("invalid movx address register")); 2298 if (opcode->nibbles[2] & 8) 2299 { 2300 if (reg_m == A_A1_NUM) 2301 movx = 1 << 7; 2302 else if (reg_m != A_A0_NUM) 2303 as_bad (_("invalid movx dsp register")); 2304 } 2305 else 2306 { 2307 if (reg_x > 1) 2308 as_bad (_("invalid movx dsp register")); 2309 movx = reg_x << 7; 2310 } 2311 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; 2312 break; 2313 2314 case MOVY: 2315 if (movy) 2316 as_bad (_("multiple movy specifications")); 2317 if (movx & 0x153) 2318 as_bad (_("previous movx requires nopy")); 2319 if (opcode->nibbles[2] & 8) 2320 { 2321 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, 2322 so add 8 more. */ 2323 movy = 8; 2324 if (reg_m == A_A1_NUM) 2325 movy += 1 << 6; 2326 else if (reg_m != A_A0_NUM) 2327 as_bad (_("invalid movy dsp register")); 2328 } 2329 else 2330 { 2331 if (reg_y > 1) 2332 as_bad (_("invalid movy dsp register")); 2333 movy = reg_y << 6; 2334 } 2335 if (reg_n < 6 || reg_n > 7) 2336 as_bad (_("invalid movy address register")); 2337 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; 2338 break; 2339 2340 case PSH: 2341 if (operand[0].immediate.X_op != O_constant) 2342 as_bad (_("dsp immediate shift value not constant")); 2343 field_b = ((opcode->nibbles[2] << 12) 2344 | (operand[0].immediate.X_add_number & 127) << 4 2345 | reg_n); 2346 break; 2347 case PPI3NC: 2348 if (cond) 2349 { 2350 opcode++; 2351 goto try_another_opcode; 2352 } 2353 /* Fall through. */ 2354 case PPI3: 2355 if (field_b) 2356 as_bad (_("multiple parallel processing specifications")); 2357 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2358 + (reg_x << 6) + (reg_y << 4) + reg_n); 2359 switch (opcode->nibbles[4]) 2360 { 2361 case HEX_0: 2362 case HEX_XX00: 2363 case HEX_00YY: 2364 break; 2365 case HEX_1: 2366 case HEX_4: 2367 field_b += opcode->nibbles[4] << 4; 2368 break; 2369 default: 2370 abort (); 2371 } 2372 break; 2373 case PDC: 2374 if (cond) 2375 as_bad (_("multiple condition specifications")); 2376 cond = opcode->nibbles[2] << 8; 2377 if (*op_end) 2378 goto skip_cond_check; 2379 break; 2380 case PPIC: 2381 if (field_b) 2382 as_bad (_("multiple parallel processing specifications")); 2383 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2384 + cond + (reg_x << 6) + (reg_y << 4) + reg_n); 2385 cond = 0; 2386 switch (opcode->nibbles[4]) 2387 { 2388 case HEX_0: 2389 case HEX_XX00: 2390 case HEX_00YY: 2391 break; 2392 case HEX_1: 2393 case HEX_4: 2394 field_b += opcode->nibbles[4] << 4; 2395 break; 2396 default: 2397 abort (); 2398 } 2399 break; 2400 case PMUL: 2401 if (field_b) 2402 { 2403 if ((field_b & 0xef00) == 0xa100) 2404 field_b -= 0x8100; 2405 /* pclr Dz pmuls Se,Sf,Dg */ 2406 else if ((field_b & 0xff00) == 0x8d00 2407 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) 2408 { 2409 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); 2410 field_b -= 0x8cf0; 2411 } 2412 else 2413 as_bad (_("insn cannot be combined with pmuls")); 2414 switch (field_b & 0xf) 2415 { 2416 case A_X0_NUM: 2417 field_b += 0 - A_X0_NUM; 2418 break; 2419 case A_Y0_NUM: 2420 field_b += 1 - A_Y0_NUM; 2421 break; 2422 case A_A0_NUM: 2423 field_b += 2 - A_A0_NUM; 2424 break; 2425 case A_A1_NUM: 2426 field_b += 3 - A_A1_NUM; 2427 break; 2428 default: 2429 as_bad (_("bad combined pmuls output operand")); 2430 } 2431 /* Generate warning if the destination register for padd / psub 2432 and pmuls is the same ( only for A0 or A1 ). 2433 If the last nibble is 1010 then A0 is used in both 2434 padd / psub and pmuls. If it is 1111 then A1 is used 2435 as destination register in both padd / psub and pmuls. */ 2436 2437 if ((((field_b | reg_efg) & 0x000F) == 0x000A) 2438 || (((field_b | reg_efg) & 0x000F) == 0x000F)) 2439 as_warn (_("destination register is same for parallel insns")); 2440 } 2441 field_b += 0x4000 + reg_efg; 2442 break; 2443 default: 2444 abort (); 2445 } 2446 if (cond) 2447 { 2448 as_bad (_("condition not followed by conditionalizable insn")); 2449 cond = 0; 2450 } 2451 if (! *op_end) 2452 break; 2453 skip_cond_check: 2454 opcode = find_cooked_opcode (&op_end); 2455 if (opcode == NULL) 2456 { 2457 (as_bad 2458 (_("unrecognized characters at end of parallel processing insn"))); 2459 break; 2460 } 2461 } 2462 2463 move_code = movx | movy; 2464 if (field_b) 2465 { 2466 /* Parallel processing insn. */ 2467 unsigned int ppi_code = (movx | movy | 0xf800) << 16 | field_b; 2468 2469 output = frag_more (4); 2470 size = 4; 2471 if (! target_big_endian) 2472 { 2473 output[3] = ppi_code >> 8; 2474 output[2] = ppi_code; 2475 } 2476 else 2477 { 2478 output[2] = ppi_code >> 8; 2479 output[3] = ppi_code; 2480 } 2481 move_code |= 0xf800; 2482 } 2483 else 2484 { 2485 /* Just a double data transfer. */ 2486 output = frag_more (2); 2487 size = 2; 2488 } 2489 if (! target_big_endian) 2490 { 2491 output[1] = move_code >> 8; 2492 output[0] = move_code; 2493 } 2494 else 2495 { 2496 output[0] = move_code >> 8; 2497 output[1] = move_code; 2498 } 2499 return size; 2500} 2501 2502/* This is the guts of the machine-dependent assembler. STR points to a 2503 machine dependent instruction. This function is supposed to emit 2504 the frags/bytes it assembles to. */ 2505 2506void 2507md_assemble (char *str) 2508{ 2509 char *op_end; 2510 sh_operand_info operand[3]; 2511 sh_opcode_info *opcode; 2512 unsigned int size = 0; 2513 char *initial_str = str; 2514 2515 opcode = find_cooked_opcode (&str); 2516 op_end = str; 2517 2518 if (opcode == NULL) 2519 { 2520 /* The opcode is not in the hash table. 2521 This means we definitely have an assembly failure, 2522 but the instruction may be valid in another CPU variant. 2523 In this case emit something better than 'unknown opcode'. 2524 Search the full table in sh-opc.h to check. */ 2525 2526 char *name = initial_str; 2527 int name_length = 0; 2528 const sh_opcode_info *op; 2529 bfd_boolean found = FALSE; 2530 2531 /* Identify opcode in string. */ 2532 while (ISSPACE (*name)) 2533 name++; 2534 2535 while (name[name_length] != '\0' && !ISSPACE (name[name_length])) 2536 name_length++; 2537 2538 /* Search for opcode in full list. */ 2539 for (op = sh_table; op->name; op++) 2540 { 2541 if (strncasecmp (op->name, name, name_length) == 0 2542 && op->name[name_length] == '\0') 2543 { 2544 found = TRUE; 2545 break; 2546 } 2547 } 2548 2549 if (found) 2550 as_bad (_("opcode not valid for this cpu variant")); 2551 else 2552 as_bad (_("unknown opcode")); 2553 2554 return; 2555 } 2556 2557 if (sh_relax 2558 && ! seg_info (now_seg)->tc_segment_info_data.in_code) 2559 { 2560 /* Output a CODE reloc to tell the linker that the following 2561 bytes are instructions, not data. */ 2562 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2563 BFD_RELOC_SH_CODE); 2564 seg_info (now_seg)->tc_segment_info_data.in_code = 1; 2565 } 2566 2567 if (opcode->nibbles[0] == PPI) 2568 { 2569 size = assemble_ppi (op_end, opcode); 2570 } 2571 else 2572 { 2573 if (opcode->arg[0] == A_BDISP12 2574 || opcode->arg[0] == A_BDISP8) 2575 { 2576 /* Since we skip get_specific here, we have to check & update 2577 valid_arch now. */ 2578 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) 2579 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); 2580 else 2581 as_bad (_("Delayed branches not available on SH1")); 2582 parse_exp (op_end + 1, &operand[0]); 2583 build_relax (opcode, &operand[0]); 2584 2585 /* All branches are currently 16 bit. */ 2586 size = 2; 2587 } 2588 else 2589 { 2590 if (opcode->arg[0] == A_END) 2591 { 2592 /* Ignore trailing whitespace. If there is any, it has already 2593 been compressed to a single space. */ 2594 if (*op_end == ' ') 2595 op_end++; 2596 } 2597 else 2598 { 2599 op_end = get_operands (opcode, op_end, operand); 2600 } 2601 opcode = get_specific (opcode, operand); 2602 2603 if (opcode == 0) 2604 { 2605 /* Couldn't find an opcode which matched the operands. */ 2606 char *where = frag_more (2); 2607 size = 2; 2608 2609 where[0] = 0x0; 2610 where[1] = 0x0; 2611 as_bad (_("invalid operands for opcode")); 2612 } 2613 else 2614 { 2615 if (*op_end) 2616 as_bad (_("excess operands: '%s'"), op_end); 2617 2618 size = build_Mytes (opcode, operand); 2619 } 2620 } 2621 } 2622 2623 dwarf2_emit_insn (size); 2624} 2625 2626/* This routine is called each time a label definition is seen. It 2627 emits a BFD_RELOC_SH_LABEL reloc if necessary. */ 2628 2629void 2630sh_frob_label (symbolS *sym) 2631{ 2632 static fragS *last_label_frag; 2633 static int last_label_offset; 2634 2635 if (sh_relax 2636 && seg_info (now_seg)->tc_segment_info_data.in_code) 2637 { 2638 int offset; 2639 2640 offset = frag_now_fix (); 2641 if (frag_now != last_label_frag 2642 || offset != last_label_offset) 2643 { 2644 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); 2645 last_label_frag = frag_now; 2646 last_label_offset = offset; 2647 } 2648 } 2649 2650 dwarf2_emit_label (sym); 2651} 2652 2653/* This routine is called when the assembler is about to output some 2654 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ 2655 2656void 2657sh_flush_pending_output (void) 2658{ 2659 if (sh_relax 2660 && seg_info (now_seg)->tc_segment_info_data.in_code) 2661 { 2662 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2663 BFD_RELOC_SH_DATA); 2664 seg_info (now_seg)->tc_segment_info_data.in_code = 0; 2665 } 2666} 2667 2668symbolS * 2669md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 2670{ 2671 return 0; 2672} 2673 2674/* Various routines to kill one day. */ 2675 2676const char * 2677md_atof (int type, char *litP, int *sizeP) 2678{ 2679 return ieee_md_atof (type, litP, sizeP, target_big_endian); 2680} 2681 2682/* Handle the .uses pseudo-op. This pseudo-op is used just before a 2683 call instruction. It refers to a label of the instruction which 2684 loads the register which the call uses. We use it to generate a 2685 special reloc for the linker. */ 2686 2687static void 2688s_uses (int ignore ATTRIBUTE_UNUSED) 2689{ 2690 expressionS ex; 2691 2692 if (! sh_relax) 2693 as_warn (_(".uses pseudo-op seen when not relaxing")); 2694 2695 expression (&ex); 2696 2697 if (ex.X_op != O_symbol || ex.X_add_number != 0) 2698 { 2699 as_bad (_("bad .uses format")); 2700 ignore_rest_of_line (); 2701 return; 2702 } 2703 2704 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); 2705 2706 demand_empty_rest_of_line (); 2707} 2708 2709enum options 2710{ 2711 OPTION_RELAX = OPTION_MD_BASE, 2712 OPTION_BIG, 2713 OPTION_LITTLE, 2714 OPTION_SMALL, 2715 OPTION_DSP, 2716 OPTION_ISA, 2717 OPTION_RENESAS, 2718 OPTION_ALLOW_REG_PREFIX, 2719 OPTION_H_TICK_HEX, 2720#ifdef OBJ_ELF 2721 OPTION_FDPIC, 2722#endif 2723 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ 2724}; 2725 2726const char *md_shortopts = ""; 2727struct option md_longopts[] = 2728{ 2729 {"relax", no_argument, NULL, OPTION_RELAX}, 2730 {"big", no_argument, NULL, OPTION_BIG}, 2731 {"little", no_argument, NULL, OPTION_LITTLE}, 2732 /* The next two switches are here because the 2733 generic parts of the linker testsuite uses them. */ 2734 {"EB", no_argument, NULL, OPTION_BIG}, 2735 {"EL", no_argument, NULL, OPTION_LITTLE}, 2736 {"small", no_argument, NULL, OPTION_SMALL}, 2737 {"dsp", no_argument, NULL, OPTION_DSP}, 2738 {"isa", required_argument, NULL, OPTION_ISA}, 2739 {"renesas", no_argument, NULL, OPTION_RENESAS}, 2740 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, 2741 2742 { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX }, 2743 2744#ifdef OBJ_ELF 2745 {"fdpic", no_argument, NULL, OPTION_FDPIC}, 2746#endif 2747 2748 {NULL, no_argument, NULL, 0} 2749}; 2750size_t md_longopts_size = sizeof (md_longopts); 2751 2752int 2753md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) 2754{ 2755 switch (c) 2756 { 2757 case OPTION_RELAX: 2758 sh_relax = 1; 2759 break; 2760 2761 case OPTION_BIG: 2762 target_big_endian = 1; 2763 break; 2764 2765 case OPTION_LITTLE: 2766 target_big_endian = 0; 2767 break; 2768 2769 case OPTION_SMALL: 2770 sh_small = 1; 2771 break; 2772 2773 case OPTION_DSP: 2774 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 2775 break; 2776 2777 case OPTION_RENESAS: 2778 dont_adjust_reloc_32 = 1; 2779 break; 2780 2781 case OPTION_ALLOW_REG_PREFIX: 2782 allow_dollar_register_prefix = 1; 2783 break; 2784 2785 case OPTION_ISA: 2786 if (strcasecmp (arg, "dsp") == 0) 2787 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 2788 else if (strcasecmp (arg, "fp") == 0) 2789 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; 2790 else if (strcasecmp (arg, "any") == 0) 2791 preset_target_arch = arch_sh_up; 2792 else 2793 { 2794 extern const bfd_arch_info_type bfd_sh_arch; 2795 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 2796 2797 preset_target_arch = 0; 2798 for (; bfd_arch; bfd_arch=bfd_arch->next) 2799 { 2800 int len = strlen(bfd_arch->printable_name); 2801 2802 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) 2803 continue; 2804 2805 if (arg[len] == '\0') 2806 preset_target_arch = 2807 sh_get_arch_from_bfd_mach (bfd_arch->mach); 2808 else if (strcasecmp(&arg[len], "-up") == 0) 2809 preset_target_arch = 2810 sh_get_arch_up_from_bfd_mach (bfd_arch->mach); 2811 else 2812 continue; 2813 break; 2814 } 2815 2816 if (!preset_target_arch) 2817 as_bad (_("Invalid argument to --isa option: %s"), arg); 2818 } 2819 break; 2820 2821 case OPTION_H_TICK_HEX: 2822 enable_h_tick_hex = 1; 2823 break; 2824 2825#ifdef OBJ_ELF 2826 case OPTION_FDPIC: 2827 sh_fdpic = TRUE; 2828 break; 2829#endif /* OBJ_ELF */ 2830 2831 default: 2832 return 0; 2833 } 2834 2835 return 1; 2836} 2837 2838void 2839md_show_usage (FILE *stream) 2840{ 2841 fprintf (stream, _("\ 2842SH options:\n\ 2843--little generate little endian code\n\ 2844--big generate big endian code\n\ 2845--relax alter jump instructions for long displacements\n\ 2846--renesas disable optimization with section symbol for\n\ 2847 compatibility with Renesas assembler.\n\ 2848--small align sections to 4 byte boundaries, not 16\n\ 2849--dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ 2850--allow-reg-prefix allow '$' as a register name prefix.\n\ 2851--isa=[any use most appropriate isa\n\ 2852 | dsp same as '-dsp'\n\ 2853 | fp")); 2854 { 2855 extern const bfd_arch_info_type bfd_sh_arch; 2856 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 2857 2858 for (; bfd_arch; bfd_arch=bfd_arch->next) 2859 { 2860 fprintf (stream, "\n | %s", bfd_arch->printable_name); 2861 fprintf (stream, "\n | %s-up", bfd_arch->printable_name); 2862 } 2863 } 2864 fprintf (stream, "]\n"); 2865#ifdef OBJ_ELF 2866 fprintf (stream, _("\ 2867--fdpic generate an FDPIC object file\n")); 2868#endif /* OBJ_ELF */ 2869} 2870 2871/* This struct is used to pass arguments to sh_count_relocs through 2872 bfd_map_over_sections. */ 2873 2874struct sh_count_relocs 2875{ 2876 /* Symbol we are looking for. */ 2877 symbolS *sym; 2878 /* Count of relocs found. */ 2879 int count; 2880}; 2881 2882/* Count the number of fixups in a section which refer to a particular 2883 symbol. This is called via bfd_map_over_sections. */ 2884 2885static void 2886sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) 2887{ 2888 struct sh_count_relocs *info = (struct sh_count_relocs *) data; 2889 segment_info_type *seginfo; 2890 symbolS *sym; 2891 fixS *fix; 2892 2893 seginfo = seg_info (sec); 2894 if (seginfo == NULL) 2895 return; 2896 2897 sym = info->sym; 2898 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 2899 { 2900 if (fix->fx_addsy == sym) 2901 { 2902 ++info->count; 2903 fix->fx_tcbit = 1; 2904 } 2905 } 2906} 2907 2908/* Handle the count relocs for a particular section. 2909 This is called via bfd_map_over_sections. */ 2910 2911static void 2912sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, 2913 void *ignore ATTRIBUTE_UNUSED) 2914{ 2915 segment_info_type *seginfo; 2916 fixS *fix; 2917 2918 seginfo = seg_info (sec); 2919 if (seginfo == NULL) 2920 return; 2921 2922 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 2923 { 2924 symbolS *sym; 2925 bfd_vma val; 2926 fixS *fscan; 2927 struct sh_count_relocs info; 2928 2929 if (fix->fx_r_type != BFD_RELOC_SH_USES) 2930 continue; 2931 2932 /* The BFD_RELOC_SH_USES reloc should refer to a defined local 2933 symbol in the same section. */ 2934 sym = fix->fx_addsy; 2935 if (sym == NULL 2936 || fix->fx_subsy != NULL 2937 || fix->fx_addnumber != 0 2938 || S_GET_SEGMENT (sym) != sec 2939 || S_IS_EXTERNAL (sym)) 2940 { 2941 as_warn_where (fix->fx_file, fix->fx_line, 2942 _(".uses does not refer to a local symbol in the same section")); 2943 continue; 2944 } 2945 2946 /* Look through the fixups again, this time looking for one 2947 at the same location as sym. */ 2948 val = S_GET_VALUE (sym); 2949 for (fscan = seginfo->fix_root; 2950 fscan != NULL; 2951 fscan = fscan->fx_next) 2952 if (val == fscan->fx_frag->fr_address + fscan->fx_where 2953 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN 2954 && fscan->fx_r_type != BFD_RELOC_SH_CODE 2955 && fscan->fx_r_type != BFD_RELOC_SH_DATA 2956 && fscan->fx_r_type != BFD_RELOC_SH_LABEL) 2957 break; 2958 if (fscan == NULL) 2959 { 2960 as_warn_where (fix->fx_file, fix->fx_line, 2961 _("can't find fixup pointed to by .uses")); 2962 continue; 2963 } 2964 2965 if (fscan->fx_tcbit) 2966 { 2967 /* We've already done this one. */ 2968 continue; 2969 } 2970 2971 /* The variable fscan should also be a fixup to a local symbol 2972 in the same section. */ 2973 sym = fscan->fx_addsy; 2974 if (sym == NULL 2975 || fscan->fx_subsy != NULL 2976 || fscan->fx_addnumber != 0 2977 || S_GET_SEGMENT (sym) != sec 2978 || S_IS_EXTERNAL (sym)) 2979 { 2980 as_warn_where (fix->fx_file, fix->fx_line, 2981 _(".uses target does not refer to a local symbol in the same section")); 2982 continue; 2983 } 2984 2985 /* Now we look through all the fixups of all the sections, 2986 counting the number of times we find a reference to sym. */ 2987 info.sym = sym; 2988 info.count = 0; 2989 bfd_map_over_sections (stdoutput, sh_count_relocs, &info); 2990 2991 if (info.count < 1) 2992 abort (); 2993 2994 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. 2995 We have already adjusted the value of sym to include the 2996 fragment address, so we undo that adjustment here. */ 2997 subseg_change (sec, 0); 2998 fix_new (fscan->fx_frag, 2999 S_GET_VALUE (sym) - fscan->fx_frag->fr_address, 3000 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); 3001 } 3002} 3003 3004/* This function is called after the symbol table has been completed, 3005 but before the relocs or section contents have been written out. 3006 If we have seen any .uses pseudo-ops, they point to an instruction 3007 which loads a register with the address of a function. We look 3008 through the fixups to find where the function address is being 3009 loaded from. We then generate a COUNT reloc giving the number of 3010 times that function address is referred to. The linker uses this 3011 information when doing relaxing, to decide when it can eliminate 3012 the stored function address entirely. */ 3013 3014void 3015sh_frob_file (void) 3016{ 3017 if (! sh_relax) 3018 return; 3019 3020 bfd_map_over_sections (stdoutput, sh_frob_section, NULL); 3021} 3022 3023/* Called after relaxing. Set the correct sizes of the fragments, and 3024 create relocs so that md_apply_fix will fill in the correct values. */ 3025 3026void 3027md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) 3028{ 3029 int donerelax = 0; 3030 3031 switch (fragP->fr_subtype) 3032 { 3033 case C (COND_JUMP, COND8): 3034 case C (COND_JUMP_DELAY, COND8): 3035 subseg_change (seg, 0); 3036 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3037 1, BFD_RELOC_SH_PCDISP8BY2); 3038 fragP->fr_fix += 2; 3039 fragP->fr_var = 0; 3040 break; 3041 3042 case C (UNCOND_JUMP, UNCOND12): 3043 subseg_change (seg, 0); 3044 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3045 1, BFD_RELOC_SH_PCDISP12BY2); 3046 fragP->fr_fix += 2; 3047 fragP->fr_var = 0; 3048 break; 3049 3050 case C (UNCOND_JUMP, UNCOND32): 3051 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3052 if (fragP->fr_symbol == NULL) 3053 as_bad_where (fragP->fr_file, fragP->fr_line, 3054 _("displacement overflows 12-bit field")); 3055 else if (S_IS_DEFINED (fragP->fr_symbol)) 3056 as_bad_where (fragP->fr_file, fragP->fr_line, 3057 _("displacement to defined symbol %s overflows 12-bit field"), 3058 S_GET_NAME (fragP->fr_symbol)); 3059 else 3060 as_bad_where (fragP->fr_file, fragP->fr_line, 3061 _("displacement to undefined symbol %s overflows 12-bit field"), 3062 S_GET_NAME (fragP->fr_symbol)); 3063 /* Stabilize this frag, so we don't trip an assert. */ 3064 fragP->fr_fix += fragP->fr_var; 3065 fragP->fr_var = 0; 3066 break; 3067 3068 case C (COND_JUMP, COND12): 3069 case C (COND_JUMP_DELAY, COND12): 3070 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ 3071 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c 3072 was due to gas incorrectly relaxing an out-of-range conditional 3073 branch with delay slot. It turned: 3074 bf.s L6 (slot mov.l r12,@(44,r0)) 3075 into: 3076 30772c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) 307830: 00 09 nop 307932: 10 cb mov.l r12,@(44,r0) 3080 Therefore, branches with delay slots have to be handled 3081 differently from ones without delay slots. */ 3082 { 3083 unsigned char *buffer = 3084 (unsigned char *) (fragP->fr_fix + &fragP->fr_literal[0]); 3085 int highbyte = target_big_endian ? 0 : 1; 3086 int lowbyte = target_big_endian ? 1 : 0; 3087 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); 3088 3089 /* Toggle the true/false bit of the bcond. */ 3090 buffer[highbyte] ^= 0x2; 3091 3092 /* If this is a delayed branch, we may not put the bra in the 3093 slot. So we change it to a non-delayed branch, like that: 3094 b! cond slot_label; bra disp; slot_label: slot_insn 3095 ??? We should try if swapping the conditional branch and 3096 its delay-slot insn already makes the branch reach. */ 3097 3098 /* Build a relocation to six / four bytes farther on. */ 3099 subseg_change (seg, 0); 3100 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), 3101 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), 3102 1, BFD_RELOC_SH_PCDISP8BY2); 3103 3104 /* Set up a jump instruction. */ 3105 buffer[highbyte + 2] = 0xa0; 3106 buffer[lowbyte + 2] = 0; 3107 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 3108 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); 3109 3110 if (delay) 3111 { 3112 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ 3113 fragP->fr_fix += 4; 3114 } 3115 else 3116 { 3117 /* Fill in a NOP instruction. */ 3118 buffer[highbyte + 4] = 0x0; 3119 buffer[lowbyte + 4] = 0x9; 3120 3121 fragP->fr_fix += 6; 3122 } 3123 fragP->fr_var = 0; 3124 donerelax = 1; 3125 } 3126 break; 3127 3128 case C (COND_JUMP, COND32): 3129 case C (COND_JUMP_DELAY, COND32): 3130 case C (COND_JUMP, UNDEF_WORD_DISP): 3131 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3132 if (fragP->fr_symbol == NULL) 3133 as_bad_where (fragP->fr_file, fragP->fr_line, 3134 _("displacement overflows 8-bit field")); 3135 else if (S_IS_DEFINED (fragP->fr_symbol)) 3136 as_bad_where (fragP->fr_file, fragP->fr_line, 3137 _("displacement to defined symbol %s overflows 8-bit field"), 3138 S_GET_NAME (fragP->fr_symbol)); 3139 else 3140 as_bad_where (fragP->fr_file, fragP->fr_line, 3141 _("displacement to undefined symbol %s overflows 8-bit field "), 3142 S_GET_NAME (fragP->fr_symbol)); 3143 /* Stabilize this frag, so we don't trip an assert. */ 3144 fragP->fr_fix += fragP->fr_var; 3145 fragP->fr_var = 0; 3146 break; 3147 3148 default: 3149 abort (); 3150 } 3151 3152 if (donerelax && !sh_relax) 3153 as_warn_where (fragP->fr_file, fragP->fr_line, 3154 _("overflow in branch to %s; converted into longer instruction sequence"), 3155 (fragP->fr_symbol != NULL 3156 ? S_GET_NAME (fragP->fr_symbol) 3157 : "")); 3158} 3159 3160valueT 3161md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) 3162{ 3163#ifdef OBJ_ELF 3164 return size; 3165#else /* ! OBJ_ELF */ 3166 return ((size + (1 << bfd_section_alignment (seg)) - 1) 3167 & -(1 << bfd_section_alignment (seg))); 3168#endif /* ! OBJ_ELF */ 3169} 3170 3171/* This static variable is set by s_uacons to tell sh_cons_align that 3172 the expression does not need to be aligned. */ 3173 3174static int sh_no_align_cons = 0; 3175 3176/* This handles the unaligned space allocation pseudo-ops, such as 3177 .uaword. .uaword is just like .word, but the value does not need 3178 to be aligned. */ 3179 3180static void 3181s_uacons (int bytes) 3182{ 3183 /* Tell sh_cons_align not to align this value. */ 3184 sh_no_align_cons = 1; 3185 cons (bytes); 3186} 3187 3188/* If a .word, et. al., pseud-op is seen, warn if the value is not 3189 aligned correctly. Note that this can cause warnings to be issued 3190 when assembling initialized structured which were declared with the 3191 packed attribute. FIXME: Perhaps we should require an option to 3192 enable this warning? */ 3193 3194void 3195sh_cons_align (int nbytes) 3196{ 3197 int nalign; 3198 3199 if (sh_no_align_cons) 3200 { 3201 /* This is an unaligned pseudo-op. */ 3202 sh_no_align_cons = 0; 3203 return; 3204 } 3205 3206 nalign = 0; 3207 while ((nbytes & 1) == 0) 3208 { 3209 ++nalign; 3210 nbytes >>= 1; 3211 } 3212 3213 if (nalign == 0) 3214 return; 3215 3216 if (now_seg == absolute_section) 3217 { 3218 if ((abs_section_offset & ((1 << nalign) - 1)) != 0) 3219 as_warn (_("misaligned data")); 3220 return; 3221 } 3222 3223 frag_var (rs_align_test, 1, 1, (relax_substateT) 0, 3224 (symbolS *) NULL, (offsetT) nalign, (char *) NULL); 3225 3226 record_alignment (now_seg, nalign); 3227} 3228 3229/* When relaxing, we need to output a reloc for any .align directive 3230 that requests alignment to a four byte boundary or larger. This is 3231 also where we check for misaligned data. */ 3232 3233void 3234sh_handle_align (fragS *frag) 3235{ 3236 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; 3237 3238 if (frag->fr_type == rs_align_code) 3239 { 3240 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; 3241 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; 3242 3243 char *p = frag->fr_literal + frag->fr_fix; 3244 3245 if (bytes & 1) 3246 { 3247 *p++ = 0; 3248 bytes--; 3249 frag->fr_fix += 1; 3250 } 3251 3252 if (target_big_endian) 3253 { 3254 memcpy (p, big_nop_pattern, sizeof big_nop_pattern); 3255 frag->fr_var = sizeof big_nop_pattern; 3256 } 3257 else 3258 { 3259 memcpy (p, little_nop_pattern, sizeof little_nop_pattern); 3260 frag->fr_var = sizeof little_nop_pattern; 3261 } 3262 } 3263 else if (frag->fr_type == rs_align_test) 3264 { 3265 if (bytes != 0) 3266 as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); 3267 } 3268 3269 if (sh_relax 3270 && (frag->fr_type == rs_align 3271 || frag->fr_type == rs_align_code) 3272 && frag->fr_address + frag->fr_fix > 0 3273 && frag->fr_offset > 1 3274 && now_seg != bss_section) 3275 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, 3276 BFD_RELOC_SH_ALIGN); 3277} 3278 3279/* See whether the relocation should be resolved locally. */ 3280 3281static bfd_boolean 3282sh_local_pcrel (fixS *fix) 3283{ 3284 return (! sh_relax 3285 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 3286 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 3287 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 3288 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 3289 || fix->fx_r_type == BFD_RELOC_8_PCREL 3290 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 3291 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); 3292} 3293 3294/* See whether we need to force a relocation into the output file. 3295 This is used to force out switch and PC relative relocations when 3296 relaxing. */ 3297 3298int 3299sh_force_relocation (fixS *fix) 3300{ 3301 /* These relocations can't make it into a DSO, so no use forcing 3302 them for global symbols. */ 3303 if (sh_local_pcrel (fix)) 3304 return 0; 3305 3306 /* Make sure some relocations get emitted. */ 3307 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START 3308 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END 3309 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 3310 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 3311 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 3312 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 3313 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 3314 || generic_force_reloc (fix)) 3315 return 1; 3316 3317 if (! sh_relax) 3318 return 0; 3319 3320 return (fix->fx_pcrel 3321 || SWITCH_TABLE (fix) 3322 || fix->fx_r_type == BFD_RELOC_SH_COUNT 3323 || fix->fx_r_type == BFD_RELOC_SH_ALIGN 3324 || fix->fx_r_type == BFD_RELOC_SH_CODE 3325 || fix->fx_r_type == BFD_RELOC_SH_DATA 3326 || fix->fx_r_type == BFD_RELOC_SH_LABEL); 3327} 3328 3329#ifdef OBJ_ELF 3330bfd_boolean 3331sh_fix_adjustable (fixS *fixP) 3332{ 3333 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL 3334 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL 3335 || fixP->fx_r_type == BFD_RELOC_SH_GOT20 3336 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC 3337 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC 3338 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20 3339 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC 3340 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20 3341 || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC 3342 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) 3343 || fixP->fx_r_type == BFD_RELOC_RVA) 3344 return 0; 3345 3346 /* We need the symbol name for the VTABLE entries */ 3347 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3348 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3349 return 0; 3350 3351 return 1; 3352} 3353 3354void 3355sh_elf_final_processing (void) 3356{ 3357 int val; 3358 3359 /* Set file-specific flags to indicate if this code needs 3360 a processor with the sh-dsp / sh2e ISA to execute. */ 3361 val = sh_find_elf_flags (valid_arch); 3362 3363 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; 3364 elf_elfheader (stdoutput)->e_flags |= val; 3365 3366 if (sh_fdpic) 3367 elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC; 3368} 3369#endif 3370 3371#ifdef TE_UCLINUX 3372/* Return the target format for uClinux. */ 3373 3374const char * 3375sh_uclinux_target_format (void) 3376{ 3377 if (sh_fdpic) 3378 return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic"); 3379 else 3380 return (!target_big_endian ? "elf32-shl" : "elf32-sh"); 3381} 3382#endif 3383 3384/* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its 3385 assembly-time value. If we're generating a reloc for FIXP, 3386 see whether the addend should be stored in-place or whether 3387 it should be in an ELF r_addend field. */ 3388 3389static void 3390apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) 3391{ 3392 reloc_howto_type *howto; 3393 3394 if (fixP->fx_addsy != NULL || fixP->fx_pcrel) 3395 { 3396 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 3397 if (howto && !howto->partial_inplace) 3398 { 3399 fixP->fx_addnumber = val; 3400 return; 3401 } 3402 } 3403 md_number_to_chars (buf, val, size); 3404} 3405 3406/* Apply a fixup to the object file. */ 3407 3408void 3409md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3410{ 3411 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3412 int lowbyte = target_big_endian ? 1 : 0; 3413 int highbyte = target_big_endian ? 0 : 1; 3414 long val = (long) *valP; 3415 long max, min; 3416 int shift; 3417 3418 /* A difference between two symbols, the second of which is in the 3419 current section, is transformed in a PC-relative relocation to 3420 the other symbol. We have to adjust the relocation type here. */ 3421 if (fixP->fx_pcrel) 3422 { 3423 switch (fixP->fx_r_type) 3424 { 3425 default: 3426 break; 3427 3428 case BFD_RELOC_32: 3429 fixP->fx_r_type = BFD_RELOC_32_PCREL; 3430 break; 3431 3432 /* Currently, we only support 32-bit PCREL relocations. 3433 We'd need a new reloc type to handle 16_PCREL, and 3434 8_PCREL is already taken for R_SH_SWITCH8, which 3435 apparently does something completely different than what 3436 we need. FIXME. */ 3437 case BFD_RELOC_16: 3438 bfd_set_error (bfd_error_bad_value); 3439 return; 3440 3441 case BFD_RELOC_8: 3442 bfd_set_error (bfd_error_bad_value); 3443 return; 3444 } 3445 } 3446 3447 /* The function adjust_reloc_syms won't convert a reloc against a weak 3448 symbol into a reloc against a section, but bfd_install_relocation 3449 will screw up if the symbol is defined, so we have to adjust val here 3450 to avoid the screw up later. 3451 3452 For ordinary relocs, this does not happen for ELF, since for ELF, 3453 bfd_install_relocation uses the "special function" field of the 3454 howto, and does not execute the code that needs to be undone, as long 3455 as the special function does not return bfd_reloc_continue. 3456 It can happen for GOT- and PLT-type relocs the way they are 3457 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it 3458 doesn't matter here since those relocs don't use VAL; see below. */ 3459 if (OUTPUT_FLAVOR != bfd_target_elf_flavour 3460 && fixP->fx_addsy != NULL 3461 && S_IS_WEAK (fixP->fx_addsy)) 3462 val -= S_GET_VALUE (fixP->fx_addsy); 3463 3464 if (SWITCH_TABLE (fixP)) 3465 val -= S_GET_VALUE (fixP->fx_subsy); 3466 3467 max = min = 0; 3468 shift = 0; 3469 switch (fixP->fx_r_type) 3470 { 3471 case BFD_RELOC_SH_IMM3: 3472 max = 0x7; 3473 * buf = (* buf & 0xf8) | (val & 0x7); 3474 break; 3475 case BFD_RELOC_SH_IMM3U: 3476 max = 0x7; 3477 * buf = (* buf & 0x8f) | ((val & 0x7) << 4); 3478 break; 3479 case BFD_RELOC_SH_DISP12: 3480 max = 0xfff; 3481 buf[lowbyte] = val & 0xff; 3482 buf[highbyte] |= (val >> 8) & 0x0f; 3483 break; 3484 case BFD_RELOC_SH_DISP12BY2: 3485 max = 0xfff; 3486 shift = 1; 3487 buf[lowbyte] = (val >> 1) & 0xff; 3488 buf[highbyte] |= (val >> 9) & 0x0f; 3489 break; 3490 case BFD_RELOC_SH_DISP12BY4: 3491 max = 0xfff; 3492 shift = 2; 3493 buf[lowbyte] = (val >> 2) & 0xff; 3494 buf[highbyte] |= (val >> 10) & 0x0f; 3495 break; 3496 case BFD_RELOC_SH_DISP12BY8: 3497 max = 0xfff; 3498 shift = 3; 3499 buf[lowbyte] = (val >> 3) & 0xff; 3500 buf[highbyte] |= (val >> 11) & 0x0f; 3501 break; 3502 case BFD_RELOC_SH_DISP20: 3503 if (! target_big_endian) 3504 abort(); 3505 max = 0x7ffff; 3506 min = -0x80000; 3507 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); 3508 buf[2] = (val >> 8) & 0xff; 3509 buf[3] = val & 0xff; 3510 break; 3511 case BFD_RELOC_SH_DISP20BY8: 3512 if (!target_big_endian) 3513 abort(); 3514 max = 0x7ffff; 3515 min = -0x80000; 3516 shift = 8; 3517 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); 3518 buf[2] = (val >> 16) & 0xff; 3519 buf[3] = (val >> 8) & 0xff; 3520 break; 3521 3522 case BFD_RELOC_SH_IMM4: 3523 max = 0xf; 3524 *buf = (*buf & 0xf0) | (val & 0xf); 3525 break; 3526 3527 case BFD_RELOC_SH_IMM4BY2: 3528 max = 0xf; 3529 shift = 1; 3530 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); 3531 break; 3532 3533 case BFD_RELOC_SH_IMM4BY4: 3534 max = 0xf; 3535 shift = 2; 3536 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); 3537 break; 3538 3539 case BFD_RELOC_SH_IMM8BY2: 3540 max = 0xff; 3541 shift = 1; 3542 *buf = val >> 1; 3543 break; 3544 3545 case BFD_RELOC_SH_IMM8BY4: 3546 max = 0xff; 3547 shift = 2; 3548 *buf = val >> 2; 3549 break; 3550 3551 case BFD_RELOC_8: 3552 case BFD_RELOC_SH_IMM8: 3553 /* Sometimes the 8 bit value is sign extended (e.g., add) and 3554 sometimes it is not (e.g., and). We permit any 8 bit value. 3555 Note that adding further restrictions may invalidate 3556 reasonable looking assembly code, such as ``and -0x1,r0''. */ 3557 max = 0xff; 3558 min = -0xff; 3559 *buf++ = val; 3560 break; 3561 3562 case BFD_RELOC_SH_PCRELIMM8BY4: 3563 /* If we are dealing with a known destination ... */ 3564 if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) 3565 && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy))) 3566 { 3567 /* Don't silently move the destination due to misalignment. 3568 The absolute address is the fragment base plus the offset into 3569 the fragment plus the pc relative offset to the label. */ 3570 if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3) 3571 as_bad_where (fixP->fx_file, fixP->fx_line, 3572 _("offset to unaligned destination")); 3573 3574 /* The displacement cannot be zero or backward even if aligned. 3575 Allow -2 because val has already been adjusted somewhere. */ 3576 if (val < -2) 3577 as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset")); 3578 } 3579 3580 /* The lower two bits of the PC are cleared before the 3581 displacement is added in. We can assume that the destination 3582 is on a 4 byte boundary. If this instruction is also on a 4 3583 byte boundary, then we want 3584 (target - here) / 4 3585 and target - here is a multiple of 4. 3586 Otherwise, we are on a 2 byte boundary, and we want 3587 (target - (here - 2)) / 4 3588 and target - here is not a multiple of 4. Computing 3589 (target - (here - 2)) / 4 == (target - here + 2) / 4 3590 works for both cases, since in the first case the addition of 3591 2 will be removed by the division. target - here is in the 3592 variable val. */ 3593 val = (val + 2) / 4; 3594 if (val & ~0xff) 3595 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3596 buf[lowbyte] = val; 3597 break; 3598 3599 case BFD_RELOC_SH_PCRELIMM8BY2: 3600 val /= 2; 3601 if (val & ~0xff) 3602 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3603 buf[lowbyte] = val; 3604 break; 3605 3606 case BFD_RELOC_SH_PCDISP8BY2: 3607 val /= 2; 3608 if (val < -0x80 || val > 0x7f) 3609 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3610 buf[lowbyte] = val; 3611 break; 3612 3613 case BFD_RELOC_SH_PCDISP12BY2: 3614 val /= 2; 3615 if (val < -0x800 || val > 0x7ff) 3616 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3617 buf[lowbyte] = val & 0xff; 3618 buf[highbyte] |= (val >> 8) & 0xf; 3619 break; 3620 3621 case BFD_RELOC_32: 3622 case BFD_RELOC_32_PCREL: 3623 apply_full_field_fix (fixP, buf, val, 4); 3624 break; 3625 3626 case BFD_RELOC_16: 3627 apply_full_field_fix (fixP, buf, val, 2); 3628 break; 3629 3630 case BFD_RELOC_SH_USES: 3631 /* Pass the value into sh_reloc(). */ 3632 fixP->fx_addnumber = val; 3633 break; 3634 3635 case BFD_RELOC_SH_COUNT: 3636 case BFD_RELOC_SH_ALIGN: 3637 case BFD_RELOC_SH_CODE: 3638 case BFD_RELOC_SH_DATA: 3639 case BFD_RELOC_SH_LABEL: 3640 /* Nothing to do here. */ 3641 break; 3642 3643 case BFD_RELOC_SH_LOOP_START: 3644 case BFD_RELOC_SH_LOOP_END: 3645 3646 case BFD_RELOC_VTABLE_INHERIT: 3647 case BFD_RELOC_VTABLE_ENTRY: 3648 fixP->fx_done = 0; 3649 return; 3650 3651#ifdef OBJ_ELF 3652 case BFD_RELOC_32_PLT_PCREL: 3653 /* Make the jump instruction point to the address of the operand. At 3654 runtime we merely add the offset to the actual PLT entry. */ 3655 * valP = 0xfffffffc; 3656 val = fixP->fx_offset; 3657 if (fixP->fx_subsy) 3658 val -= S_GET_VALUE (fixP->fx_subsy); 3659 apply_full_field_fix (fixP, buf, val, 4); 3660 break; 3661 3662 case BFD_RELOC_SH_GOTPC: 3663 /* This is tough to explain. We end up with this one if we have 3664 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". 3665 The goal here is to obtain the absolute address of the GOT, 3666 and it is strongly preferable from a performance point of 3667 view to avoid using a runtime relocation for this. There are 3668 cases where you have something like: 3669 3670 .long _GLOBAL_OFFSET_TABLE_+[.-.L66] 3671 3672 and here no correction would be required. Internally in the 3673 assembler we treat operands of this form as not being pcrel 3674 since the '.' is explicitly mentioned, and I wonder whether 3675 it would simplify matters to do it this way. Who knows. In 3676 earlier versions of the PIC patches, the pcrel_adjust field 3677 was used to store the correction, but since the expression is 3678 not pcrel, I felt it would be confusing to do it this way. */ 3679 * valP -= 1; 3680 apply_full_field_fix (fixP, buf, val, 4); 3681 break; 3682 3683 case BFD_RELOC_SH_TLS_GD_32: 3684 case BFD_RELOC_SH_TLS_LD_32: 3685 case BFD_RELOC_SH_TLS_IE_32: 3686 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3687 /* Fallthrough */ 3688 case BFD_RELOC_32_GOT_PCREL: 3689 case BFD_RELOC_SH_GOT20: 3690 case BFD_RELOC_SH_GOTPLT32: 3691 case BFD_RELOC_SH_GOTFUNCDESC: 3692 case BFD_RELOC_SH_GOTFUNCDESC20: 3693 case BFD_RELOC_SH_GOTOFFFUNCDESC: 3694 case BFD_RELOC_SH_GOTOFFFUNCDESC20: 3695 case BFD_RELOC_SH_FUNCDESC: 3696 * valP = 0; /* Fully resolved at runtime. No addend. */ 3697 apply_full_field_fix (fixP, buf, 0, 4); 3698 break; 3699 3700 case BFD_RELOC_SH_TLS_LDO_32: 3701 case BFD_RELOC_SH_TLS_LE_32: 3702 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3703 /* Fallthrough */ 3704 case BFD_RELOC_32_GOTOFF: 3705 case BFD_RELOC_SH_GOTOFF20: 3706 apply_full_field_fix (fixP, buf, val, 4); 3707 break; 3708#endif 3709 3710 default: 3711 abort (); 3712 } 3713 3714 if (shift != 0) 3715 { 3716 if ((val & ((1 << shift) - 1)) != 0) 3717 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); 3718 if (val >= 0) 3719 val >>= shift; 3720 else 3721 val = ((val >> shift) 3722 | ((long) -1 & ~ ((long) -1 >> shift))); 3723 } 3724 3725 /* Extend sign for 64-bit host. */ 3726 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; 3727 if (max != 0 && (val < min || val > max)) 3728 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); 3729 else if (max != 0) 3730 /* Stop the generic code from trying to overflow check the value as well. 3731 It may not have the correct value anyway, as we do not store val back 3732 into *valP. */ 3733 fixP->fx_no_overflow = 1; 3734 3735 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 3736 fixP->fx_done = 1; 3737} 3738 3739/* Called just before address relaxation. Return the length 3740 by which a fragment must grow to reach it's destination. */ 3741 3742int 3743md_estimate_size_before_relax (fragS *fragP, segT segment_type) 3744{ 3745 int what; 3746 3747 switch (fragP->fr_subtype) 3748 { 3749 default: 3750 abort (); 3751 3752 case C (UNCOND_JUMP, UNDEF_DISP): 3753 /* Used to be a branch to somewhere which was unknown. */ 3754 if (!fragP->fr_symbol) 3755 { 3756 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3757 } 3758 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3759 { 3760 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3761 } 3762 else 3763 { 3764 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); 3765 } 3766 break; 3767 3768 case C (COND_JUMP, UNDEF_DISP): 3769 case C (COND_JUMP_DELAY, UNDEF_DISP): 3770 what = GET_WHAT (fragP->fr_subtype); 3771 /* Used to be a branch to somewhere which was unknown. */ 3772 if (fragP->fr_symbol 3773 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3774 { 3775 /* Got a symbol and it's defined in this segment, become byte 3776 sized - maybe it will fix up. */ 3777 fragP->fr_subtype = C (what, COND8); 3778 } 3779 else if (fragP->fr_symbol) 3780 { 3781 /* It's got a segment, but it's not ours, so it will always be long. */ 3782 fragP->fr_subtype = C (what, UNDEF_WORD_DISP); 3783 } 3784 else 3785 { 3786 /* We know the abs value. */ 3787 fragP->fr_subtype = C (what, COND8); 3788 } 3789 break; 3790 3791 case C (UNCOND_JUMP, UNCOND12): 3792 case C (UNCOND_JUMP, UNCOND32): 3793 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3794 case C (COND_JUMP, COND8): 3795 case C (COND_JUMP, COND12): 3796 case C (COND_JUMP, COND32): 3797 case C (COND_JUMP, UNDEF_WORD_DISP): 3798 case C (COND_JUMP_DELAY, COND8): 3799 case C (COND_JUMP_DELAY, COND12): 3800 case C (COND_JUMP_DELAY, COND32): 3801 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3802 /* When relaxing a section for the second time, we don't need to 3803 do anything besides return the current size. */ 3804 break; 3805 } 3806 3807 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; 3808 return fragP->fr_var; 3809} 3810 3811/* Put number into target byte order. */ 3812 3813void 3814md_number_to_chars (char *ptr, valueT use, int nbytes) 3815{ 3816 if (! target_big_endian) 3817 number_to_chars_littleendian (ptr, use, nbytes); 3818 else 3819 number_to_chars_bigendian (ptr, use, nbytes); 3820} 3821 3822/* This version is used in obj-coff.c eg. for the sh-hms target. */ 3823 3824long 3825md_pcrel_from (fixS *fixP) 3826{ 3827 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; 3828} 3829 3830long 3831md_pcrel_from_section (fixS *fixP, segT sec) 3832{ 3833 if (! sh_local_pcrel (fixP) 3834 && fixP->fx_addsy != (symbolS *) NULL 3835 && (generic_force_reloc (fixP) 3836 || S_GET_SEGMENT (fixP->fx_addsy) != sec)) 3837 { 3838 /* The symbol is undefined (or is defined but not in this section, 3839 or we're not sure about it being the final definition). Let the 3840 linker figure it out. We need to adjust the subtraction of a 3841 symbol to the position of the relocated data, though. */ 3842 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; 3843 } 3844 3845 return md_pcrel_from (fixP); 3846} 3847 3848/* Create a reloc. */ 3849 3850arelent * 3851tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 3852{ 3853 arelent *rel; 3854 bfd_reloc_code_real_type r_type; 3855 3856 rel = XNEW (arelent); 3857 rel->sym_ptr_ptr = XNEW (asymbol *); 3858 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 3859 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 3860 3861 r_type = fixp->fx_r_type; 3862 3863 if (SWITCH_TABLE (fixp)) 3864 { 3865 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 3866 rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy); 3867 if (r_type == BFD_RELOC_16) 3868 r_type = BFD_RELOC_SH_SWITCH16; 3869 else if (r_type == BFD_RELOC_8) 3870 r_type = BFD_RELOC_8_PCREL; 3871 else if (r_type == BFD_RELOC_32) 3872 r_type = BFD_RELOC_SH_SWITCH32; 3873 else 3874 abort (); 3875 } 3876 else if (r_type == BFD_RELOC_SH_USES) 3877 rel->addend = fixp->fx_addnumber; 3878 else if (r_type == BFD_RELOC_SH_COUNT) 3879 rel->addend = fixp->fx_offset; 3880 else if (r_type == BFD_RELOC_SH_ALIGN) 3881 rel->addend = fixp->fx_offset; 3882 else if (r_type == BFD_RELOC_VTABLE_INHERIT 3883 || r_type == BFD_RELOC_VTABLE_ENTRY) 3884 rel->addend = fixp->fx_offset; 3885 else if (r_type == BFD_RELOC_SH_LOOP_START 3886 || r_type == BFD_RELOC_SH_LOOP_END) 3887 rel->addend = fixp->fx_offset; 3888 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) 3889 { 3890 rel->addend = 0; 3891 rel->address = rel->addend = fixp->fx_offset; 3892 } 3893 else 3894 rel->addend = fixp->fx_addnumber; 3895 3896 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); 3897 3898 if (rel->howto == NULL) 3899 { 3900 as_bad_where (fixp->fx_file, fixp->fx_line, 3901 _("Cannot represent relocation type %s"), 3902 bfd_get_reloc_code_name (r_type)); 3903 /* Set howto to a garbage value so that we can keep going. */ 3904 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 3905 gas_assert (rel->howto != NULL); 3906 } 3907#ifdef OBJ_ELF 3908 else if (rel->howto->type == R_SH_IND12W) 3909 rel->addend += fixp->fx_offset - 4; 3910#endif 3911 3912 return rel; 3913} 3914 3915#ifdef OBJ_ELF 3916inline static char * 3917sh_end_of_match (char *cont, const char *what) 3918{ 3919 int len = strlen (what); 3920 3921 if (strncasecmp (cont, what, strlen (what)) == 0 3922 && ! is_part_of_name (cont[len])) 3923 return cont + len; 3924 3925 return NULL; 3926} 3927 3928int 3929sh_parse_name (char const *name, 3930 expressionS *exprP, 3931 enum expr_mode mode, 3932 char *nextcharP) 3933{ 3934 char *next = input_line_pointer; 3935 char *next_end; 3936 int reloc_type; 3937 segT segment; 3938 3939 exprP->X_op_symbol = NULL; 3940 3941 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 3942 { 3943 if (! GOT_symbol) 3944 GOT_symbol = symbol_find_or_make (name); 3945 3946 exprP->X_add_symbol = GOT_symbol; 3947 no_suffix: 3948 /* If we have an absolute symbol or a reg, then we know its 3949 value now. */ 3950 segment = S_GET_SEGMENT (exprP->X_add_symbol); 3951 if (mode != expr_defer && segment == absolute_section) 3952 { 3953 exprP->X_op = O_constant; 3954 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 3955 exprP->X_add_symbol = NULL; 3956 } 3957 else if (mode != expr_defer && segment == reg_section) 3958 { 3959 exprP->X_op = O_register; 3960 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 3961 exprP->X_add_symbol = NULL; 3962 } 3963 else 3964 { 3965 exprP->X_op = O_symbol; 3966 exprP->X_add_number = 0; 3967 } 3968 3969 return 1; 3970 } 3971 3972 exprP->X_add_symbol = symbol_find_or_make (name); 3973 3974 if (*nextcharP != '@') 3975 goto no_suffix; 3976 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) 3977 reloc_type = BFD_RELOC_32_GOTOFF; 3978 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) 3979 reloc_type = BFD_RELOC_SH_GOTPLT32; 3980 else if ((next_end = sh_end_of_match (next + 1, "GOT"))) 3981 reloc_type = BFD_RELOC_32_GOT_PCREL; 3982 else if ((next_end = sh_end_of_match (next + 1, "PLT"))) 3983 reloc_type = BFD_RELOC_32_PLT_PCREL; 3984 else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) 3985 reloc_type = BFD_RELOC_SH_TLS_GD_32; 3986 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) 3987 reloc_type = BFD_RELOC_SH_TLS_LD_32; 3988 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) 3989 reloc_type = BFD_RELOC_SH_TLS_IE_32; 3990 else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) 3991 reloc_type = BFD_RELOC_SH_TLS_LE_32; 3992 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) 3993 reloc_type = BFD_RELOC_SH_TLS_LDO_32; 3994 else if ((next_end = sh_end_of_match (next + 1, "PCREL"))) 3995 reloc_type = BFD_RELOC_32_PCREL; 3996 else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC"))) 3997 reloc_type = BFD_RELOC_SH_GOTFUNCDESC; 3998 else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC"))) 3999 reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC; 4000 else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC"))) 4001 reloc_type = BFD_RELOC_SH_FUNCDESC; 4002 else 4003 goto no_suffix; 4004 4005 *input_line_pointer = *nextcharP; 4006 input_line_pointer = next_end; 4007 *nextcharP = *input_line_pointer; 4008 *input_line_pointer = '\0'; 4009 4010 exprP->X_op = O_PIC_reloc; 4011 exprP->X_add_number = 0; 4012 exprP->X_md = reloc_type; 4013 4014 return 1; 4015} 4016 4017void 4018sh_cfi_frame_initial_instructions (void) 4019{ 4020 cfi_add_CFA_def_cfa (15, 0); 4021} 4022 4023int 4024sh_regname_to_dw2regnum (char *regname) 4025{ 4026 unsigned int regnum = -1; 4027 unsigned int i; 4028 const char *p; 4029 char *q; 4030 static struct { const char *name; int dw2regnum; } regnames[] = 4031 { 4032 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, 4033 { "macl", 21 }, { "fpul", 23 } 4034 }; 4035 4036 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 4037 if (strcmp (regnames[i].name, regname) == 0) 4038 return regnames[i].dw2regnum; 4039 4040 if (regname[0] == 'r') 4041 { 4042 p = regname + 1; 4043 regnum = strtoul (p, &q, 10); 4044 if (p == q || *q || regnum >= 16) 4045 return -1; 4046 } 4047 else if (regname[0] == 'f' && regname[1] == 'r') 4048 { 4049 p = regname + 2; 4050 regnum = strtoul (p, &q, 10); 4051 if (p == q || *q || regnum >= 16) 4052 return -1; 4053 regnum += 25; 4054 } 4055 else if (regname[0] == 'x' && regname[1] == 'd') 4056 { 4057 p = regname + 2; 4058 regnum = strtoul (p, &q, 10); 4059 if (p == q || *q || regnum >= 8) 4060 return -1; 4061 regnum += 87; 4062 } 4063 return regnum; 4064} 4065#endif /* OBJ_ELF */ 4066