1/* Definitions of target machine for TI PRU. 2 Copyright (C) 2014-2022 Free Software Foundation, Inc. 3 Contributed by Dimitar Dimitrov <dimitar@dinux.eu> 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published 9 by the Free Software Foundation; either version 3, or (at your 10 option) any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING3. If not see 19 <http://www.gnu.org/licenses/>. */ 20 21#ifndef GCC_PRU_H 22#define GCC_PRU_H 23 24#include "config/pru/pru-opts.h" 25 26/* Define built-in preprocessor macros. */ 27#define TARGET_CPU_CPP_BUILTINS() \ 28 do \ 29 { \ 30 builtin_define_std ("__PRU__"); \ 31 builtin_define_std ("__pru__"); \ 32 builtin_define_std ("__PRU_V3__"); \ 33 builtin_define_std ("__LITTLE_ENDIAN__"); \ 34 builtin_define_std ("__little_endian__"); \ 35 /* Trampolines are disabled for now. */ \ 36 builtin_define_std ("NO_TRAMPOLINES"); \ 37 } \ 38 while (0) 39 40/* TI ABI implementation is not feature-complete enough (e.g. function 41 pointers are not supported), so we cannot list it as a multilib variant. 42 To prevent misuse from users, do not link any of the standard libraries. */ 43#define DRIVER_SELF_SPECS \ 44 "%{mabi=ti:-nodefaultlibs} " \ 45 "%{mmcu=*:-specs=device-specs/%*%s %<mmcu=*} " 46 47#undef CPP_SPEC 48#define CPP_SPEC \ 49 "%(cpp_device) " \ 50 "%{mabi=ti:-D__PRU_EABI_TI__; :-D__PRU_EABI_GNU__}" 51 52/* Do not relax when in TI ABI mode since TI tools do not always 53 put PRU_S10_PCREL. */ 54#undef LINK_SPEC 55#define LINK_SPEC \ 56 "%(link_device) " \ 57 "%{mabi=ti:--no-relax;:%{mno-relax:--no-relax;:--relax}} " \ 58 "%{shared:%eshared is not supported} " 59 60/* CRT0 is carefully maintained to be compatible with both GNU and TI ABIs. */ 61#undef STARTFILE_SPEC 62#define STARTFILE_SPEC \ 63 "%{!pg:%{minrt:crt0-minrt.o%s}%{!minrt:crt0.o%s}} %{!mabi=ti:-lgcc} " 64 65#undef ENDFILE_SPEC 66#define ENDFILE_SPEC "%{!mabi=ti:-lgloss} " 67 68/* TI ABI mandates that ELF symbols do not start with any prefix. */ 69#undef USER_LABEL_PREFIX 70#define USER_LABEL_PREFIX "" 71 72#undef LOCAL_LABEL_PREFIX 73#define LOCAL_LABEL_PREFIX ".L" 74 75/* Storage layout. */ 76 77#define DEFAULT_SIGNED_CHAR 0 78#define BITS_BIG_ENDIAN 0 79#define BYTES_BIG_ENDIAN 0 80#define WORDS_BIG_ENDIAN 0 81 82/* PRU is represented in GCC as an 8-bit CPU with fast 16-bit and 32-bit 83 arithmetic. */ 84#define BITS_PER_WORD 8 85 86#ifdef IN_LIBGCC2 87/* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */ 88#define UNITS_PER_WORD 4 89#else 90/* Width of a word, in units (bytes). */ 91#define UNITS_PER_WORD 1 92#endif 93 94#define POINTER_SIZE 32 95#define BIGGEST_ALIGNMENT 8 96#define STRICT_ALIGNMENT 0 97#define FUNCTION_BOUNDARY 8 /* Func pointers are word-addressed. */ 98#define PARM_BOUNDARY 8 99#define STACK_BOUNDARY 8 100#define MAX_FIXED_MODE_SIZE 64 101 102#define POINTERS_EXTEND_UNSIGNED 1 103 104/* Layout of source language data types. */ 105 106#define INT_TYPE_SIZE 32 107#define SHORT_TYPE_SIZE 16 108#define LONG_TYPE_SIZE 32 109#define LONG_LONG_TYPE_SIZE 64 110#define FLOAT_TYPE_SIZE 32 111#define DOUBLE_TYPE_SIZE 64 112#define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE 113 114#undef SIZE_TYPE 115#define SIZE_TYPE "unsigned int" 116 117#undef PTRDIFF_TYPE 118#define PTRDIFF_TYPE "int" 119 120 121/* Basic characteristics of PRU registers: 122 123 Regno Name 124 0 r0 Caller Saved. Also used as a static chain register. 125 1 r1 Caller Saved. Also used as a temporary by function. 126 profiler and function prologue/epilogue. 127 2 r2 sp Stack Pointer. 128 3* r3.w0 Caller saved. 129 3* r3.w2 ra Return Address (16-bit). 130 4 r4 fp Frame Pointer, also called Argument Pointer in ABI. 131 5-13 r5-r13 Callee Saved Registers. 132 14-29 r14-r29 Register Arguments. Caller Saved Registers. 133 14-15 r14-r15 Return Location. 134 30 r30 Special I/O register. Not used by compiler. 135 31 r31 Special I/O register. Not used by compiler. 136 137 32 loop_cntr Internal register used as a counter by LOOP insns. 138 139 33 pc Not an actual register. 140 141 34 fake_fp Fake Frame Pointer (always eliminated). 142 35 fake_ap Fake Argument Pointer (always eliminated). 143 36 First Pseudo Register. 144 145 The definitions for some hard register numbers are located in pru.md. 146 Note that GCC's internal register numbering differs from the conventional 147 register naming in PRU ISA. PRU ISA defines word-based register numbers 148 and sub-register suffixes (e.g. RA is r3.w0). GCC uses linear numbering 149 of 8 bit sub-registers (e.g. RA starts at r12). When outputting assembly, 150 GCC will take into account the RTL operand size (e.g. r12:HI) in order to 151 translate to the conventional PRU ISA format expected by GAS (r3.w0). 152*/ 153 154#define FIXED_REGISTERS \ 155 { \ 156/* 0 */ 0,0,0,0, 0,0,0,0, 1,1,1,1, 0,0,1,1, \ 157/* 4 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \ 158/* 8 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \ 159/* 12 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \ 160/* 16 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \ 161/* 20 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \ 162/* 24 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \ 163/* 28 */ 0,0,0,0, 0,0,0,0, 1,1,1,1, 1,1,1,1, \ 164/* 32 */ 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1 \ 165 } 166 167/* Call used == caller saved + fixed regs + args + ret vals. */ 168#define CALL_USED_REGISTERS \ 169 { \ 170/* 0 */ 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, \ 171/* 4 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \ 172/* 8 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \ 173/* 12 */ 0,0,0,0, 0,0,0,0, 1,1,1,1, 1,1,1,1, \ 174/* 16 */ 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, \ 175/* 20 */ 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, \ 176/* 24 */ 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, \ 177/* 28 */ 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, \ 178/* 32 */ 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1 \ 179 } 180 181#define PRU_SEQ_R(X) (X) * 4 + 0, (X) * 4 + 1, (X) * 4 + 2, (X) * 4 + 3 182#define PRU_SEQ_R_W0(X) (X) * 4 + 0, (X) * 4 + 1 183#define PRU_SEQ_R_W2(X) (X) * 4 + 2, (X) * 4 + 3 184#define REG_ALLOC_ORDER \ 185 { \ 186 /* Call-clobbered, yet not used for parameters. */ \ 187 PRU_SEQ_R (0), PRU_SEQ_R ( 1), \ 188 PRU_SEQ_R_W0 (3), \ 189 \ 190 PRU_SEQ_R (14), PRU_SEQ_R (15), PRU_SEQ_R (16), PRU_SEQ_R (17), \ 191 PRU_SEQ_R (18), PRU_SEQ_R (19), PRU_SEQ_R (20), PRU_SEQ_R (21), \ 192 PRU_SEQ_R (22), PRU_SEQ_R (23), PRU_SEQ_R (24), PRU_SEQ_R (25), \ 193 PRU_SEQ_R (26), PRU_SEQ_R (27), PRU_SEQ_R (28), PRU_SEQ_R (29), \ 194 \ 195 PRU_SEQ_R ( 5), PRU_SEQ_R ( 6), PRU_SEQ_R ( 7), PRU_SEQ_R ( 8), \ 196 PRU_SEQ_R ( 9), PRU_SEQ_R (10), PRU_SEQ_R (11), PRU_SEQ_R (12), \ 197 PRU_SEQ_R (13), \ 198 \ 199 PRU_SEQ_R ( 4), \ 200 PRU_SEQ_R ( 2), \ 201 PRU_SEQ_R_W2 (3), \ 202 \ 203 /* I/O and virtual registers. */ \ 204 PRU_SEQ_R (30), PRU_SEQ_R (31), PRU_SEQ_R (32), PRU_SEQ_R (33), \ 205 PRU_SEQ_R (34), PRU_SEQ_R (35) \ 206 } 207 208/* Register Classes. */ 209 210enum reg_class 211{ 212 NO_REGS, 213 SIB_REGS, 214 LOOPCNTR_REGS, 215 MULDST_REGS, 216 MULSRC0_REGS, 217 MULSRC1_REGS, 218 REGIO_REGS, 219 GP_REGS, 220 ALL_REGS, 221 LIM_REG_CLASSES 222}; 223 224#define N_REG_CLASSES (int) LIM_REG_CLASSES 225 226#define REG_CLASS_NAMES \ 227 { "NO_REGS", \ 228 "SIB_REGS", \ 229 "LOOPCNTR_REGS", \ 230 "MULDST_REGS", \ 231 "MULSRC0_REGS", \ 232 "MULSRC1_REGS", \ 233 "REGIO_REGS", \ 234 "GP_REGS", \ 235 "ALL_REGS" } 236 237#define GENERAL_REGS ALL_REGS 238 239#define REG_CLASS_CONTENTS \ 240 { \ 241 /* NO_REGS */ { 0, 0, 0, 0, 0}, \ 242 /* SIB_REGS */ { 0xf, 0xff000000, ~0, 0xffffff, 0}, \ 243 /* LOOPCNTR_REGS */ { 0, 0, 0, 0, 0xf}, \ 244 /* MULDST_REGS */ { 0, 0, 0, 0x00000f00, 0}, \ 245 /* MULSRC0_REGS */ { 0, 0, 0, 0x000f0000, 0}, \ 246 /* MULSRC1_REGS */ { 0, 0, 0, 0x00f00000, 0}, \ 247 /* REGIO_REGS */ { 0, 0, 0, 0xff000000, 0}, \ 248 /* GP_REGS */ { ~0, ~0, ~0, ~0, 0}, \ 249 /* ALL_REGS */ { ~0,~0, ~0, ~0, ~0} \ 250 } 251 252 253#define GP_REG_P(REGNO) ((unsigned)(REGNO) <= LAST_GP_REGNUM) 254#define REGNO_REG_CLASS(REGNO) \ 255 ((REGNO) == MULDST_REGNUM ? MULDST_REGS \ 256 : (REGNO) == MULSRC0_REGNUM ? MULSRC0_REGS \ 257 : (REGNO) == MULSRC1_REGNUM ? MULSRC1_REGS \ 258 : (REGNO) == R30_REGNUM ? REGIO_REGS \ 259 : (REGNO) == R31_REGNUM ? REGIO_REGS \ 260 : (REGNO) >= FIRST_ARG_REGNUM \ 261 && (REGNO) <= LAST_ARG_REGNUM ? SIB_REGS \ 262 : (REGNO) == STATIC_CHAIN_REGNUM ? SIB_REGS \ 263 : (REGNO) == LOOPCNTR_REGNUM ? LOOPCNTR_REGS \ 264 : (REGNO) <= LAST_NONIO_GP_REGNUM ? GP_REGS \ 265 : ALL_REGS) 266 267#define CLASS_MAX_NREGS(CLASS, MODE) \ 268 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 269 270/* Arbitrarily set to a non-argument register. Not defined by TI ABI. */ 271#define STATIC_CHAIN_REGNUM 0 /* r0 */ 272 273/* Tests for various kinds of constants used in the PRU port. */ 274#define SHIFT_INT(X) (IN_RANGE ((X), 0, 31)) 275 276#define UHWORD_INT(X) (IN_RANGE ((X), 0, 0xffff)) 277#define SHWORD_INT(X) (IN_RANGE ((X), -32768, 32767)) 278#define UBYTE_INT(X) (IN_RANGE ((X), 0, 0xff)) 279#define SBYTE_INT(X) (IN_RANGE ((X), -128, 127)) 280 281/* Say that the epilogue uses the return address register. Note that 282 in the case of sibcalls, the values "used by the epilogue" are 283 considered live at the start of the called function. */ 284#define EPILOGUE_USES(REGNO) (epilogue_completed \ 285 && (((REGNO) == RA_REGNUM) \ 286 || (REGNO) == (RA_REGNUM + 1))) 287 288/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 289 the stack pointer does not matter. The value is tested only in 290 functions that have frame pointers. 291 No definition is equivalent to always zero. */ 292 293#define EXIT_IGNORE_STACK 1 294 295/* Trampolines are not supported, but put a define to keep the build. */ 296#define TRAMPOLINE_SIZE 4 297 298/* Stack layout. */ 299#define STACK_GROWS_DOWNWARD 1 300#undef FRAME_GROWS_DOWNWARD 301#define FIRST_PARM_OFFSET(FUNDECL) 0 302 303/* Before the prologue, RA lives in r3.w2. */ 304#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (HImode, RA_REGNUM) 305 306#define RETURN_ADDR_RTX(C,F) pru_get_return_address (C) 307 308#define DWARF_FRAME_RETURN_COLUMN RA_REGNUM 309 310/* The CFA includes the pretend args. */ 311#define ARG_POINTER_CFA_OFFSET(FNDECL) \ 312 (gcc_assert ((FNDECL) == current_function_decl), \ 313 FIRST_PARM_OFFSET (FNDECL) + crtl->args.pretend_args_size) 314 315/* Frame/arg pointer elimination settings. */ 316#define ELIMINABLE_REGS \ 317{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 318 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 319 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 320 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} 321 322#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 323 (OFFSET) = pru_initial_elimination_offset ((FROM), (TO)) 324 325#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ 326 pru_hard_regno_rename_ok (OLD_REG, NEW_REG) 327 328/* Calling convention definitions. */ 329#if !defined(IN_LIBGCC2) 330 331#define NUM_ARG_REGS (LAST_ARG_REGNUM - FIRST_ARG_REGNUM + 1) 332 333typedef struct pru_args 334{ 335 bool regs_used[NUM_ARG_REGS]; 336} CUMULATIVE_ARGS; 337 338#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 339 do { \ 340 memset ((CUM).regs_used, 0, sizeof ((CUM).regs_used)); \ 341 } while (0) 342 343#define FUNCTION_ARG_REGNO_P(REGNO) \ 344 ((REGNO) >= FIRST_ARG_REGNUM && (REGNO) <= LAST_ARG_REGNUM) 345 346/* Passing function arguments on stack. */ 347#define ACCUMULATE_OUTGOING_ARGS 1 348 349/* We define TARGET_RETURN_IN_MEMORY, so set to zero. */ 350#define DEFAULT_PCC_STRUCT_RETURN 0 351 352/* Profiling. */ 353#define PROFILE_BEFORE_PROLOGUE 354#define NO_PROFILE_COUNTERS 1 355#define FUNCTION_PROFILER(FILE, LABELNO) \ 356 pru_function_profiler ((FILE), (LABELNO)) 357 358#endif /* IN_LIBGCC2 */ 359 360/* Addressing modes. */ 361 362#define CONSTANT_ADDRESS_P(X) \ 363 (CONSTANT_P (X) && memory_address_p (SImode, X)) 364 365#define MAX_REGS_PER_ADDRESS 2 366#define BASE_REG_CLASS ALL_REGS 367#define INDEX_REG_CLASS ALL_REGS 368 369#define REGNO_OK_FOR_BASE_P(REGNO) pru_regno_ok_for_base_p ((REGNO), true) 370#define REGNO_OK_FOR_INDEX_P(REGNO) pru_regno_ok_for_index_p ((REGNO), true) 371 372/* Limited by the insns in pru-ldst-multiple.md. */ 373#define MOVE_MAX 8 374#define SLOW_BYTE_ACCESS 1 375 376/* It is as good to call a constant function address as to call an address 377 kept in a register. */ 378#define NO_FUNCTION_CSE 1 379 380/* Define output assembler language. */ 381 382#define ASM_APP_ON "#APP\n" 383#define ASM_APP_OFF "#NO_APP\n" 384 385#define ASM_COMMENT_START "# " 386 387#define GLOBAL_ASM_OP "\t.global\t" 388 389#define PRU_NAME_R(X) X".b0", X".b1", X".b2", X".b3" 390#define REGISTER_NAMES \ 391 { \ 392 PRU_NAME_R ("r0"), \ 393 PRU_NAME_R ("r1"), \ 394 PRU_NAME_R ("r2"), \ 395 PRU_NAME_R ("r3"), \ 396 PRU_NAME_R ("r4"), \ 397 PRU_NAME_R ("r5"), \ 398 PRU_NAME_R ("r6"), \ 399 PRU_NAME_R ("r7"), \ 400 PRU_NAME_R ("r8"), \ 401 PRU_NAME_R ("r9"), \ 402 PRU_NAME_R ("r10"), \ 403 PRU_NAME_R ("r11"), \ 404 PRU_NAME_R ("r12"), \ 405 PRU_NAME_R ("r13"), \ 406 PRU_NAME_R ("r14"), \ 407 PRU_NAME_R ("r15"), \ 408 PRU_NAME_R ("r16"), \ 409 PRU_NAME_R ("r17"), \ 410 PRU_NAME_R ("r18"), \ 411 PRU_NAME_R ("r19"), \ 412 PRU_NAME_R ("r20"), \ 413 PRU_NAME_R ("r21"), \ 414 PRU_NAME_R ("r22"), \ 415 PRU_NAME_R ("r23"), \ 416 PRU_NAME_R ("r24"), \ 417 PRU_NAME_R ("r25"), \ 418 PRU_NAME_R ("r26"), \ 419 PRU_NAME_R ("r27"), \ 420 PRU_NAME_R ("r28"), \ 421 PRU_NAME_R ("r29"), \ 422 PRU_NAME_R ("r30"), \ 423 PRU_NAME_R ("r31"), \ 424 PRU_NAME_R ("loopcntr_reg"), \ 425 PRU_NAME_R ("pc"), \ 426 PRU_NAME_R ("fake_fp"), \ 427 PRU_NAME_R ("fake_ap"), \ 428} 429 430#define PRU_OVERLAP_R(X) \ 431 { "r" #X , X * 4 , 4 }, \ 432 { "r" #X ".w0", X * 4 + 0 , 2 }, \ 433 { "r" #X ".w1", X * 4 + 1 , 2 }, \ 434 { "r" #X ".w2", X * 4 + 2 , 2 } 435 436#define OVERLAPPING_REGISTER_NAMES \ 437 { \ 438 /* Aliases. */ \ 439 { "sp", 2 * 4, 4 }, \ 440 { "ra", 3 * 4, 2 }, \ 441 { "fp", 4 * 4, 4 }, \ 442 PRU_OVERLAP_R (0), \ 443 PRU_OVERLAP_R (1), \ 444 PRU_OVERLAP_R (2), \ 445 PRU_OVERLAP_R (3), \ 446 PRU_OVERLAP_R (4), \ 447 PRU_OVERLAP_R (5), \ 448 PRU_OVERLAP_R (6), \ 449 PRU_OVERLAP_R (7), \ 450 PRU_OVERLAP_R (8), \ 451 PRU_OVERLAP_R (9), \ 452 PRU_OVERLAP_R (10), \ 453 PRU_OVERLAP_R (11), \ 454 PRU_OVERLAP_R (12), \ 455 PRU_OVERLAP_R (13), \ 456 PRU_OVERLAP_R (14), \ 457 PRU_OVERLAP_R (15), \ 458 PRU_OVERLAP_R (16), \ 459 PRU_OVERLAP_R (17), \ 460 PRU_OVERLAP_R (18), \ 461 PRU_OVERLAP_R (19), \ 462 PRU_OVERLAP_R (20), \ 463 PRU_OVERLAP_R (21), \ 464 PRU_OVERLAP_R (22), \ 465 PRU_OVERLAP_R (23), \ 466 PRU_OVERLAP_R (24), \ 467 PRU_OVERLAP_R (25), \ 468 PRU_OVERLAP_R (26), \ 469 PRU_OVERLAP_R (27), \ 470 PRU_OVERLAP_R (28), \ 471 PRU_OVERLAP_R (29), \ 472 PRU_OVERLAP_R (30), \ 473 PRU_OVERLAP_R (31), \ 474} 475 476#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 477 do \ 478 { \ 479 fputs (integer_asm_op (POINTER_SIZE / BITS_PER_UNIT, TRUE), FILE); \ 480 fprintf (FILE, "%%pmem(.L%u)\n", (unsigned) (VALUE)); \ 481 } \ 482 while (0) 483 484#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ 485 do \ 486 { \ 487 fputs (integer_asm_op (POINTER_SIZE / BITS_PER_UNIT, TRUE), STREAM); \ 488 fprintf (STREAM, "%%pmem(.L%u-.L%u)\n", (unsigned) (VALUE), \ 489 (unsigned) (REL)); \ 490 } \ 491 while (0) 492 493/* Section directives. */ 494 495/* Output before read-only data. */ 496#define TEXT_SECTION_ASM_OP "\t.section\t.text" 497 498/* Output before writable data. */ 499#define DATA_SECTION_ASM_OP "\t.section\t.data" 500 501/* Output before uninitialized data. */ 502#define BSS_SECTION_ASM_OP "\t.section\t.bss" 503 504#define CTORS_SECTION_ASM_OP "\t.section\t.init_array,\"aw\",%init_array" 505#define DTORS_SECTION_ASM_OP "\t.section\t.fini_array,\"aw\",%fini_array" 506 507#undef INIT_SECTION_ASM_OP 508#undef FINI_SECTION_ASM_OP 509#define INIT_ARRAY_SECTION_ASM_OP CTORS_SECTION_ASM_OP 510#define FINI_ARRAY_SECTION_ASM_OP DTORS_SECTION_ASM_OP 511 512/* Since we use .init_array/.fini_array we don't need the markers at 513 the start and end of the ctors/dtors arrays. */ 514#define CTOR_LIST_BEGIN asm (CTORS_SECTION_ASM_OP) 515#define CTOR_LIST_END /* empty */ 516#define DTOR_LIST_BEGIN asm (DTORS_SECTION_ASM_OP) 517#define DTOR_LIST_END /* empty */ 518 519#undef TARGET_ASM_CONSTRUCTOR 520#define TARGET_ASM_CONSTRUCTOR pru_elf_asm_constructor 521 522#undef TARGET_ASM_DESTRUCTOR 523#define TARGET_ASM_DESTRUCTOR pru_elf_asm_destructor 524 525#define ASM_OUTPUT_ALIGN(FILE, LOG) \ 526 do { \ 527 fprintf ((FILE), "%s%d\n", ALIGN_ASM_OP, (LOG)); \ 528 } while (0) 529 530#undef ASM_OUTPUT_ALIGNED_COMMON 531#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ 532do \ 533 { \ 534 fprintf ((FILE), "%s", COMMON_ASM_OP); \ 535 assemble_name ((FILE), (NAME)); \ 536 fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED ",%u\n", (SIZE), \ 537 (ALIGN) / BITS_PER_UNIT); \ 538 } \ 539while (0) 540 541 542/* This says how to output assembler code to declare an 543 uninitialized internal linkage data object. Under SVR4, 544 the linker seems to want the alignment of data objects 545 to depend on their types. We do exactly that here. */ 546 547#undef ASM_OUTPUT_ALIGNED_LOCAL 548#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ 549do { \ 550 switch_to_section (bss_section); \ 551 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \ 552 if (!flag_inhibit_size_directive) \ 553 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \ 554 ASM_OUTPUT_ALIGN ((FILE), exact_log2 ((ALIGN) / BITS_PER_UNIT)); \ 555 ASM_OUTPUT_LABEL (FILE, NAME); \ 556 ASM_OUTPUT_SKIP ((FILE), (SIZE) ? (SIZE) : 1); \ 557} while (0) 558 559/* Misc parameters. */ 560 561#define TARGET_SUPPORTS_WIDE_INT 1 562 563#define STORE_FLAG_VALUE 1 564#define Pmode SImode 565#define FUNCTION_MODE Pmode 566 567#define CASE_VECTOR_MODE Pmode 568 569/* See definition of clz pattern for rationale of the value. */ 570#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ 571 ((VALUE) = GET_MODE_BITSIZE (MODE) - 1 - 32, 2) 572 573/* Jumps are cheap on PRU. */ 574#define LOGICAL_OP_NON_SHORT_CIRCUIT 0 575 576/* Unfortunately the LBBO instruction does not zero-extend data. */ 577#undef LOAD_EXTEND_OP 578 579#undef WORD_REGISTER_OPERATIONS 580 581#define HAS_LONG_UNCOND_BRANCH 1 582#define HAS_LONG_COND_BRANCH 1 583 584#define REGISTER_TARGET_PRAGMAS() pru_register_pragmas () 585 586#endif /* GCC_PRU_H */ 587