v850.h revision 1.6
1/* Definitions of target machine for GNU compiler. NEC V850 series 2 Copyright (C) 1996-2016 Free Software Foundation, Inc. 3 Contributed by Jeff Law (law@cygnus.com). 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 Under Section 7 of GPL version 3, you are granted additional 18 permissions described in the GCC Runtime Library Exception, version 19 3.1, as published by the Free Software Foundation. 20 21 You should have received a copy of the GNU General Public License and 22 a copy of the GCC Runtime Library Exception along with this program; 23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 24 <http://www.gnu.org/licenses/>. */ 25 26#ifndef GCC_V850_H 27#define GCC_V850_H 28 29extern GTY(()) rtx v850_compare_op0; 30extern GTY(()) rtx v850_compare_op1; 31 32#undef LIB_SPEC 33#define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -lgcc --end-group}}" 34 35#undef ENDFILE_SPEC 36#undef LINK_SPEC 37#undef STARTFILE_SPEC 38#undef ASM_SPEC 39 40#define TARGET_CPU_generic 1 41#define TARGET_CPU_v850e 2 42#define TARGET_CPU_v850e1 3 43#define TARGET_CPU_v850e2 4 44#define TARGET_CPU_v850e2v3 5 45#define TARGET_CPU_v850e3v5 6 46 47#ifndef TARGET_CPU_DEFAULT 48#define TARGET_CPU_DEFAULT TARGET_CPU_generic 49#endif 50 51#define MASK_DEFAULT MASK_V850 52#define SUBTARGET_ASM_SPEC "%{!mv*:-mv850}" 53#define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850__}" 54 55/* Choose which processor will be the default. 56 We must pass a -mv850xx option to the assembler if no explicit -mv* option 57 is given, because the assembler's processor default may not be correct. */ 58#if TARGET_CPU_DEFAULT == TARGET_CPU_v850e 59#undef MASK_DEFAULT 60#define MASK_DEFAULT MASK_V850E 61#undef SUBTARGET_ASM_SPEC 62#define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e}" 63#undef SUBTARGET_CPP_SPEC 64#define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e__}" 65#endif 66 67#if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1 68#undef MASK_DEFAULT 69#define MASK_DEFAULT MASK_V850E /* No practical difference. */ 70#undef SUBTARGET_ASM_SPEC 71#define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e1}" 72#undef SUBTARGET_CPP_SPEC 73#define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e1__} %{mv850e1:-D__v850e1__}" 74#endif 75 76#if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2 77#undef MASK_DEFAULT 78#define MASK_DEFAULT MASK_V850E2 79#undef SUBTARGET_ASM_SPEC 80#define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2}" 81#undef SUBTARGET_CPP_SPEC 82#define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2__} %{mv850e2:-D__v850e2__}" 83#endif 84 85#if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2v3 86#undef MASK_DEFAULT 87#define MASK_DEFAULT MASK_V850E2V3 88#undef SUBTARGET_ASM_SPEC 89#define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2v3}" 90#undef SUBTARGET_CPP_SPEC 91#define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2v3__} %{mv850e2v3:-D__v850e2v3__}" 92#endif 93 94#if TARGET_CPU_DEFAULT == TARGET_CPU_v850e3v5 95#undef MASK_DEFAULT 96#define MASK_DEFAULT MASK_V850E3V5 97#undef SUBTARGET_ASM_SPEC 98#define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e3v5}" 99#undef SUBTARGET_CPP_SPEC 100#define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e3v5__} %{mv850e3v5:-D__v850e3v5__}" 101#undef TARGET_VERSION 102#define TARGET_VERSION fprintf (stderr, " (Renesas V850E3V5)"); 103#endif 104 105#define TARGET_V850E3V5_UP ((TARGET_V850E3V5)) 106#define TARGET_V850E2V3_UP ((TARGET_V850E2V3) || TARGET_V850E3V5_UP) 107#define TARGET_V850E2_UP ((TARGET_V850E2) || TARGET_V850E2V3_UP) 108#define TARGET_V850E_UP ((TARGET_V850E) || TARGET_V850E2_UP) 109#define TARGET_ALL ((TARGET_V850) || TARGET_V850E_UP) 110 111#define ASM_SPEC "%{m850es:-mv850e1}%{!mv850es:%{mv*:-mv%*}} \ 112%{mrelax:-mrelax} \ 113%{m8byte-align:-m8byte-align} \ 114%{msoft-float:-msoft-float} \ 115%{mhard-float:-mhard-float} \ 116%{mgcc-abi:-mgcc-abi}" 117 118#define LINK_SPEC "%{mgcc-abi:-m v850}" 119 120#define CPP_SPEC "\ 121 %{mv850e3v5:-D__v850e3v5__} \ 122 %{mv850e2v3:-D__v850e2v3__} \ 123 %{mv850e2:-D__v850e2__} \ 124 %{mv850es:-D__v850e1__} \ 125 %{mv850e1:-D__v850e1__} \ 126 %{mv850e:-D__v850e__} \ 127 %{mv850:-D__v850__} \ 128 %(subtarget_cpp_spec) \ 129 %{mep:-D__EP__}" 130 131#define EXTRA_SPECS \ 132 { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \ 133 { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC } 134 135 136/* Macro to decide when FPU instructions can be used. */ 137#define TARGET_USE_FPU (TARGET_V850E2V3_UP && ! TARGET_SOFT_FLOAT) 138 139#define TARGET_CPU_CPP_BUILTINS() \ 140 do \ 141 { \ 142 builtin_define( "__v851__" ); \ 143 builtin_define( "__v850" ); \ 144 builtin_define( "__v850__" ); \ 145 builtin_assert( "machine=v850" ); \ 146 builtin_assert( "cpu=v850" ); \ 147 if (TARGET_EP) \ 148 builtin_define ("__EP__"); \ 149 if (TARGET_GCC_ABI) \ 150 builtin_define ("__V850_GCC_ABI__"); \ 151 else \ 152 builtin_define ("__V850_RH850_ABI__"); \ 153 if (! TARGET_DISABLE_CALLT) \ 154 builtin_define ("__V850_CALLT__"); \ 155 if (TARGET_8BYTE_ALIGN) \ 156 builtin_define ("__V850_8BYTE_ALIGN__");\ 157 builtin_define (TARGET_USE_FPU ? \ 158 "__FPU_OK__" : "__NO_FPU__");\ 159 } \ 160 while(0) 161 162#define MASK_CPU (MASK_V850 | MASK_V850E | MASK_V850E1 | MASK_V850E2 | MASK_V850E2V3 | MASK_V850E3V5) 163 164/* Target machine storage layout */ 165 166/* Define this if most significant bit is lowest numbered 167 in instructions that operate on numbered bit-fields. 168 This is not true on the NEC V850. */ 169#define BITS_BIG_ENDIAN 0 170 171/* Define this if most significant byte of a word is the lowest numbered. */ 172/* This is not true on the NEC V850. */ 173#define BYTES_BIG_ENDIAN 0 174 175/* Define this if most significant word of a multiword number is lowest 176 numbered. 177 This is not true on the NEC V850. */ 178#define WORDS_BIG_ENDIAN 0 179 180/* Width of a word, in units (bytes). */ 181#define UNITS_PER_WORD 4 182 183/* Define this macro if it is advisable to hold scalars in registers 184 in a wider mode than that declared by the program. In such cases, 185 the value is constrained to be within the bounds of the declared 186 type, but kept valid in the wider mode. The signedness of the 187 extension may differ from that of the type. 188 189 Some simple experiments have shown that leaving UNSIGNEDP alone 190 generates the best overall code. */ 191 192#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 193 if (GET_MODE_CLASS (MODE) == MODE_INT \ 194 && GET_MODE_SIZE (MODE) < 4) \ 195 { (MODE) = SImode; } 196 197/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 198#define PARM_BOUNDARY 32 199 200/* The stack goes in 32-bit lumps. */ 201#define STACK_BOUNDARY BIGGEST_ALIGNMENT 202 203/* Allocation boundary (in *bits*) for the code of a function. 204 16 is the minimum boundary; 32 would give better performance. */ 205#define FUNCTION_BOUNDARY (((! TARGET_GCC_ABI) || optimize_size) ? 16 : 32) 206 207/* No data type wants to be aligned rounder than this. */ 208#define BIGGEST_ALIGNMENT (TARGET_8BYTE_ALIGN ? 64 : 32) 209 210/* Alignment of field after `int : 0' in a structure. */ 211#define EMPTY_FIELD_BOUNDARY 32 212 213/* No structure field wants to be aligned rounder than this. */ 214#define BIGGEST_FIELD_ALIGNMENT BIGGEST_ALIGNMENT 215 216/* Define this if move instructions will actually fail to work 217 when given unaligned data. */ 218#define STRICT_ALIGNMENT (!TARGET_NO_STRICT_ALIGN) 219 220/* Define this as 1 if `char' should by default be signed; else as 0. 221 222 On the NEC V850, loads do sign extension, so make this default. */ 223#define DEFAULT_SIGNED_CHAR 1 224 225#undef SIZE_TYPE 226#define SIZE_TYPE "unsigned int" 227 228#undef PTRDIFF_TYPE 229#define PTRDIFF_TYPE "int" 230 231#undef WCHAR_TYPE 232#define WCHAR_TYPE "long int" 233 234#undef WCHAR_TYPE_SIZE 235#define WCHAR_TYPE_SIZE BITS_PER_WORD 236 237/* Standard register usage. */ 238 239/* Number of actual hardware registers. 240 The hardware registers are assigned numbers for the compiler 241 from 0 to just below FIRST_PSEUDO_REGISTER. 242 243 All registers that the compiler knows about must be given numbers, 244 even those that are not normally considered general registers. */ 245 246#define FIRST_PSEUDO_REGISTER 36 247 248/* 1 for registers that have pervasive standard uses 249 and are not available for the register allocator. */ 250 251#define FIXED_REGISTERS \ 252 { 1, 1, 1, 1, 1, 1, 0, 0, \ 253 0, 0, 0, 0, 0, 0, 0, 0, \ 254 0, 0, 0, 0, 0, 0, 0, 0, \ 255 0, 0, 0, 0, 0, 0, 1, 0, \ 256 1, 1, \ 257 1, 1} 258 259/* 1 for registers not available across function calls. 260 These must include the FIXED_REGISTERS and also any 261 registers that can be used without being saved. 262 The latter must include the registers where values are returned 263 and the register where structure-value addresses are passed. 264 Aside from that, you can include as many other registers as you 265 like. */ 266 267#define CALL_USED_REGISTERS \ 268 { 1, 1, 1, 1, 1, 1, 1, 1, \ 269 1, 1, 1, 1, 1, 1, 1, 1, \ 270 1, 1, 1, 1, 0, 0, 0, 0, \ 271 0, 0, 0, 0, 0, 0, 1, 1, \ 272 1, 1, \ 273 1, 1} 274 275/* List the order in which to allocate registers. Each register must be 276 listed once, even those in FIXED_REGISTERS. 277 278 On the 850, we make the return registers first, then all of the volatile 279 registers, then the saved registers in reverse order to better save the 280 registers with an out of line function, and finally the fixed 281 registers. */ 282 283#define REG_ALLOC_ORDER \ 284{ \ 285 10, 11, /* return registers */ \ 286 12, 13, 14, 15, 16, 17, 18, 19, /* scratch registers */ \ 287 6, 7, 8, 9, 31, /* argument registers */ \ 288 29, 28, 27, 26, 25, 24, 23, 22, /* saved registers */ \ 289 21, 20, 2, \ 290 0, 1, 3, 4, 5, 30, 32, 33, /* fixed registers */ \ 291 34, 35 \ 292} 293 294/* Return number of consecutive hard regs needed starting at reg REGNO 295 to hold something of mode MODE. 296 297 This is ordinarily the length in words of a value of mode MODE 298 but can be less for certain modes in special long registers. */ 299 300#define HARD_REGNO_NREGS(REGNO, MODE) \ 301 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 302 303/* Value is 1 if hard register REGNO can hold a value of machine-mode 304 MODE. */ 305 306#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 307 ((GET_MODE_SIZE (MODE) <= 4) || (((REGNO) & 1) == 0 && (REGNO) != 0)) 308 309/* Value is 1 if it is a good idea to tie two pseudo registers 310 when one has mode MODE1 and one has mode MODE2. 311 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 312 for any hard reg, then this must be 0 for correct output. */ 313#define MODES_TIEABLE_P(MODE1, MODE2) \ 314 (MODE1 == MODE2 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4)) 315 316 317/* Define the classes of registers for register constraints in the 318 machine description. Also define ranges of constants. 319 320 One of the classes must always be named ALL_REGS and include all hard regs. 321 If there is more than one class, another class must be named NO_REGS 322 and contain no registers. 323 324 The name GENERAL_REGS must be the name of a class (or an alias for 325 another name such as ALL_REGS). This is the class of registers 326 that is allowed by "g" or "r" in a register constraint. 327 Also, registers outside this class are allocated only when 328 instructions express preferences for them. 329 330 The classes must be numbered in nondecreasing order; that is, 331 a larger-numbered class must never be contained completely 332 in a smaller-numbered class. 333 334 For any two classes, it is very desirable that there be another 335 class that represents their union. */ 336 337enum reg_class 338{ 339 NO_REGS, EVEN_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES 340}; 341 342#define N_REG_CLASSES (int) LIM_REG_CLASSES 343 344/* Give names of register classes as strings for dump file. */ 345 346#define REG_CLASS_NAMES \ 347{ "NO_REGS", "EVEN_REGS", "GENERAL_REGS", "ALL_REGS", "LIM_REGS" } 348 349/* Define which registers fit in which classes. 350 This is an initializer for a vector of HARD_REG_SET 351 of length N_REG_CLASSES. */ 352 353#define REG_CLASS_CONTENTS \ 354{ \ 355 { 0x00000000,0x0 }, /* NO_REGS */ \ 356 { 0x55555554,0x0 }, /* EVEN_REGS */ \ 357 { 0xfffffffe,0x0 }, /* GENERAL_REGS */ \ 358 { 0xffffffff,0x0 }, /* ALL_REGS */ \ 359} 360 361/* The same information, inverted: 362 Return the class number of the smallest class containing 363 reg number REGNO. This could be a conditional expression 364 or could index an array. */ 365 366#define REGNO_REG_CLASS(REGNO) ((REGNO == CC_REGNUM || REGNO == FCC_REGNUM) ? NO_REGS : GENERAL_REGS) 367 368/* The class value for index registers, and the one for base regs. */ 369 370#define INDEX_REG_CLASS NO_REGS 371#define BASE_REG_CLASS GENERAL_REGS 372 373/* Macros to check register numbers against specific register classes. */ 374 375/* These assume that REGNO is a hard or pseudo reg number. 376 They give nonzero only if REGNO is a hard reg of the suitable class 377 or a pseudo reg currently allocated to a suitable hard reg. 378 Since they use reg_renumber, they are safe only once reg_renumber 379 has been allocated, which happens in reginfo.c during register 380 allocation. */ 381 382#define REGNO_OK_FOR_BASE_P(regno) \ 383 (((regno) < FIRST_PSEUDO_REGISTER \ 384 && (regno) != CC_REGNUM \ 385 && (regno) != FCC_REGNUM) \ 386 || reg_renumber[regno] >= 0) 387 388#define REGNO_OK_FOR_INDEX_P(regno) 0 389 390/* Convenience wrappers around insn_const_int_ok_for_constraint. */ 391 392#define CONST_OK_FOR_I(VALUE) \ 393 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_I) 394#define CONST_OK_FOR_J(VALUE) \ 395 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_J) 396#define CONST_OK_FOR_K(VALUE) \ 397 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_K) 398#define CONST_OK_FOR_L(VALUE) \ 399 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_L) 400#define CONST_OK_FOR_M(VALUE) \ 401 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_M) 402#define CONST_OK_FOR_N(VALUE) \ 403 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_N) 404#define CONST_OK_FOR_O(VALUE) \ 405 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O) 406#define CONST_OK_FOR_W(VALUE) \ 407 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_W) 408 409/* Stack layout; function entry, exit and calling. */ 410 411/* Define this if pushing a word on the stack 412 makes the stack pointer a smaller address. */ 413 414#define STACK_GROWS_DOWNWARD 1 415 416/* Define this to nonzero if the nominal address of the stack frame 417 is at the high-address end of the local variables; 418 that is, each additional local variable allocated 419 goes at a more negative offset in the frame. */ 420 421#define FRAME_GROWS_DOWNWARD 1 422 423/* Offset within stack frame to start allocating local variables at. 424 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 425 first local allocated. Otherwise, it is the offset to the BEGINNING 426 of the first local allocated. */ 427 428#define STARTING_FRAME_OFFSET 0 429 430/* Offset of first parameter from the argument pointer register value. */ 431/* Is equal to the size of the saved fp + pc, even if an fp isn't 432 saved since the value is used before we know. */ 433 434#define FIRST_PARM_OFFSET(FNDECL) 0 435 436/* Specify the registers used for certain standard purposes. 437 The values of these macros are register numbers. */ 438 439/* Register to use for pushing function arguments. */ 440#define STACK_POINTER_REGNUM SP_REGNUM 441 442/* Base register for access to local variables of the function. */ 443#define FRAME_POINTER_REGNUM 34 444 445/* Register containing return address from latest function call. */ 446#define LINK_POINTER_REGNUM LP_REGNUM 447 448/* On some machines the offset between the frame pointer and starting 449 offset of the automatic variables is not known until after register 450 allocation has been done (for example, because the saved registers 451 are between these two locations). On those machines, define 452 `FRAME_POINTER_REGNUM' the number of a special, fixed register to 453 be used internally until the offset is known, and define 454 `HARD_FRAME_POINTER_REGNUM' to be actual the hard register number 455 used for the frame pointer. 456 457 You should define this macro only in the very rare circumstances 458 when it is not possible to calculate the offset between the frame 459 pointer and the automatic variables until after register 460 allocation has been completed. When this macro is defined, you 461 must also indicate in your definition of `ELIMINABLE_REGS' how to 462 eliminate `FRAME_POINTER_REGNUM' into either 463 `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'. 464 465 Do not define this macro if it would be the same as 466 `FRAME_POINTER_REGNUM'. */ 467#undef HARD_FRAME_POINTER_REGNUM 468#define HARD_FRAME_POINTER_REGNUM 29 469 470/* Base register for access to arguments of the function. */ 471#define ARG_POINTER_REGNUM 35 472 473/* Register in which static-chain is passed to a function. */ 474#define STATIC_CHAIN_REGNUM 20 475 476/* If defined, this macro specifies a table of register pairs used to 477 eliminate unneeded registers that point into the stack frame. If 478 it is not defined, the only elimination attempted by the compiler 479 is to replace references to the frame pointer with references to 480 the stack pointer. 481 482 The definition of this macro is a list of structure 483 initializations, each of which specifies an original and 484 replacement register. 485 486 On some machines, the position of the argument pointer is not 487 known until the compilation is completed. In such a case, a 488 separate hard register must be used for the argument pointer. 489 This register can be eliminated by replacing it with either the 490 frame pointer or the argument pointer, depending on whether or not 491 the frame pointer has been eliminated. 492 493 In this case, you might specify: 494 #define ELIMINABLE_REGS \ 495 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 496 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 497 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 498 499 Note that the elimination of the argument pointer with the stack 500 pointer is specified first since that is the preferred elimination. */ 501 502#define ELIMINABLE_REGS \ 503{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ 504 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ 505 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ 506 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} \ 507 508/* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It 509 specifies the initial difference between the specified pair of 510 registers. This macro must be defined if `ELIMINABLE_REGS' is 511 defined. */ 512 513#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 514{ \ 515 if ((FROM) == FRAME_POINTER_REGNUM) \ 516 (OFFSET) = get_frame_size () + crtl->outgoing_args_size; \ 517 else if ((FROM) == ARG_POINTER_REGNUM) \ 518 (OFFSET) = compute_frame_size (get_frame_size (), (long *)0); \ 519 else \ 520 gcc_unreachable (); \ 521} 522 523/* Keep the stack pointer constant throughout the function. */ 524#define ACCUMULATE_OUTGOING_ARGS 1 525 526#define RETURN_ADDR_RTX(COUNT, FP) v850_return_addr (COUNT) 527 528/* Define a data type for recording info about an argument list 529 during the scan of that argument list. This data type should 530 hold all necessary information about the function itself 531 and about the args processed so far, enough to enable macros 532 such as FUNCTION_ARG to determine where the next arg should go. */ 533 534#define CUMULATIVE_ARGS struct cum_arg 535struct cum_arg { int nbytes; }; 536 537/* Initialize a variable CUM of type CUMULATIVE_ARGS 538 for a call to a function whose data type is FNTYPE. 539 For a library call, FNTYPE is 0. */ 540 541#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ 542 do { (CUM).nbytes = 0; } while (0) 543 544/* When a parameter is passed in a register, stack space is still 545 allocated for it. */ 546#define REG_PARM_STACK_SPACE(DECL) 0 547 548/* 1 if N is a possible register number for function argument passing. */ 549 550#define FUNCTION_ARG_REGNO_P(N) (N >= 6 && N <= 9) 551 552#define DEFAULT_PCC_STRUCT_RETURN 0 553 554/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 555 the stack pointer does not matter. The value is tested only in 556 functions that have frame pointers. 557 No definition is equivalent to always zero. */ 558 559#define EXIT_IGNORE_STACK 1 560 561/* Define this macro as a C expression that is nonzero for registers 562 used by the epilogue or the `return' pattern. */ 563 564#define EPILOGUE_USES(REGNO) \ 565 (reload_completed && (REGNO) == LINK_POINTER_REGNUM) 566 567/* Output assembler code to FILE to increment profiler label # LABELNO 568 for profiling a function entry. */ 569 570#define FUNCTION_PROFILER(FILE, LABELNO) ; 571 572/* Length in units of the trampoline for entering a nested function. */ 573 574#define TRAMPOLINE_SIZE 24 575 576/* Addressing modes, and classification of registers for them. */ 577 578 579/* 1 if X is an rtx for a constant that is a valid address. */ 580 581/* ??? This seems too exclusive. May get better code by accepting more 582 possibilities here, in particular, should accept ZDA_NAME SYMBOL_REFs. */ 583 584#define CONSTANT_ADDRESS_P(X) constraint_satisfied_p (X, CONSTRAINT_K) 585 586/* Maximum number of registers that can appear in a valid memory address. */ 587 588#define MAX_REGS_PER_ADDRESS 1 589 590/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 591 return the mode to be used for the comparison. 592 593 For floating-point equality comparisons, CCFPEQmode should be used. 594 VOIDmode should be used in all other cases. 595 596 For integer comparisons against zero, reduce to CCNOmode or CCZmode if 597 possible, to allow for more combinations. */ 598 599#define SELECT_CC_MODE(OP, X, Y) v850_select_cc_mode (OP, X, Y) 600 601/* Tell final.c how to eliminate redundant test instructions. */ 602 603/* Here we define machine-dependent flags and fields in cc_status 604 (see `conditions.h'). No extra ones are needed for the VAX. */ 605 606/* Store in cc_status the expressions 607 that the condition codes will describe 608 after execution of an instruction whose pattern is EXP. 609 Do not alter them if the instruction would not alter the cc's. */ 610 611#define CC_OVERFLOW_UNUSABLE 0x200 612#define CC_NO_CARRY CC_NO_OVERFLOW 613#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN) 614 615/* Nonzero if access to memory by bytes or half words is no faster 616 than accessing full words. */ 617#define SLOW_BYTE_ACCESS 1 618 619/* According expr.c, a value of around 6 should minimize code size, and 620 for the V850 series, that's our primary concern. */ 621#define MOVE_RATIO(speed) 6 622 623/* Indirect calls are expensive, never turn a direct call 624 into an indirect call. */ 625#define NO_FUNCTION_CSE 1 626 627/* The four different data regions on the v850. */ 628typedef enum 629{ 630 DATA_AREA_NORMAL, 631 DATA_AREA_SDA, 632 DATA_AREA_TDA, 633 DATA_AREA_ZDA 634} v850_data_area; 635 636#define TEXT_SECTION_ASM_OP "\t.section .text" 637#define DATA_SECTION_ASM_OP "\t.section .data" 638#define BSS_SECTION_ASM_OP "\t.section .bss" 639#define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\"" 640#define SBSS_SECTION_ASM_OP "\t.section .sbss,\"aw\"" 641 642#define SCOMMON_ASM_OP "\t.scomm\t" 643#define ZCOMMON_ASM_OP "\t.zcomm\t" 644#define TCOMMON_ASM_OP "\t.tcomm\t" 645 646#define ASM_COMMENT_START "#" 647 648/* Output to assembler file text saying following lines 649 may contain character constants, extra white space, comments, etc. */ 650 651#define ASM_APP_ON "#APP\n" 652 653/* Output to assembler file text saying following lines 654 no longer contain unusual constructs. */ 655 656#define ASM_APP_OFF "#NO_APP\n" 657 658#undef USER_LABEL_PREFIX 659#define USER_LABEL_PREFIX "_" 660 661/* This says how to output the assembler to define a global 662 uninitialized but not common symbol. */ 663 664#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 665 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) 666 667#undef ASM_OUTPUT_ALIGNED_BSS 668#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 669 v850_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) 670 671/* This says how to output the assembler to define a global 672 uninitialized, common symbol. */ 673#undef ASM_OUTPUT_ALIGNED_COMMON 674#undef ASM_OUTPUT_COMMON 675#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \ 676 v850_output_common (FILE, DECL, NAME, SIZE, ALIGN) 677 678/* This says how to output the assembler to define a local 679 uninitialized symbol. */ 680#undef ASM_OUTPUT_ALIGNED_LOCAL 681#undef ASM_OUTPUT_LOCAL 682#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \ 683 v850_output_local (FILE, DECL, NAME, SIZE, ALIGN) 684 685/* Globalizing directive for a label. */ 686#define GLOBAL_ASM_OP "\t.global " 687 688#define ASM_PN_FORMAT "%s___%lu" 689 690/* This is how we tell the assembler that two symbols have the same value. */ 691 692#define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ 693 do { assemble_name(FILE, NAME1); \ 694 fputs(" = ", FILE); \ 695 assemble_name(FILE, NAME2); \ 696 fputc('\n', FILE); } while (0) 697 698 699/* How to refer to registers in assembler output. 700 This sequence is indexed by compiler's hard-register-number (see above). */ 701 702#define REGISTER_NAMES \ 703{ "r0", "r1", "r2", "sp", "gp", "r5", "r6" , "r7", \ 704 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 705 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ 706 "r24", "r25", "r26", "r27", "r28", "r29", "ep", "r31", \ 707 "psw", "fcc", \ 708 ".fp", ".ap"} 709 710/* Register numbers */ 711 712#define ADDITIONAL_REGISTER_NAMES \ 713{ { "zero", ZERO_REGNUM }, \ 714 { "hp", 2 }, \ 715 { "r3", 3 }, \ 716 { "r4", 4 }, \ 717 { "tp", 5 }, \ 718 { "fp", 29 }, \ 719 { "r30", 30 }, \ 720 { "lp", LP_REGNUM} } 721 722/* This is how to output an element of a case-vector that is absolute. */ 723 724#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 725 fprintf (FILE, "\t%s .L%d\n", \ 726 (TARGET_BIG_SWITCH ? ".long" : ".short"), VALUE) 727 728/* This is how to output an element of a case-vector that is relative. */ 729 730/* Disable the shift, which is for the currently disabled "switch" 731 opcode. Se casesi in v850.md. */ 732 733#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 734 fprintf (FILE, "\t%s %s.L%d-.L%d%s\n", \ 735 (TARGET_BIG_SWITCH ? ".long" : ".short"), \ 736 (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? "(" : ""), \ 737 VALUE, REL, \ 738 (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? ")>>1" : "")) 739 740#define ASM_OUTPUT_ALIGN(FILE, LOG) \ 741 if ((LOG) != 0) \ 742 fprintf (FILE, "\t.align %d\n", (LOG)) 743 744/* We don't have to worry about dbx compatibility for the v850. */ 745#define DEFAULT_GDB_EXTENSIONS 1 746 747/* Use dwarf2 debugging info by default. */ 748#undef PREFERRED_DEBUGGING_TYPE 749#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 750 751#define DWARF2_FRAME_INFO 1 752#define DWARF2_UNWIND_INFO 0 753#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_POINTER_REGNUM) 754#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_POINTER_REGNUM) 755 756#ifndef ASM_GENERATE_INTERNAL_LABEL 757#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ 758 sprintf (STRING, "*.%s%u", PREFIX, (unsigned int)(NUM)) 759#endif 760 761/* Specify the machine mode that this machine uses 762 for the index in the tablejump instruction. */ 763#define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode) 764 765/* Define as C expression which evaluates to nonzero if the tablejump 766 instruction expects the table to contain offsets from the address of the 767 table. 768 Do not define this if the table should contain absolute addresses. */ 769#define CASE_VECTOR_PC_RELATIVE 1 770 771/* The switch instruction requires that the jump table immediately follow 772 it. */ 773#define JUMP_TABLES_IN_TEXT_SECTION (!TARGET_JUMP_TABLES_IN_DATA_SECTION) 774 775#undef ASM_OUTPUT_BEFORE_CASE_LABEL 776#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ 777 ASM_OUTPUT_ALIGN ((FILE), (TARGET_BIG_SWITCH ? 2 : 1)); 778 779#define WORD_REGISTER_OPERATIONS 1 780 781/* Byte and short loads sign extend the value to a word. */ 782#define LOAD_EXTEND_OP(MODE) SIGN_EXTEND 783 784/* Max number of bytes we can move from memory to memory 785 in one reasonably fast instruction. */ 786#define MOVE_MAX 4 787 788/* Define if shifts truncate the shift count 789 which implies one can omit a sign-extension or zero-extension 790 of a shift count. */ 791#define SHIFT_COUNT_TRUNCATED 1 792 793/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 794 is done just by pretending it is already truncated. */ 795#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 796 797/* Specify the machine mode that pointers have. 798 After generation of rtl, the compiler makes no further distinction 799 between pointers and any other objects of this machine mode. */ 800#define Pmode SImode 801 802/* A function address in a call instruction 803 is a byte address (for indexing purposes) 804 so give the MEM rtx a byte's mode. */ 805#define FUNCTION_MODE QImode 806 807/* Tell compiler we want to support GHS pragmas */ 808#define REGISTER_TARGET_PRAGMAS() do { \ 809 c_register_pragma ("ghs", "interrupt", ghs_pragma_interrupt); \ 810 c_register_pragma ("ghs", "section", ghs_pragma_section); \ 811 c_register_pragma ("ghs", "starttda", ghs_pragma_starttda); \ 812 c_register_pragma ("ghs", "startsda", ghs_pragma_startsda); \ 813 c_register_pragma ("ghs", "startzda", ghs_pragma_startzda); \ 814 c_register_pragma ("ghs", "endtda", ghs_pragma_endtda); \ 815 c_register_pragma ("ghs", "endsda", ghs_pragma_endsda); \ 816 c_register_pragma ("ghs", "endzda", ghs_pragma_endzda); \ 817} while (0) 818 819/* enum GHS_SECTION_KIND is an enumeration of the kinds of sections that 820 can appear in the "ghs section" pragma. These names are used to index 821 into the GHS_default_section_names[] and GHS_current_section_names[] 822 that are defined in v850.c, and so the ordering of each must remain 823 consistent. 824 825 These arrays give the default and current names for each kind of 826 section defined by the GHS pragmas. The current names can be changed 827 by the "ghs section" pragma. If the current names are null, use 828 the default names. Note that the two arrays have different types. 829 830 For the *normal* section kinds (like .data, .text, etc.) we do not 831 want to explicitly force the name of these sections, but would rather 832 let the linker (or at least the back end) choose the name of the 833 section, UNLESS the user has forced a specific name for these section 834 kinds. To accomplish this set the name in ghs_default_section_names 835 to null. */ 836 837enum GHS_section_kind 838{ 839 GHS_SECTION_KIND_DEFAULT, 840 841 GHS_SECTION_KIND_TEXT, 842 GHS_SECTION_KIND_DATA, 843 GHS_SECTION_KIND_RODATA, 844 GHS_SECTION_KIND_BSS, 845 GHS_SECTION_KIND_SDATA, 846 GHS_SECTION_KIND_ROSDATA, 847 GHS_SECTION_KIND_TDATA, 848 GHS_SECTION_KIND_ZDATA, 849 GHS_SECTION_KIND_ROZDATA, 850 851 COUNT_OF_GHS_SECTION_KINDS /* must be last */ 852}; 853 854/* The following code is for handling pragmas supported by the 855 v850 compiler produced by Green Hills Software. This is at 856 the specific request of a customer. */ 857 858typedef struct data_area_stack_element 859{ 860 struct data_area_stack_element * prev; 861 v850_data_area data_area; /* Current default data area. */ 862} data_area_stack_element; 863 864/* Track the current data area set by the 865 data area pragma (which can be nested). */ 866extern data_area_stack_element * data_area_stack; 867 868/* Names of the various data areas used on the v850. */ 869extern const char * GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS]; 870extern const char * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS]; 871 872/* The assembler op to start the file. */ 873 874#define FILE_ASM_OP "\t.file\n" 875 876/* Implement ZDA, TDA, and SDA */ 877 878#define EP_REGNUM 30 /* ep register number */ 879 880#define SYMBOL_FLAG_ZDA (SYMBOL_FLAG_MACH_DEP << 0) 881#define SYMBOL_FLAG_TDA (SYMBOL_FLAG_MACH_DEP << 1) 882#define SYMBOL_FLAG_SDA (SYMBOL_FLAG_MACH_DEP << 2) 883#define SYMBOL_REF_ZDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ZDA) != 0) 884#define SYMBOL_REF_TDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_TDA) != 0) 885#define SYMBOL_REF_SDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SDA) != 0) 886 887#define TARGET_ASM_INIT_SECTIONS v850_asm_init_sections 888 889/* Define this so that the cc1plus will not think that system header files 890 need an implicit 'extern "C" { ... }' assumed. This breaks testing C++ 891 in a build directory where the libstdc++ header files are found via a 892 -isystem <path-to-build-dir>. */ 893#define NO_IMPLICIT_EXTERN_C 894 895#define ADJUST_INSN_LENGTH(INSN, LENGTH) \ 896 ((LENGTH) = v850_adjust_insn_length ((INSN), (LENGTH))) 897 898#endif /* ! GCC_V850_H */ 899