1/* Definition of RISC-V target for GNU compiler.
2   Copyright (C) 2011-2020 Free Software Foundation, Inc.
3   Contributed by Andrew Waterman (andrew@sifive.com).
4   Based on MIPS target for GNU compiler.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
10the Free Software Foundation; either version 3, or (at your option)
11any later version.
12
13GCC is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3.  If not see
20<http://www.gnu.org/licenses/>.  */
21
22#ifndef GCC_RISCV_PROTOS_H
23#define GCC_RISCV_PROTOS_H
24
25/* Symbol types we understand.  The order of this list must match that of
26   the unspec enum in riscv.md, subsequent to UNSPEC_ADDRESS_FIRST.  */
27enum riscv_symbol_type {
28  SYMBOL_ABSOLUTE,
29  SYMBOL_PCREL,
30  SYMBOL_GOT_DISP,
31  SYMBOL_TLS,
32  SYMBOL_TLS_LE,
33  SYMBOL_TLS_IE,
34  SYMBOL_TLS_GD
35};
36#define NUM_SYMBOL_TYPES (SYMBOL_TLS_GD + 1)
37
38/* Routines implemented in riscv.c.  */
39extern enum riscv_symbol_type riscv_classify_symbolic_expression (rtx);
40extern bool riscv_symbolic_constant_p (rtx, enum riscv_symbol_type *);
41extern int riscv_regno_mode_ok_for_base_p (int, machine_mode, bool);
42extern int riscv_address_insns (rtx, machine_mode, bool);
43extern int riscv_const_insns (rtx);
44extern int riscv_split_const_insns (rtx);
45extern int riscv_load_store_insns (rtx, rtx_insn *);
46extern rtx riscv_emit_move (rtx, rtx);
47extern bool riscv_split_symbol (rtx, rtx, machine_mode, rtx *, bool);
48extern bool riscv_split_symbol_type (enum riscv_symbol_type);
49extern rtx riscv_unspec_address (rtx, enum riscv_symbol_type);
50extern void riscv_move_integer (rtx, rtx, HOST_WIDE_INT, machine_mode, bool);
51extern bool riscv_legitimize_move (machine_mode, rtx, rtx);
52extern rtx riscv_subword (rtx, bool);
53extern bool riscv_split_64bit_move_p (rtx, rtx);
54extern void riscv_split_doubleword_move (rtx, rtx);
55extern const char *riscv_output_move (rtx, rtx);
56extern const char *riscv_output_return ();
57#ifdef RTX_CODE
58extern void riscv_expand_int_scc (rtx, enum rtx_code, rtx, rtx);
59extern void riscv_expand_float_scc (rtx, enum rtx_code, rtx, rtx);
60extern void riscv_expand_conditional_branch (rtx, enum rtx_code, rtx, rtx);
61extern void riscv_expand_conditional_move (rtx, rtx, rtx, rtx_code, rtx, rtx);
62#endif
63extern rtx riscv_legitimize_call_address (rtx);
64extern void riscv_set_return_address (rtx, rtx);
65extern bool riscv_expand_block_move (rtx, rtx, rtx);
66extern rtx riscv_return_addr (int, rtx);
67extern HOST_WIDE_INT riscv_initial_elimination_offset (int, int);
68extern void riscv_expand_prologue (void);
69extern void riscv_expand_epilogue (int);
70extern bool riscv_epilogue_uses (unsigned int);
71extern bool riscv_can_use_return_insn (void);
72extern rtx riscv_function_value (const_tree, const_tree, enum machine_mode);
73extern bool riscv_expand_block_move (rtx, rtx, rtx);
74extern bool riscv_store_data_bypass_p (rtx_insn *, rtx_insn *);
75extern rtx riscv_gen_gpr_save_insn (struct riscv_frame_info *);
76extern bool riscv_gpr_save_operation_p (rtx);
77
78/* Routines implemented in riscv-c.c.  */
79void riscv_cpu_cpp_builtins (cpp_reader *);
80
81/* Routines implemented in riscv-d.c  */
82extern void riscv_d_target_versions (void);
83
84/* Routines implemented in riscv-builtins.c.  */
85extern void riscv_atomic_assign_expand_fenv (tree *, tree *, tree *);
86extern rtx riscv_expand_builtin (tree, rtx, rtx, machine_mode, int);
87extern tree riscv_builtin_decl (unsigned int, bool);
88extern void riscv_init_builtins (void);
89
90/* Routines implemented in riscv-common.c.  */
91extern std::string riscv_arch_str ();
92
93extern bool riscv_hard_regno_rename_ok (unsigned, unsigned);
94
95#endif /* ! GCC_RISCV_PROTOS_H */
96