1; Machine description for AArch64 architecture.
2; Copyright (C) 2009-2020 Free Software Foundation, Inc.
3; Contributed by ARM Ltd.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it
8; under the terms of the GNU General Public License as published by
9; the Free Software Foundation; either version 3, or (at your option)
10; any later version.
11;
12; GCC is distributed in the hope that it will be useful, but
13; WITHOUT ANY WARRANTY; without even the implied warranty of
14; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15; General Public License for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING3.  If not see
19; <http://www.gnu.org/licenses/>.
20
21HeaderInclude
22config/aarch64/aarch64-opts.h
23
24TargetVariable
25enum aarch64_processor explicit_tune_core = aarch64_none
26
27TargetVariable
28enum aarch64_arch explicit_arch = aarch64_no_arch
29
30TargetSave
31const char *x_aarch64_override_tune_string
32
33TargetVariable
34uint64_t aarch64_isa_flags = 0
35
36TargetVariable
37unsigned aarch64_enable_bti = 2
38
39; The TLS dialect names to use with -mtls-dialect.
40
41Enum
42Name(tls_type) Type(enum aarch64_tls_type)
43The possible TLS dialects:
44
45EnumValue
46Enum(tls_type) String(trad) Value(TLS_TRADITIONAL)
47
48EnumValue
49Enum(tls_type) String(desc) Value(TLS_DESCRIPTORS)
50
51; The code model option names for -mcmodel.
52
53Enum
54Name(cmodel) Type(enum aarch64_code_model)
55The code model option names for -mcmodel:
56
57EnumValue
58Enum(cmodel) String(tiny) Value(AARCH64_CMODEL_TINY)
59
60EnumValue
61Enum(cmodel) String(small) Value(AARCH64_CMODEL_SMALL)
62
63EnumValue
64Enum(cmodel) String(large) Value(AARCH64_CMODEL_LARGE)
65
66mbig-endian
67Target Report RejectNegative Mask(BIG_END)
68Assume target CPU is configured as big endian.
69
70mgeneral-regs-only
71Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
72Generate code which uses only the general registers.
73
74mharden-sls=
75Target RejectNegative Joined Var(aarch64_harden_sls_string)
76Generate code to mitigate against straight line speculation.
77
78mfix-cortex-a53-835769
79Target Report Var(aarch64_fix_a53_err835769) Init(2) Save
80Workaround for ARM Cortex-A53 Erratum number 835769.
81
82mfix-cortex-a53-843419
83Target Report Var(aarch64_fix_a53_err843419) Init(2) Save
84Workaround for ARM Cortex-A53 Erratum number 843419.
85
86mlittle-endian
87Target Report RejectNegative InverseMask(BIG_END)
88Assume target CPU is configured as little endian.
89
90mcmodel=
91Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL) Save
92Specify the code model.
93
94mstrict-align
95Target Report Mask(STRICT_ALIGN) Save
96Don't assume that unaligned accesses are handled by the system.
97
98momit-leaf-frame-pointer
99Target Report Var(flag_omit_leaf_frame_pointer) Init(2) Save
100Omit the frame pointer in leaf functions.
101
102mtls-dialect=
103Target RejectNegative Joined Enum(tls_type) Var(aarch64_tls_dialect) Init(TLS_DESCRIPTORS) Save
104Specify TLS dialect.
105
106mtls-size=
107Target RejectNegative Joined Var(aarch64_tls_size) Enum(aarch64_tls_size)
108Specifies bit size of immediate TLS offsets.  Valid values are 12, 24, 32, 48.
109
110Enum
111Name(aarch64_tls_size) Type(int)
112
113EnumValue
114Enum(aarch64_tls_size) String(12) Value(12)
115
116EnumValue
117Enum(aarch64_tls_size) String(24) Value(24)
118
119EnumValue
120Enum(aarch64_tls_size) String(32) Value(32)
121
122EnumValue
123Enum(aarch64_tls_size) String(48) Value(48)
124
125march=
126Target RejectNegative Negative(march=) ToLower Joined Var(aarch64_arch_string)
127Use features of architecture ARCH.
128
129mcpu=
130Target RejectNegative Negative(mcpu=) ToLower Joined Var(aarch64_cpu_string)
131Use features of and optimize for CPU.
132
133mtune=
134Target RejectNegative Negative(mtune=) ToLower Joined Var(aarch64_tune_string)
135Optimize for CPU.
136
137mabi=
138Target RejectNegative Joined Enum(aarch64_abi) Var(aarch64_abi) Init(AARCH64_ABI_DEFAULT)
139Generate code that conforms to the specified ABI.
140
141moverride=
142Target RejectNegative ToLower Joined Var(aarch64_override_tune_string)
143-moverride=<string>	Power users only! Override CPU optimization parameters.
144
145Enum
146Name(aarch64_abi) Type(int)
147Known AArch64 ABIs (for use with the -mabi= option):
148
149EnumValue
150Enum(aarch64_abi) String(ilp32) Value(AARCH64_ABI_ILP32)
151
152EnumValue
153Enum(aarch64_abi) String(lp64) Value(AARCH64_ABI_LP64)
154
155mpc-relative-literal-loads
156Target Report Save Var(pcrelative_literal_loads) Init(2) Save
157PC relative literal loads.
158
159mbranch-protection=
160Target RejectNegative Joined Var(aarch64_branch_protection_string) Save
161Use branch-protection features.
162
163msign-return-address=
164Target WarnRemoved RejectNegative Joined Enum(aarch64_ra_sign_scope_t) Var(aarch64_ra_sign_scope) Init(AARCH64_FUNCTION_NONE) Save
165Select return address signing scope.
166
167Enum
168Name(aarch64_ra_sign_scope_t) Type(enum aarch64_function_type)
169Supported AArch64 return address signing scope (for use with -msign-return-address= option):
170
171EnumValue
172Enum(aarch64_ra_sign_scope_t) String(none) Value(AARCH64_FUNCTION_NONE)
173
174EnumValue
175Enum(aarch64_ra_sign_scope_t) String(non-leaf) Value(AARCH64_FUNCTION_NON_LEAF)
176
177EnumValue
178Enum(aarch64_ra_sign_scope_t) String(all) Value(AARCH64_FUNCTION_ALL)
179
180mlow-precision-recip-sqrt
181Target Var(flag_mrecip_low_precision_sqrt) Optimization
182Enable the reciprocal square root approximation.  Enabling this reduces
183precision of reciprocal square root results to about 16 bits for
184single precision and to 32 bits for double precision.
185
186mlow-precision-sqrt
187Target Var(flag_mlow_precision_sqrt) Optimization
188Enable the square root approximation.  Enabling this reduces
189precision of square root results to about 16 bits for
190single precision and to 32 bits for double precision.
191If enabled, it implies -mlow-precision-recip-sqrt.
192
193mlow-precision-div
194Target Var(flag_mlow_precision_div) Optimization
195Enable the division approximation.  Enabling this reduces
196precision of division results to about 16 bits for
197single precision and to 32 bits for double precision.
198
199Enum
200Name(sve_vector_bits) Type(enum aarch64_sve_vector_bits_enum)
201The possible SVE vector lengths:
202
203EnumValue
204Enum(sve_vector_bits) String(scalable) Value(SVE_SCALABLE)
205
206EnumValue
207Enum(sve_vector_bits) String(128) Value(SVE_128)
208
209EnumValue
210Enum(sve_vector_bits) String(256) Value(SVE_256)
211
212EnumValue
213Enum(sve_vector_bits) String(512) Value(SVE_512)
214
215EnumValue
216Enum(sve_vector_bits) String(1024) Value(SVE_1024)
217
218EnumValue
219Enum(sve_vector_bits) String(2048) Value(SVE_2048)
220
221msve-vector-bits=
222Target RejectNegative Joined Enum(sve_vector_bits) Var(aarch64_sve_vector_bits) Init(SVE_SCALABLE)
223-msve-vector-bits=<number>	Set the number of bits in an SVE vector register.
224
225mverbose-cost-dump
226Target Undocumented Var(flag_aarch64_verbose_cost)
227Enables verbose cost model dumping in the debug dump files.
228
229mtrack-speculation
230Target Var(aarch64_track_speculation)
231Generate code to track when the CPU might be speculating incorrectly.
232
233mstack-protector-guard=
234Target RejectNegative Joined Enum(stack_protector_guard) Var(aarch64_stack_protector_guard) Init(SSP_GLOBAL)
235Use given stack-protector guard.
236
237Enum
238Name(stack_protector_guard) Type(enum stack_protector_guard)
239Valid arguments to -mstack-protector-guard=:
240
241EnumValue
242Enum(stack_protector_guard) String(sysreg) Value(SSP_SYSREG)
243
244EnumValue
245Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
246
247mstack-protector-guard-reg=
248Target Joined RejectNegative String Var(aarch64_stack_protector_guard_reg_str)
249Use the system register specified on the command line as the stack protector
250guard register. This option is for use with fstack-protector-strong and
251not for use in user-land code.
252
253mstack-protector-guard-offset=
254Target Joined RejectNegative String Var(aarch64_stack_protector_guard_offset_str)
255Use an immediate to offset from the stack protector guard register, sp_el0.
256This option is for use with fstack-protector-strong and not for use in
257user-land code.
258
259TargetVariable
260long aarch64_stack_protector_guard_offset = 0
261
262moutline-atomics
263Target Report Var(aarch64_flag_outline_atomics) Init(2) Save
264Generate local calls to out-of-line atomic operations.
265
266-param=aarch64-sve-compare-costs=
267Target Joined UInteger Var(aarch64_sve_compare_costs) Init(1) IntegerRange(0, 1) Param
268When vectorizing for SVE, consider using unpacked vectors for smaller elements and use the cost model to pick the cheapest approach.  Also use the cost model to choose between SVE and Advanced SIMD vectorization.
269
270-param=aarch64-float-recp-precision=
271Target Joined UInteger Var(aarch64_float_recp_precision) Init(1) IntegerRange(1, 5) Param
272The number of Newton iterations for calculating the reciprocal for float type.  The precision of division is proportional to this param when division approximation is enabled.  The default value is 1.
273
274-param=aarch64-double-recp-precision=
275Target Joined UInteger Var(aarch64_double_recp_precision) Init(2) IntegerRange(1, 5) Param
276The number of Newton iterations for calculating the reciprocal for double type.  The precision of division is proportional to this param when division approximation is enabled.  The default value is 2.
277
278-param=aarch64-autovec-preference=
279Target Joined UInteger Var(aarch64_autovec_preference) Init(0) IntegerRange(0, 4) Param
280