1 /* PREFIX_EVEX_0F5B */ 2 { 3 { VEX_W_TABLE (EVEX_W_0F5B_P_0) }, 4 { "%XEvcvttp%XS2dq", { XM, EXx, EXxEVexS }, 0 }, 5 { "%XEvcvtp%XS2dq", { XM, EXx, EXxEVexR }, 0 }, 6 }, 7 /* PREFIX_EVEX_0F6F */ 8 { 9 { Bad_Opcode }, 10 { VEX_W_TABLE (EVEX_W_0F6F_P_1) }, 11 { VEX_W_TABLE (EVEX_W_0F6F_P_2) }, 12 { VEX_W_TABLE (EVEX_W_0F6F_P_3) }, 13 }, 14 /* PREFIX_EVEX_0F70 */ 15 { 16 { Bad_Opcode }, 17 { "%XEvpshufhw", { XM, EXx, Ib }, 0 }, 18 { VEX_W_TABLE (EVEX_W_0F70_P_2) }, 19 { "%XEvpshuflw", { XM, EXx, Ib }, 0 }, 20 }, 21 /* PREFIX_EVEX_0F78 */ 22 { 23 { VEX_W_TABLE (EVEX_W_0F78_P_0) }, 24 { "vcvttss2usi", { Gdq, EXd, EXxEVexS }, 0 }, 25 { VEX_W_TABLE (EVEX_W_0F78_P_2) }, 26 { "vcvttsd2usi", { Gdq, EXq, EXxEVexS }, 0 }, 27 }, 28 /* PREFIX_EVEX_0F79 */ 29 { 30 { VEX_W_TABLE (EVEX_W_0F79_P_0) }, 31 { "vcvtss2usi", { Gdq, EXd, EXxEVexR }, 0 }, 32 { VEX_W_TABLE (EVEX_W_0F79_P_2) }, 33 { "vcvtsd2usi", { Gdq, EXq, EXxEVexR }, 0 }, 34 }, 35 /* PREFIX_EVEX_0F7A */ 36 { 37 { Bad_Opcode }, 38 { VEX_W_TABLE (EVEX_W_0F7A_P_1) }, 39 { VEX_W_TABLE (EVEX_W_0F7A_P_2) }, 40 { VEX_W_TABLE (EVEX_W_0F7A_P_3) }, 41 }, 42 /* PREFIX_EVEX_0F7B */ 43 { 44 { Bad_Opcode }, 45 { "vcvtusi2ssY{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 }, 46 { VEX_W_TABLE (EVEX_W_0F7B_P_2) }, 47 { "vcvtusi2sdY{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 }, 48 }, 49 /* PREFIX_EVEX_0F7E */ 50 { 51 { Bad_Opcode }, 52 { VEX_W_TABLE (EVEX_W_0F7E_P_1) }, 53 { VEX_LEN_TABLE (VEX_LEN_0F7E_P_2) }, 54 }, 55 /* PREFIX_EVEX_0F7F */ 56 { 57 { Bad_Opcode }, 58 { VEX_W_TABLE (EVEX_W_0F7F_P_1) }, 59 { VEX_W_TABLE (EVEX_W_0F7F_P_2) }, 60 { VEX_W_TABLE (EVEX_W_0F7F_P_3) }, 61 }, 62 /* PREFIX_EVEX_0FC2 */ 63 { 64 { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE }, 65 { "vcmps%XS", { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 }, 66 { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE }, 67 { "vcmps%XD", { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 }, 68 }, 69 /* PREFIX_EVEX_0FE6 */ 70 { 71 { Bad_Opcode }, 72 { VEX_W_TABLE (EVEX_W_0FE6_P_1) }, 73 { "%XEvcvttp%XD2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 }, 74 { "%XEvcvtp%XD2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, 75 }, 76 /* PREFIX_EVEX_0F3810 */ 77 { 78 { Bad_Opcode }, 79 { VEX_W_TABLE (EVEX_W_0F3810_P_1) }, 80 { VEX_W_TABLE (EVEX_W_0F3810_P_2) }, 81 }, 82 /* PREFIX_EVEX_0F3811 */ 83 { 84 { Bad_Opcode }, 85 { VEX_W_TABLE (EVEX_W_0F3811_P_1) }, 86 { VEX_W_TABLE (EVEX_W_0F3811_P_2) }, 87 }, 88 /* PREFIX_EVEX_0F3812 */ 89 { 90 { Bad_Opcode }, 91 { VEX_W_TABLE (EVEX_W_0F3812_P_1) }, 92 { VEX_W_TABLE (EVEX_W_0F3812_P_2) }, 93 }, 94 /* PREFIX_EVEX_0F3813 */ 95 { 96 { Bad_Opcode }, 97 { VEX_W_TABLE (EVEX_W_0F3813_P_1) }, 98 { "%XEvcvtph2p%XS", { XM, EXxmmq, EXxEVexS }, 0 }, 99 }, 100 /* PREFIX_EVEX_0F3814 */ 101 { 102 { Bad_Opcode }, 103 { VEX_W_TABLE (EVEX_W_0F3814_P_1) }, 104 { "vprorv%DQ", { XM, Vex, EXx }, 0 }, 105 }, 106 /* PREFIX_EVEX_0F3815 */ 107 { 108 { Bad_Opcode }, 109 { VEX_W_TABLE (EVEX_W_0F3815_P_1) }, 110 { "vprolv%DQ", { XM, Vex, EXx }, 0 }, 111 }, 112 /* PREFIX_EVEX_0F3820 */ 113 { 114 { Bad_Opcode }, 115 { VEX_W_TABLE (EVEX_W_0F3820_P_1) }, 116 { "%XEvpmovsxbw", { XM, EXxmmq }, 0 }, 117 }, 118 /* PREFIX_EVEX_0F3821 */ 119 { 120 { Bad_Opcode }, 121 { VEX_W_TABLE (EVEX_W_0F3821_P_1) }, 122 { "%XEvpmovsxbd", { XM, EXxmmqd }, 0 }, 123 }, 124 /* PREFIX_EVEX_0F3822 */ 125 { 126 { Bad_Opcode }, 127 { VEX_W_TABLE (EVEX_W_0F3822_P_1) }, 128 { "%XEvpmovsxbq", { XM, EXxmmdw }, 0 }, 129 }, 130 /* PREFIX_EVEX_0F3823 */ 131 { 132 { Bad_Opcode }, 133 { VEX_W_TABLE (EVEX_W_0F3823_P_1) }, 134 { "%XEvpmovsxwd", { XM, EXxmmq }, 0 }, 135 }, 136 /* PREFIX_EVEX_0F3824 */ 137 { 138 { Bad_Opcode }, 139 { VEX_W_TABLE (EVEX_W_0F3824_P_1) }, 140 { "%XEvpmovsxwq", { XM, EXxmmqd }, 0 }, 141 }, 142 /* PREFIX_EVEX_0F3825 */ 143 { 144 { Bad_Opcode }, 145 { VEX_W_TABLE (EVEX_W_0F3825_P_1) }, 146 { VEX_W_TABLE (EVEX_W_0F3825_P_2) }, 147 }, 148 /* PREFIX_EVEX_0F3826 */ 149 { 150 { Bad_Opcode }, 151 { "vptestnm%BW", { MaskG, Vex, EXx }, 0 }, 152 { "vptestm%BW", { MaskG, Vex, EXx }, 0 }, 153 }, 154 /* PREFIX_EVEX_0F3827 */ 155 { 156 { Bad_Opcode }, 157 { "vptestnm%DQ", { MaskG, Vex, EXx }, 0 }, 158 { "vptestm%DQ", { MaskG, Vex, EXx }, 0 }, 159 }, 160 /* PREFIX_EVEX_0F3828 */ 161 { 162 { Bad_Opcode }, 163 { "vpmovm2Y%BW", { XM, MaskR }, 0 }, 164 { VEX_W_TABLE (EVEX_W_0F3828_P_2) }, 165 }, 166 /* PREFIX_EVEX_0F3829 */ 167 { 168 { Bad_Opcode }, 169 { "vpmov%BW2mY", { MaskG, Ux }, 0 }, 170 { VEX_W_TABLE (EVEX_W_0F3829_P_2) }, 171 }, 172 /* PREFIX_EVEX_0F382A */ 173 { 174 { Bad_Opcode }, 175 { VEX_W_TABLE (EVEX_W_0F382A_P_1) }, 176 { VEX_W_TABLE (EVEX_W_0F382A_P_2) }, 177 }, 178 /* PREFIX_EVEX_0F3830 */ 179 { 180 { Bad_Opcode }, 181 { VEX_W_TABLE (EVEX_W_0F3830_P_1) }, 182 { "%XEvpmovzxbw", { XM, EXxmmq }, 0 }, 183 }, 184 /* PREFIX_EVEX_0F3831 */ 185 { 186 { Bad_Opcode }, 187 { VEX_W_TABLE (EVEX_W_0F3831_P_1) }, 188 { "%XEvpmovzxbd", { XM, EXxmmqd }, 0 }, 189 }, 190 /* PREFIX_EVEX_0F3832 */ 191 { 192 { Bad_Opcode }, 193 { VEX_W_TABLE (EVEX_W_0F3832_P_1) }, 194 { "%XEvpmovzxbq", { XM, EXxmmdw }, 0 }, 195 }, 196 /* PREFIX_EVEX_0F3833 */ 197 { 198 { Bad_Opcode }, 199 { VEX_W_TABLE (EVEX_W_0F3833_P_1) }, 200 { "%XEvpmovzxwd", { XM, EXxmmq }, 0 }, 201 }, 202 /* PREFIX_EVEX_0F3834 */ 203 { 204 { Bad_Opcode }, 205 { VEX_W_TABLE (EVEX_W_0F3834_P_1) }, 206 { "%XEvpmovzxwq", { XM, EXxmmqd }, 0 }, 207 }, 208 /* PREFIX_EVEX_0F3835 */ 209 { 210 { Bad_Opcode }, 211 { VEX_W_TABLE (EVEX_W_0F3835_P_1) }, 212 { VEX_W_TABLE (EVEX_W_0F3835_P_2) }, 213 }, 214 /* PREFIX_EVEX_0F3838 */ 215 { 216 { Bad_Opcode }, 217 { "vpmovm2Y%DQ", { XM, MaskR }, 0 }, 218 { "%XEvpminsb", { XM, Vex, EXx }, 0 }, 219 }, 220 /* PREFIX_EVEX_0F3839 */ 221 { 222 { Bad_Opcode }, 223 { "vpmov%DQ2mY", { MaskG, Ux }, 0 }, 224 { "%XEvpmins%DQ", { XM, Vex, EXx }, 0 }, 225 }, 226 /* PREFIX_EVEX_0F383A */ 227 { 228 { Bad_Opcode }, 229 { VEX_W_TABLE (EVEX_W_0F383A_P_1) }, 230 { "%XEvpminuw", { XM, Vex, EXx }, 0 }, 231 }, 232 /* PREFIX_EVEX_0F3852 */ 233 { 234 { Bad_Opcode }, 235 { "vdpbf16p%XS", { XM, Vex, EXx }, 0 }, 236 { VEX_W_TABLE (VEX_W_0F3852) }, 237 { "vp4dpws%XSd", { XM, Vex, Mxmm }, 0 }, 238 }, 239 /* PREFIX_EVEX_0F3853 */ 240 { 241 { Bad_Opcode }, 242 { Bad_Opcode }, 243 { VEX_W_TABLE (VEX_W_0F3853) }, 244 { "vp4dpws%XSds", { XM, Vex, Mxmm }, 0 }, 245 }, 246 /* PREFIX_EVEX_0F3868 */ 247 { 248 { Bad_Opcode }, 249 { Bad_Opcode }, 250 { Bad_Opcode }, 251 { "vp2intersectY%DQ", { MaskG, Vex, EXx, EXxEVexS }, 0 }, 252 }, 253 /* PREFIX_EVEX_0F3872 */ 254 { 255 { Bad_Opcode }, 256 { "vcvtnep%XS2bf16%XY", { XMxmmq, EXx }, 0 }, 257 { VEX_W_TABLE (EVEX_W_0F3872_P_2) }, 258 { "vcvtne2p%XS2bf16", { XM, Vex, EXx}, 0 }, 259 }, 260 /* PREFIX_EVEX_0F389A */ 261 { 262 { Bad_Opcode }, 263 { Bad_Opcode }, 264 { "%XEvfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, 265 { "v4fmaddp%XS", { XM, Vex, Mxmm }, 0 }, 266 }, 267 /* PREFIX_EVEX_0F389B */ 268 { 269 { Bad_Opcode }, 270 { Bad_Opcode }, 271 { "%XEvfmsub132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 }, 272 { "v4fmadds%XS", { XMScalar, VexScalar, Mxmm }, 0 }, 273 }, 274 /* PREFIX_EVEX_0F38AA */ 275 { 276 { Bad_Opcode }, 277 { Bad_Opcode }, 278 { "%XEvfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, 279 { "v4fnmaddp%XS", { XM, Vex, Mxmm }, 0 }, 280 }, 281 /* PREFIX_EVEX_0F38AB */ 282 { 283 { Bad_Opcode }, 284 { Bad_Opcode }, 285 { "%XEvfmsub213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 }, 286 { "v4fnmadds%XS", { XMScalar, VexScalar, Mxmm }, 0 }, 287 }, 288 /* PREFIX_EVEX_0F3A08 */ 289 { 290 { "vrndscalep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 }, 291 { Bad_Opcode }, 292 { "vrndscalep%XS", { XM, EXx, EXxEVexS, Ib }, 0 }, 293 }, 294 /* PREFIX_EVEX_0F3A0A */ 295 { 296 { "vrndscales%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 }, 297 { Bad_Opcode }, 298 { "vrndscales%XS", { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, 0 }, 299 }, 300 /* PREFIX_EVEX_0F3A26 */ 301 { 302 { "vgetmantp%XH", { XM, EXxh, EXxEVexS, Ib }, 0 }, 303 { Bad_Opcode }, 304 { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, 0 }, 305 }, 306 /* PREFIX_EVEX_0F3A27 */ 307 { 308 { "vgetmants%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 }, 309 { Bad_Opcode }, 310 { "vgetmants%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 }, 311 }, 312 /* PREFIX_EVEX_0F3A56 */ 313 { 314 { "vreducep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 }, 315 { Bad_Opcode }, 316 { "vreducep%XW", { XM, EXx, EXxEVexS, Ib }, 0 }, 317 }, 318 /* PREFIX_EVEX_0F3A57 */ 319 { 320 { "vreduces%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 }, 321 { Bad_Opcode }, 322 { "vreduces%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 }, 323 }, 324 /* PREFIX_EVEX_0F3A66 */ 325 { 326 { "vfpclassp%XH%XZ", { MaskG, EXxh, Ib }, 0 }, 327 { Bad_Opcode }, 328 { "vfpclassp%XW%XZ", { MaskG, EXx, Ib }, 0 }, 329 }, 330 /* PREFIX_EVEX_0F3A67 */ 331 { 332 { "vfpclasss%XH", { MaskG, EXw, Ib }, 0 }, 333 { Bad_Opcode }, 334 { "vfpclasss%XW", { MaskG, EXdq, Ib }, 0 }, 335 }, 336 /* PREFIX_EVEX_0F3AC2 */ 337 { 338 { "vcmpp%XH", { MaskG, Vex, EXxh, EXxEVexS, CMP }, 0 }, 339 { "vcmps%XH", { MaskG, VexScalar, EXw, EXxEVexS, CMP }, 0 }, 340 }, 341 /* PREFIX_EVEX_MAP4_D8 */ 342 { 343 { "sha1nexte", { XM, EXxmm }, 0 }, 344 { REG_TABLE (REG_0F38D8_PREFIX_1) }, 345 }, 346 /* PREFIX_EVEX_MAP4_DA */ 347 { 348 { "sha1msg2", { XM, EXxmm }, 0 }, 349 { "encodekey128", { Gd, Rd }, 0 }, 350 }, 351 /* PREFIX_EVEX_MAP4_DB */ 352 { 353 { "sha256rnds2", { XM, EXxmm, XMM0 }, 0 }, 354 { "encodekey256", { Gd, Rd }, 0 }, 355 }, 356 /* PREFIX_EVEX_MAP4_DC */ 357 { 358 { "sha256msg1", { XM, EXxmm }, 0 }, 359 { "aesenc128kl", { XM, M }, 0 }, 360 }, 361 /* PREFIX_EVEX_MAP4_DD */ 362 { 363 { "sha256msg2", { XM, EXxmm }, 0 }, 364 { "aesdec128kl", { XM, M }, 0 }, 365 }, 366 /* PREFIX_EVEX_MAP4_DE */ 367 { 368 { Bad_Opcode }, 369 { "aesenc256kl", { XM, M }, 0 }, 370 }, 371 /* PREFIX_EVEX_MAP4_DF */ 372 { 373 { Bad_Opcode }, 374 { "aesdec256kl", { XM, M }, 0 }, 375 }, 376 /* PREFIX_EVEX_MAP4_F0 */ 377 { 378 { "crc32A", { Gdq, Eb }, 0 }, 379 { "invept", { Gm, Mo }, 0 }, 380 }, 381 /* PREFIX_EVEX_MAP4_F1 */ 382 { 383 { "crc32Q", { Gdq, Ev }, 0 }, 384 { "invvpid", { Gm, Mo }, 0 }, 385 { "crc32Q", { Gdq, Ev }, 0 }, 386 }, 387 /* PREFIX_EVEX_MAP4_F2 */ 388 { 389 { Bad_Opcode }, 390 { "invpcid", { Gm, M }, 0 }, 391 }, 392 /* PREFIX_EVEX_MAP4_F8 */ 393 { 394 { Bad_Opcode }, 395 { MOD_TABLE (MOD_EVEX_MAP4_F8_P_1) }, 396 { "movdir64b", { Gva, M }, 0 }, 397 { MOD_TABLE (MOD_EVEX_MAP4_F8_P_3) }, 398 }, 399 /* PREFIX_EVEX_MAP5_10 */ 400 { 401 { Bad_Opcode }, 402 { "vmovs%XH", { XMScalar, VexScalarR, EXw }, 0 }, 403 }, 404 /* PREFIX_EVEX_MAP5_11 */ 405 { 406 { Bad_Opcode }, 407 { "vmovs%XH", { EXwS, VexScalarR, XMScalar }, 0 }, 408 }, 409 /* PREFIX_EVEX_MAP5_1D */ 410 { 411 { "vcvtss2s%XH", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 }, 412 { Bad_Opcode }, 413 { "vcvtps2p%XHx%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, 414 }, 415 /* PREFIX_EVEX_MAP5_2A */ 416 { 417 { Bad_Opcode }, 418 { "vcvtsi2shY{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 }, 419 }, 420 /* PREFIX_EVEX_MAP5_2C */ 421 { 422 { Bad_Opcode }, 423 { "vcvttsh2si", { Gdq, EXw, EXxEVexS }, 0 }, 424 }, 425 /* PREFIX_EVEX_MAP5_2D */ 426 { 427 { Bad_Opcode }, 428 { "vcvtsh2si", { Gdq, EXw, EXxEVexR }, 0 }, 429 }, 430 /* PREFIX_EVEX_MAP5_2E */ 431 { 432 { "vucomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 }, 433 }, 434 /* PREFIX_EVEX_MAP5_2F */ 435 { 436 { "vcomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 }, 437 }, 438 /* PREFIX_EVEX_MAP5_51 */ 439 { 440 { "vsqrtp%XH", { XM, EXxh, EXxEVexR }, 0 }, 441 { "vsqrts%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 442 }, 443 /* PREFIX_EVEX_MAP5_58 */ 444 { 445 { "vaddp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 446 { "vadds%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 447 }, 448 /* PREFIX_EVEX_MAP5_59 */ 449 { 450 { "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 451 { "vmuls%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 452 }, 453 /* PREFIX_EVEX_MAP5_5A */ 454 { 455 { "vcvtp%XH2pd", { XM, EXxmmqdh, EXxEVexS }, 0 }, 456 { "vcvts%XH2sd", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 }, 457 { "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 }, 458 { "vcvts%XD2sh", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 }, 459 }, 460 /* PREFIX_EVEX_MAP5_5B */ 461 { 462 { VEX_W_TABLE (EVEX_W_MAP5_5B_P_0) }, 463 { "vcvttp%XH2dq", { XM, EXxmmqh, EXxEVexS }, 0 }, 464 { "vcvtp%XH2dq", { XM, EXxmmqh, EXxEVexR }, 0 }, 465 }, 466 /* PREFIX_EVEX_MAP5_5C */ 467 { 468 { "vsubp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 469 { "vsubs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 470 }, 471 /* PREFIX_EVEX_MAP5_5D */ 472 { 473 { "vminp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 }, 474 { "vmins%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 }, 475 }, 476 /* PREFIX_EVEX_MAP5_5E */ 477 { 478 { "vdivp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 479 { "vdivs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 480 }, 481 /* PREFIX_EVEX_MAP5_5F */ 482 { 483 { "vmaxp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 }, 484 { "vmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 }, 485 }, 486 /* PREFIX_EVEX_MAP5_78 */ 487 { 488 { "vcvttp%XH2udq", { XM, EXxmmqh, EXxEVexS }, 0 }, 489 { "vcvttsh2usi", { Gdq, EXw, EXxEVexS }, 0 }, 490 { "vcvttp%XH2uqq", { XM, EXxmmqdh, EXxEVexS }, 0 }, 491 }, 492 /* PREFIX_EVEX_MAP5_79 */ 493 { 494 { "vcvtp%XH2udq", { XM, EXxmmqh, EXxEVexR }, 0 }, 495 { "vcvtsh2usi", { Gdq, EXw, EXxEVexR }, 0 }, 496 { "vcvtp%XH2uqq", { XM, EXxmmqdh, EXxEVexR }, 0 }, 497 }, 498 /* PREFIX_EVEX_MAP5_7A */ 499 { 500 { Bad_Opcode }, 501 { Bad_Opcode }, 502 { "vcvttp%XH2qq", { XM, EXxmmqdh, EXxEVexS }, 0 }, 503 { VEX_W_TABLE (EVEX_W_MAP5_7A_P_3) }, 504 }, 505 /* PREFIX_EVEX_MAP5_7B */ 506 { 507 { Bad_Opcode }, 508 { "vcvtusi2shY{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 }, 509 { "vcvtp%XH2qq", { XM, EXxmmqdh, EXxEVexR }, 0 }, 510 }, 511 /* PREFIX_EVEX_MAP5_7C */ 512 { 513 { "vcvttp%XH2uw", { XM, EXxh, EXxEVexS }, 0 }, 514 { Bad_Opcode }, 515 { "vcvttp%XH2w", { XM, EXxh, EXxEVexS }, 0 }, 516 }, 517 /* PREFIX_EVEX_MAP5_7D */ 518 { 519 { "vcvtp%XH2uw", { XM, EXxh, EXxEVexR }, 0 }, 520 { "vcvtw2p%XH", { XM, EXxh, EXxEVexR }, 0 }, 521 { "vcvtp%XH2w", { XM, EXxh, EXxEVexR }, 0 }, 522 { "vcvtuw2p%XH", { XM, EXxh, EXxEVexR }, 0 }, 523 }, 524 /* PREFIX_EVEX_MAP6_13 */ 525 { 526 { "vcvts%XH2ss", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 }, 527 { Bad_Opcode }, 528 { "vcvtp%XH2psx", { XM, EXxmmqh, EXxEVexS }, 0 }, 529 }, 530 /* PREFIX_EVEX_MAP6_56 */ 531 { 532 { Bad_Opcode }, 533 { "vfmaddcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 }, 534 { Bad_Opcode }, 535 { "vfcmaddcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 }, 536 }, 537 /* PREFIX_EVEX_MAP6_57 */ 538 { 539 { Bad_Opcode }, 540 { "vfmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 }, 541 { Bad_Opcode }, 542 { "vfcmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 }, 543 }, 544 /* PREFIX_EVEX_MAP6_D6 */ 545 { 546 { Bad_Opcode }, 547 { "vfmulcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 }, 548 { Bad_Opcode }, 549 { "vfcmulcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 }, 550 }, 551 /* PREFIX_EVEX_MAP6_D7 */ 552 { 553 { Bad_Opcode }, 554 { "vfmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 }, 555 { Bad_Opcode }, 556 { "vfcmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 }, 557 }, 558