1/* MIPS ELF support for BFD.
2   Copyright (C) 1993-2022 Free Software Foundation, Inc.
3
4   By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
5   information in the System V Application Binary Interface, MIPS
6   Processor Supplement.
7
8   This file is part of BFD, the Binary File Descriptor library.
9
10   This program is free software; you can redistribute it and/or modify
11   it under the terms of the GNU General Public License as published by
12   the Free Software Foundation; either version 3 of the License, or
13   (at your option) any later version.
14
15   This program is distributed in the hope that it will be useful,
16   but WITHOUT ANY WARRANTY; without even the implied warranty of
17   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18   GNU General Public License for more details.
19
20   You should have received a copy of the GNU General Public License
21   along with this program; if not, write to the Free Software
22   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
23   MA 02110-1301, USA.  */
24
25/* This file holds definitions specific to the MIPS ELF ABI.  Note
26   that most of this is not actually implemented by BFD.  */
27
28#ifndef _ELF_MIPS_H
29#define _ELF_MIPS_H
30
31#include "elf/reloc-macros.h"
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36
37/* Relocation types.  */
38START_RELOC_NUMBERS (elf_mips_reloc_type)
39  RELOC_NUMBER (R_MIPS_NONE, 0)
40  RELOC_NUMBER (R_MIPS_16, 1)
41  RELOC_NUMBER (R_MIPS_32, 2)		/* In Elf 64: alias R_MIPS_ADD */
42  RELOC_NUMBER (R_MIPS_REL32, 3)	/* In Elf 64: alias R_MIPS_REL */
43  RELOC_NUMBER (R_MIPS_26, 4)
44  RELOC_NUMBER (R_MIPS_HI16, 5)
45  RELOC_NUMBER (R_MIPS_LO16, 6)
46  RELOC_NUMBER (R_MIPS_GPREL16, 7)	/* In Elf 64: alias R_MIPS_GPREL */
47  RELOC_NUMBER (R_MIPS_LITERAL, 8)
48  RELOC_NUMBER (R_MIPS_GOT16, 9)	/* In Elf 64: alias R_MIPS_GOT */
49  RELOC_NUMBER (R_MIPS_PC16, 10)
50  RELOC_NUMBER (R_MIPS_CALL16, 11)	/* In Elf 64: alias R_MIPS_CALL */
51  RELOC_NUMBER (R_MIPS_GPREL32, 12)
52  /* The remaining relocs are defined on Irix, although they are not
53     in the MIPS ELF ABI.  */
54  RELOC_NUMBER (R_MIPS_UNUSED1, 13)
55  RELOC_NUMBER (R_MIPS_UNUSED2, 14)
56  RELOC_NUMBER (R_MIPS_UNUSED3, 15)
57  RELOC_NUMBER (R_MIPS_SHIFT5, 16)
58  RELOC_NUMBER (R_MIPS_SHIFT6, 17)
59  RELOC_NUMBER (R_MIPS_64, 18)
60  RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
61  RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
62  RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
63  RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
64  RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
65  RELOC_NUMBER (R_MIPS_SUB, 24)
66  RELOC_NUMBER (R_MIPS_INSERT_A, 25)
67  RELOC_NUMBER (R_MIPS_INSERT_B, 26)
68  RELOC_NUMBER (R_MIPS_DELETE, 27)
69  RELOC_NUMBER (R_MIPS_HIGHER, 28)
70  RELOC_NUMBER (R_MIPS_HIGHEST, 29)
71  RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
72  RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
73  RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
74  RELOC_NUMBER (R_MIPS_REL16, 33)
75  RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
76  RELOC_NUMBER (R_MIPS_PJUMP, 35)
77  RELOC_NUMBER (R_MIPS_RELGOT, 36)
78  RELOC_NUMBER (R_MIPS_JALR, 37)
79  /* TLS relocations.  */
80  RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)
81  RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)
82  RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)
83  RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)
84  RELOC_NUMBER (R_MIPS_TLS_GD, 42)
85  RELOC_NUMBER (R_MIPS_TLS_LDM, 43)
86  RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)
87  RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)
88  RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)
89  RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)
90  RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)
91  RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)
92  RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)
93  RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)
94  /* Space to grow */
95  RELOC_NUMBER (R_MIPS_PC21_S2, 60)
96  RELOC_NUMBER (R_MIPS_PC26_S2, 61)
97  RELOC_NUMBER (R_MIPS_PC18_S3, 62)
98  RELOC_NUMBER (R_MIPS_PC19_S2, 63)
99  RELOC_NUMBER (R_MIPS_PCHI16, 64)
100  RELOC_NUMBER (R_MIPS_PCLO16, 65)
101  FAKE_RELOC (R_MIPS_max, 66)
102  /* These relocs are used for the mips16.  */
103  FAKE_RELOC (R_MIPS16_min, 100)
104  RELOC_NUMBER (R_MIPS16_26, 100)
105  RELOC_NUMBER (R_MIPS16_GPREL, 101)
106  RELOC_NUMBER (R_MIPS16_GOT16, 102)
107  RELOC_NUMBER (R_MIPS16_CALL16, 103)
108  RELOC_NUMBER (R_MIPS16_HI16, 104)
109  RELOC_NUMBER (R_MIPS16_LO16, 105)
110  RELOC_NUMBER (R_MIPS16_TLS_GD, 106)
111  RELOC_NUMBER (R_MIPS16_TLS_LDM, 107)
112  RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108)
113  RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109)
114  RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110)
115  RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111)
116  RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112)
117  RELOC_NUMBER (R_MIPS16_PC16_S1, 113)
118  FAKE_RELOC (R_MIPS16_max, 114)
119  /* These relocations are specific to VxWorks.  */
120  RELOC_NUMBER (R_MIPS_COPY, 126)
121  RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
122
123  /* These relocations are specific to microMIPS.  */
124  FAKE_RELOC (R_MICROMIPS_min, 130)
125  RELOC_NUMBER (R_MICROMIPS_26_S1, 133)
126  RELOC_NUMBER (R_MICROMIPS_HI16, 134)
127  RELOC_NUMBER (R_MICROMIPS_LO16, 135)
128  RELOC_NUMBER (R_MICROMIPS_GPREL16, 136)	/* In Elf 64:
129						   alias R_MICROMIPS_GPREL */
130  RELOC_NUMBER (R_MICROMIPS_LITERAL, 137)
131  RELOC_NUMBER (R_MICROMIPS_GOT16, 138)		/* In Elf 64:
132						   alias R_MICROMIPS_GOT */
133  RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139)
134  RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140)
135  RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141)
136  RELOC_NUMBER (R_MICROMIPS_CALL16, 142)	/* In Elf 64:
137						   alias R_MICROMIPS_CALL */
138  RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145)
139  RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146)
140  RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147)
141  RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148)
142  RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149)
143  RELOC_NUMBER (R_MICROMIPS_SUB, 150)
144  RELOC_NUMBER (R_MICROMIPS_HIGHER, 151)
145  RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152)
146  RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153)
147  RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154)
148  RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155)
149  RELOC_NUMBER (R_MICROMIPS_JALR, 156)
150  RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157)
151  /* TLS relocations.  */
152  RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162)
153  RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163)
154  RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164)
155  RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165)
156  RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166)
157  RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169)
158  RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170)
159  /* microMIPS GP- and PC-relative relocations. */
160  RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172)
161  RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173)
162  FAKE_RELOC (R_MICROMIPS_max, 174)
163
164  /* This was a GNU extension used by embedded-PIC.  It was co-opted by
165     mips-linux for exception-handling data.  GCC stopped using it in
166     May, 2004, then started using it again for compact unwind tables.  */
167  RELOC_NUMBER (R_MIPS_PC32, 248)
168  RELOC_NUMBER (R_MIPS_EH, 249)
169  /* FIXME: this relocation is used internally by gas.  */
170  RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)
171  /* These are GNU extensions to enable C++ vtable garbage collection.  */
172  RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
173  RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
174END_RELOC_NUMBERS (R_MIPS_maxext)
175
176/* Processor specific flags for the ELF header e_flags field.  */
177
178/* At least one .noreorder directive appears in the source.  */
179#define EF_MIPS_NOREORDER	0x00000001
180
181/* File contains position independent code.  */
182#define EF_MIPS_PIC		0x00000002
183
184/* Code in file uses the standard calling sequence for calling
185   position independent code.  */
186#define EF_MIPS_CPIC		0x00000004
187
188/* ???  Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.  */
189#define EF_MIPS_XGOT		0x00000008
190
191/* Code in file uses UCODE (obsolete) */
192#define EF_MIPS_UCODE		0x00000010
193
194/* Code in file uses new ABI (-n32 on Irix 6).  */
195#define EF_MIPS_ABI2		0x00000020
196
197/* Process the .MIPS.options section first by ld */
198#define EF_MIPS_OPTIONS_FIRST	0x00000080
199
200/* Indicates code compiled for a 64-bit machine in 32-bit mode
201   (regs are 32-bits wide).  */
202#define EF_MIPS_32BITMODE	0x00000100
203
204/* 32-bit machine but FP registers are 64 bit (-mfp64).  */
205#define EF_MIPS_FP64		0x00000200
206
207/* Code in file uses the IEEE 754-2008 NaN encoding convention.  */
208#define EF_MIPS_NAN2008		0x00000400
209
210/* Architectural Extensions used by this file */
211#define EF_MIPS_ARCH_ASE	0x0f000000
212
213/* Use MDMX multimedia extensions */
214#define EF_MIPS_ARCH_ASE_MDMX	0x08000000
215
216/* Use MIPS-16 ISA extensions */
217#define EF_MIPS_ARCH_ASE_M16	0x04000000
218
219/* Use MICROMIPS ISA extensions.  */
220#define EF_MIPS_ARCH_ASE_MICROMIPS	0x02000000
221
222/* Four bit MIPS architecture field.  */
223#define EF_MIPS_ARCH		0xf0000000
224
225/* -mips1 code.  */
226#define E_MIPS_ARCH_1		0x00000000
227
228/* -mips2 code.  */
229#define E_MIPS_ARCH_2		0x10000000
230
231/* -mips3 code.  */
232#define E_MIPS_ARCH_3		0x20000000
233
234/* -mips4 code.  */
235#define E_MIPS_ARCH_4		0x30000000
236
237/* -mips5 code.  */
238#define E_MIPS_ARCH_5           0x40000000
239
240/* -mips32 code.  */
241#define E_MIPS_ARCH_32          0x50000000
242
243/* -mips64 code.  */
244#define E_MIPS_ARCH_64          0x60000000
245
246/* -mips32r2 code.  */
247#define E_MIPS_ARCH_32R2        0x70000000
248
249/* -mips64r2 code.  */
250#define E_MIPS_ARCH_64R2        0x80000000
251
252/* -mips32r6 code.  */
253#define E_MIPS_ARCH_32R6        0x90000000
254
255/* -mips64r6 code.  */
256#define E_MIPS_ARCH_64R6        0xa0000000
257
258/* The ABI of the file.  Also see EF_MIPS_ABI2 above. */
259#define EF_MIPS_ABI		0x0000F000
260
261/* The original o32 abi. */
262#define E_MIPS_ABI_O32          0x00001000
263
264/* O32 extended to work on 64 bit architectures */
265#define E_MIPS_ABI_O64          0x00002000
266
267/* EABI in 32 bit mode */
268#define E_MIPS_ABI_EABI32       0x00003000
269
270/* EABI in 64 bit mode */
271#define E_MIPS_ABI_EABI64       0x00004000
272
273
274/* Machine variant if we know it.  This field was invented at Cygnus,
275   but it is hoped that other vendors will adopt it.  If some standard
276   is developed, this code should be changed to follow it. */
277
278#define EF_MIPS_MACH		0x00FF0000
279
280/* Cygnus is choosing values between 80 and 9F;
281   00 - 7F should be left for a future standard;
282   the rest are open. */
283
284#define E_MIPS_MACH_3900	0x00810000
285#define E_MIPS_MACH_4010	0x00820000
286#define E_MIPS_MACH_4100	0x00830000
287#define E_MIPS_MACH_4650	0x00850000
288#define E_MIPS_MACH_4120	0x00870000
289#define E_MIPS_MACH_4111	0x00880000
290#define E_MIPS_MACH_SB1         0x008a0000
291#define E_MIPS_MACH_OCTEON	0x008b0000
292#define E_MIPS_MACH_XLR     	0x008c0000
293#define E_MIPS_MACH_OCTEON2	0x008d0000
294#define E_MIPS_MACH_OCTEON3	0x008e0000
295#define E_MIPS_MACH_5400	0x00910000
296#define E_MIPS_MACH_5900	0x00920000
297#define E_MIPS_MACH_IAMR2	0x00930000
298#define E_MIPS_MACH_5500	0x00980000
299#define E_MIPS_MACH_9000	0x00990000
300#define E_MIPS_MACH_LS2E        0x00A00000
301#define E_MIPS_MACH_LS2F        0x00A10000
302#define E_MIPS_MACH_GS464       0x00A20000
303#define E_MIPS_MACH_GS464E	0x00A30000
304#define E_MIPS_MACH_GS264E	0x00A40000
305
306/* Processor specific section indices.  These sections do not actually
307   exist.  Symbols with a st_shndx field corresponding to one of these
308   values have a special meaning.  */
309
310/* Defined and allocated common symbol.  Value is virtual address.  If
311   relocated, alignment must be preserved.  */
312#define SHN_MIPS_ACOMMON	SHN_LORESERVE
313
314/* Defined and allocated text symbol.  Value is virtual address.
315   Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
316#define SHN_MIPS_TEXT		(SHN_LORESERVE + 1)
317
318/* Defined and allocated data symbol.  Value is virtual address.
319   Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
320#define SHN_MIPS_DATA		(SHN_LORESERVE + 2)
321
322/* Small common symbol.  */
323#define SHN_MIPS_SCOMMON	(SHN_LORESERVE + 3)
324
325/* Small undefined symbol.  */
326#define SHN_MIPS_SUNDEFINED	(SHN_LORESERVE + 4)
327
328/* Processor specific section types.  */
329
330/* Section contains the set of dynamic shared objects used when
331   statically linking.  */
332#define SHT_MIPS_LIBLIST	0x70000000
333
334/* I'm not sure what this is, but it's used on Irix 5.  */
335#define SHT_MIPS_MSYM		0x70000001
336
337/* Section contains list of symbols whose definitions conflict with
338   symbols defined in shared objects.  */
339#define SHT_MIPS_CONFLICT	0x70000002
340
341/* Section contains the global pointer table.  */
342#define SHT_MIPS_GPTAB		0x70000003
343
344/* Section contains microcode information.  The exact format is
345   unspecified.  */
346#define SHT_MIPS_UCODE		0x70000004
347
348/* Section contains some sort of debugging information.  The exact
349   format is unspecified.  It's probably ECOFF symbols.  */
350#define SHT_MIPS_DEBUG		0x70000005
351
352/* Section contains register usage information.  */
353#define SHT_MIPS_REGINFO	0x70000006
354
355/* ??? */
356#define SHT_MIPS_PACKAGE	0x70000007
357
358/* ??? */
359#define SHT_MIPS_PACKSYM	0x70000008
360
361/* ??? */
362#define SHT_MIPS_RELD		0x70000009
363
364/* Section contains interface information.  */
365#define SHT_MIPS_IFACE		0x7000000b
366
367/* Section contains description of contents of another section.  */
368#define SHT_MIPS_CONTENT	0x7000000c
369
370/* Section contains miscellaneous options.  */
371#define SHT_MIPS_OPTIONS	0x7000000d
372
373/* ??? */
374#define SHT_MIPS_SHDR		0x70000010
375
376/* ??? */
377#define SHT_MIPS_FDESC		0x70000011
378
379/* ??? */
380#define SHT_MIPS_EXTSYM		0x70000012
381
382/* ??? */
383#define SHT_MIPS_DENSE		0x70000013
384
385/* ??? */
386#define SHT_MIPS_PDESC		0x70000014
387
388/* ??? */
389#define SHT_MIPS_LOCSYM		0x70000015
390
391/* ??? */
392#define SHT_MIPS_AUXSYM		0x70000016
393
394/* ??? */
395#define SHT_MIPS_OPTSYM		0x70000017
396
397/* ??? */
398#define SHT_MIPS_LOCSTR		0x70000018
399
400/* ??? */
401#define SHT_MIPS_LINE		0x70000019
402
403/* ??? */
404#define SHT_MIPS_RFDESC		0x7000001a
405
406/* Delta C++: symbol table */
407#define SHT_MIPS_DELTASYM	0x7000001b
408
409/* Delta C++: instance table */
410#define SHT_MIPS_DELTAINST	0x7000001c
411
412/* Delta C++: class table */
413#define SHT_MIPS_DELTACLASS	0x7000001d
414
415/* DWARF debugging section.  */
416#define SHT_MIPS_DWARF		0x7000001e
417
418/* Delta C++: declarations */
419#define SHT_MIPS_DELTADECL	0x7000001f
420
421/* List of libraries the binary depends on.  Includes a time stamp, version
422   number.  */
423#define SHT_MIPS_SYMBOL_LIB	0x70000020
424
425/* Events section.  */
426#define SHT_MIPS_EVENTS		0x70000021
427
428/* ??? */
429#define SHT_MIPS_TRANSLATE	0x70000022
430
431/* Special pixie sections */
432#define SHT_MIPS_PIXIE		0x70000023
433
434/* Address translation table (for debug info) */
435#define SHT_MIPS_XLATE		0x70000024
436
437/* SGI internal address translation table (for debug info) */
438#define SHT_MIPS_XLATE_DEBUG	0x70000025
439
440/* Intermediate code */
441#define SHT_MIPS_WHIRL		0x70000026
442
443/* C++ exception handling region info */
444#define SHT_MIPS_EH_REGION	0x70000027
445
446/* Obsolete address translation table (for debug info) */
447#define SHT_MIPS_XLATE_OLD	0x70000028
448
449/* Runtime procedure descriptor table exception information (ucode) ??? */
450#define SHT_MIPS_PDR_EXCEPTION	0x70000029
451
452/* ABI related flags section.  */
453#define SHT_MIPS_ABIFLAGS	0x7000002a
454
455/* GNU style symbol hash table with xlat.  */
456#define SHT_MIPS_XHASH		0x7000002b
457
458/* A section of type SHT_MIPS_LIBLIST contains an array of the
459   following structure.  The sh_link field is the section index of the
460   string table.  The sh_info field is the number of entries in the
461   section.  */
462typedef struct
463{
464  /* String table index for name of shared object.  */
465  unsigned long l_name;
466  /* Time stamp.  */
467  unsigned long l_time_stamp;
468  /* Checksum of symbol names and common sizes.  */
469  unsigned long l_checksum;
470  /* String table index for version.  */
471  unsigned long l_version;
472  /* Flags.  */
473  unsigned long l_flags;
474} Elf32_Lib;
475
476/* The external version of Elf32_Lib.  */
477typedef struct
478{
479  unsigned char l_name[4];
480  unsigned char l_time_stamp[4];
481  unsigned char l_checksum[4];
482  unsigned char l_version[4];
483  unsigned char l_flags[4];
484} Elf32_External_Lib;
485
486/* The l_flags field of an Elf32_Lib structure may contain the
487   following flags.  */
488
489/* Require an exact match at runtime.  */
490#define LL_EXACT_MATCH		0x00000001
491
492/* Ignore version incompatibilities at runtime.  */
493#define LL_IGNORE_INT_VER	0x00000002
494
495/* Require matching minor version number.  */
496#define LL_REQUIRE_MINOR	0x00000004
497
498/* ??? */
499#define LL_EXPORTS		0x00000008
500
501/* Delay loading of this library until really needed.  */
502#define LL_DELAY_LOAD		0x00000010
503
504/* ??? Delta C++ stuff ??? */
505#define LL_DELTA		0x00000020
506
507
508/* A section of type SHT_MIPS_CONFLICT is an array of indices into the
509   .dynsym section.  Each element has the following type.  */
510typedef unsigned long Elf32_Conflict;
511typedef unsigned char Elf32_External_Conflict[4];
512
513typedef unsigned long Elf64_Conflict;
514typedef unsigned char Elf64_External_Conflict[8];
515
516/* A section of type SHT_MIPS_GPTAB contains information about how
517   much GP space would be required for different -G arguments.  This
518   information is only used so that the linker can provide informative
519   suggestions as to the best -G value to use.  The sh_info field is
520   the index of the section for which this information applies.  The
521   contents of the section are an array of the following union.  The
522   first element uses the gt_header field.  The remaining elements use
523   the gt_entry field.  */
524typedef union
525{
526  struct
527    {
528      /* -G value actually used for this object file.  */
529      unsigned long gt_current_g_value;
530      /* Unused.  */
531      unsigned long gt_unused;
532    } gt_header;
533  struct
534    {
535      /* If this -G argument has been used...  */
536      unsigned long gt_g_value;
537      /* ...this many GP section bytes would be required.  */
538      unsigned long gt_bytes;
539    } gt_entry;
540} Elf32_gptab;
541
542/* The external version of Elf32_gptab.  */
543
544typedef union
545{
546  struct
547    {
548      unsigned char gt_current_g_value[4];
549      unsigned char gt_unused[4];
550    } gt_header;
551  struct
552    {
553      unsigned char gt_g_value[4];
554      unsigned char gt_bytes[4];
555    } gt_entry;
556} Elf32_External_gptab;
557
558/* A section of type SHT_MIPS_REGINFO contains the following
559   structure.  */
560typedef struct
561{
562  /* Mask of general purpose registers used.  */
563  uint32_t ri_gprmask;
564  /* Mask of co-processor registers used.  */
565  uint32_t ri_cprmask[4];
566  /* GP register value for this object file.  */
567  uint32_t ri_gp_value;
568} Elf32_RegInfo;
569
570/* The external version of the Elf_RegInfo structure.  */
571typedef struct
572{
573  unsigned char ri_gprmask[4];
574  unsigned char ri_cprmask[4][4];
575  unsigned char ri_gp_value[4];
576} Elf32_External_RegInfo;
577
578/* MIPS ELF .reginfo swapping routines.  */
579extern void bfd_mips_elf32_swap_reginfo_in
580  (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *);
581extern void bfd_mips_elf32_swap_reginfo_out
582  (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *);
583
584/* Processor specific section flags.  */
585
586/* This section must be in the global data area.  */
587#define SHF_MIPS_GPREL		0x10000000
588
589/* This section should be merged.  */
590#define SHF_MIPS_MERGE		0x20000000
591
592/* This section contains address data of size implied by section
593   element size.  */
594#define SHF_MIPS_ADDR		0x40000000
595
596/* This section contains string data.  */
597#define SHF_MIPS_STRING		0x80000000
598
599/* This section may not be stripped.  */
600#define SHF_MIPS_NOSTRIP	0x08000000
601
602/* This section is local to threads.  */
603#define SHF_MIPS_LOCAL		0x04000000
604
605/* Linker should generate implicit weak names for this section.  */
606#define SHF_MIPS_NAMES		0x02000000
607
608/* Section contais text/data which may be replicated in other sections.
609   Linker should retain only one copy.  */
610#define SHF_MIPS_NODUPES	0x01000000
611
612/* Processor specific program header types.  */
613
614/* Register usage information.  Identifies one .reginfo section.  */
615#define PT_MIPS_REGINFO		0x70000000
616
617/* Runtime procedure table.  */
618#define PT_MIPS_RTPROC		0x70000001
619
620/* .MIPS.options section.  */
621#define PT_MIPS_OPTIONS		0x70000002
622
623/* Records ABI related flags.  */
624#define PT_MIPS_ABIFLAGS	0x70000003
625
626/* Processor specific dynamic array tags.  */
627
628/* 32 bit version number for runtime linker interface.  */
629#define DT_MIPS_RLD_VERSION	0x70000001
630
631/* Time stamp.  */
632#define DT_MIPS_TIME_STAMP	0x70000002
633
634/* Checksum of external strings and common sizes.  */
635#define DT_MIPS_ICHECKSUM	0x70000003
636
637/* Index of version string in string table.  */
638#define DT_MIPS_IVERSION	0x70000004
639
640/* 32 bits of flags.  */
641#define DT_MIPS_FLAGS		0x70000005
642
643/* Base address of the segment.  */
644#define DT_MIPS_BASE_ADDRESS	0x70000006
645
646/* ??? */
647#define DT_MIPS_MSYM		0x70000007
648
649/* Address of .conflict section.  */
650#define DT_MIPS_CONFLICT	0x70000008
651
652/* Address of .liblist section.  */
653#define DT_MIPS_LIBLIST		0x70000009
654
655/* Number of local global offset table entries.  */
656#define DT_MIPS_LOCAL_GOTNO	0x7000000a
657
658/* Number of entries in the .conflict section.  */
659#define DT_MIPS_CONFLICTNO	0x7000000b
660
661/* Number of entries in the .liblist section.  */
662#define DT_MIPS_LIBLISTNO	0x70000010
663
664/* Number of entries in the .dynsym section.  */
665#define DT_MIPS_SYMTABNO	0x70000011
666
667/* Index of first external dynamic symbol not referenced locally.  */
668#define DT_MIPS_UNREFEXTNO	0x70000012
669
670/* Index of first dynamic symbol in global offset table.  */
671#define DT_MIPS_GOTSYM		0x70000013
672
673/* Number of page table entries in global offset table.  */
674#define DT_MIPS_HIPAGENO	0x70000014
675
676/* Address of run time loader map, used for debugging.  */
677#define DT_MIPS_RLD_MAP		0x70000016
678
679/* Delta C++ class definition.  */
680#define DT_MIPS_DELTA_CLASS	0x70000017
681
682/* Number of entries in DT_MIPS_DELTA_CLASS.  */
683#define DT_MIPS_DELTA_CLASS_NO	0x70000018
684
685/* Delta C++ class instances.  */
686#define DT_MIPS_DELTA_INSTANCE	0x70000019
687
688/* Number of entries in DT_MIPS_DELTA_INSTANCE.  */
689#define DT_MIPS_DELTA_INSTANCE_NO	0x7000001a
690
691/* Delta relocations.  */
692#define DT_MIPS_DELTA_RELOC	0x7000001b
693
694/* Number of entries in DT_MIPS_DELTA_RELOC.  */
695#define DT_MIPS_DELTA_RELOC_NO	0x7000001c
696
697/* Delta symbols that Delta relocations refer to.  */
698#define DT_MIPS_DELTA_SYM	0x7000001d
699
700/* Number of entries in DT_MIPS_DELTA_SYM.  */
701#define DT_MIPS_DELTA_SYM_NO	0x7000001e
702
703/* Delta symbols that hold class declarations.  */
704#define DT_MIPS_DELTA_CLASSSYM	0x70000020
705
706/* Number of entries in DT_MIPS_DELTA_CLASSSYM.  */
707#define DT_MIPS_DELTA_CLASSSYM_NO	0x70000021
708
709/* Flags indicating information about C++ flavor.  */
710#define DT_MIPS_CXX_FLAGS	0x70000022
711
712/* Pixie information (???).  */
713#define DT_MIPS_PIXIE_INIT	0x70000023
714
715/* Address of .MIPS.symlib */
716#define DT_MIPS_SYMBOL_LIB	0x70000024
717
718/* The GOT index of the first PTE for a segment */
719#define DT_MIPS_LOCALPAGE_GOTIDX	0x70000025
720
721/* The GOT index of the first PTE for a local symbol */
722#define DT_MIPS_LOCAL_GOTIDX	0x70000026
723
724/* The GOT index of the first PTE for a hidden symbol */
725#define DT_MIPS_HIDDEN_GOTIDX	0x70000027
726
727/* The GOT index of the first PTE for a protected symbol */
728#define DT_MIPS_PROTECTED_GOTIDX	0x70000028
729
730/* Address of `.MIPS.options'.  */
731#define DT_MIPS_OPTIONS		0x70000029
732
733/* Address of `.interface'.  */
734#define DT_MIPS_INTERFACE	0x7000002a
735
736/* ??? */
737#define DT_MIPS_DYNSTR_ALIGN	0x7000002b
738
739/* Size of the .interface section.  */
740#define DT_MIPS_INTERFACE_SIZE	0x7000002c
741
742/* Size of rld_text_resolve function stored in the GOT.  */
743#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR	0x7000002d
744
745/* Default suffix of DSO to be added by rld on dlopen() calls.  */
746#define DT_MIPS_PERF_SUFFIX	0x7000002e
747
748/* Size of compact relocation section (O32).  */
749#define DT_MIPS_COMPACT_SIZE	0x7000002f
750
751/* GP value for auxiliary GOTs.  */
752#define DT_MIPS_GP_VALUE	0x70000030
753
754/* Address of auxiliary .dynamic.  */
755#define DT_MIPS_AUX_DYNAMIC	0x70000031
756
757/* Address of the base of the PLTGOT.  */
758#define DT_MIPS_PLTGOT         0x70000032
759
760/* Points to the base of a writable PLT.  */
761#define DT_MIPS_RWPLT          0x70000034
762
763/* Relative offset of run time loader map, used for debugging.  */
764#define DT_MIPS_RLD_MAP_REL    0x70000035
765
766/* Address of .MIPS.xhash section.  */
767#define DT_MIPS_XHASH	       0x70000036
768
769/* Flags which may appear in a DT_MIPS_FLAGS entry.  */
770
771/* No flags.  */
772#define RHF_NONE		0x00000000
773
774/* Uses shortcut pointers.  */
775#define RHF_QUICKSTART		0x00000001
776
777/* Hash size is not a power of two.  */
778#define RHF_NOTPOT		0x00000002
779
780/* Ignore LD_LIBRARY_PATH.  */
781#define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
782
783/* DSO address may not be relocated. */
784#define RHF_NO_MOVE		0x00000008
785
786/* SGI specific features. */
787#define RHF_SGI_ONLY		0x00000010
788
789/* Guarantee that .init will finish executing before any non-init
790   code in DSO is called. */
791#define RHF_GUARANTEE_INIT	   0x00000020
792
793/* Contains Delta C++ code. */
794#define RHF_DELTA_C_PLUS_PLUS	   0x00000040
795
796/* Guarantee that .init will start executing before any non-init
797   code in DSO is called. */
798#define RHF_GUARANTEE_START_INIT   0x00000080
799
800/* Generated by pixie. */
801#define RHF_PIXIE		   0x00000100
802
803/* Delay-load DSO by default. */
804#define RHF_DEFAULT_DELAY_LOAD	   0x00000200
805
806/* Object may be requickstarted */
807#define RHF_REQUICKSTART	   0x00000400
808
809/* Object has been requickstarted */
810#define RHF_REQUICKSTARTED	   0x00000800
811
812/* Generated by cord. */
813#define RHF_CORD		   0x00001000
814
815/* Object contains no unresolved undef symbols. */
816#define RHF_NO_UNRES_UNDEF	   0x00002000
817
818/* Symbol table is in a safe order. */
819#define RHF_RLD_ORDER_SAFE	   0x00004000
820
821/* Special values for the st_other field in the symbol table.  These
822   are used in an Irix 5 dynamic symbol table.  */
823
824#define STO_DEFAULT		STV_DEFAULT
825#define STO_INTERNAL		STV_INTERNAL
826#define STO_HIDDEN		STV_HIDDEN
827#define STO_PROTECTED		STV_PROTECTED
828
829/* Two topmost bits denote the MIPS ISA for .text symbols:
830   + 00 -- standard MIPS code,
831   + 10 -- microMIPS code,
832   + 11 -- MIPS16 code; requires the following two bits to be set too.
833   Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.  See below
834   for details.  */
835#define STO_MIPS_ISA		(3 << 6)
836
837/* The mask spanning the rest of MIPS psABI flags.  At most one is expected
838   to be set except for STO_MIPS16.  */
839#define STO_MIPS_FLAGS		(~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1)))
840
841/* The MIPS psABI was updated in 2008 with support for PLTs and copy
842   relocs.  There are therefore two types of nonzero SHN_UNDEF functions:
843   PLT entries and traditional MIPS lazy binding stubs.  We mark the former
844   with STO_MIPS_PLT to distinguish them from the latter.  */
845#define STO_MIPS_PLT		0x8
846#define ELF_ST_IS_MIPS_PLT(other)					\
847  ((ELF_ST_IS_MIPS16 (other)						\
848    ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS))			\
849    : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
850#define ELF_ST_SET_MIPS_PLT(other)					\
851  ((ELF_ST_IS_MIPS16 (other)						\
852    ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS))			\
853    : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
854
855/* This value is used to mark PIC functions in an object that mixes
856   PIC and non-PIC.  Note that this bit overlaps with STO_MIPS16,
857   although MIPS16 symbols are never considered to be MIPS_PIC.  */
858#define STO_MIPS_PIC		0x20
859#define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC)
860#define ELF_ST_SET_MIPS_PIC(other)					\
861  ((ELF_ST_IS_MIPS16 (other)						\
862    ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS))			\
863    : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC)
864
865/* This value is used for a mips16 .text symbol.  */
866#define STO_MIPS16		0xf0
867#define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16)
868#define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16)
869
870/* This value is used for a microMIPS .text symbol.  To distinguish from
871   STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS.  The
872   mask is STO_MIPS_ISA.  */
873#define STO_MICROMIPS		(2 << 6)
874#define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS)
875#define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS)
876
877/* Whether code compression (either of the MIPS16 or the microMIPS ASEs)
878   has been indicated for a .text symbol.  */
879#define ELF_ST_IS_COMPRESSED(other) \
880  (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other))
881
882/* This bit is used on Irix to indicate a symbol whose definition
883   is optional - if, at final link time, it cannot be found, no
884   error message should be produced.  */
885#define STO_OPTIONAL		(1 << 2)
886/* A macro to examine the STO_OPTIONAL bit.  */
887#define ELF_MIPS_IS_OPTIONAL(other)	((other) & STO_OPTIONAL)
888
889/* The 64-bit MIPS ELF ABI uses an unusual reloc format.  Each
890   relocation entry specifies up to three actual relocations, all at
891   the same address.  The first relocation which required a symbol
892   uses the symbol in the r_sym field.  The second relocation which
893   requires a symbol uses the symbol in the r_ssym field.  If all
894   three relocations require a symbol, the third one uses a zero
895   value.  */
896
897/* An entry in a 64 bit SHT_REL section.  */
898
899typedef struct
900{
901  /* Address of relocation.  */
902  unsigned char r_offset[8];
903  /* Symbol index.  */
904  unsigned char r_sym[4];
905  /* Special symbol.  */
906  unsigned char r_ssym[1];
907  /* Third relocation.  */
908  unsigned char r_type3[1];
909  /* Second relocation.  */
910  unsigned char r_type2[1];
911  /* First relocation.  */
912  unsigned char r_type[1];
913} Elf64_Mips_External_Rel;
914
915typedef struct
916{
917  /* Address of relocation.  */
918  bfd_vma r_offset;
919  /* Symbol index.  */
920  unsigned long r_sym;
921  /* Special symbol.  */
922  unsigned char r_ssym;
923  /* Third relocation.  */
924  unsigned char r_type3;
925  /* Second relocation.  */
926  unsigned char r_type2;
927  /* First relocation.  */
928  unsigned char r_type;
929} Elf64_Mips_Internal_Rel;
930
931/* An entry in a 64 bit SHT_RELA section.  */
932
933typedef struct
934{
935  /* Address of relocation.  */
936  unsigned char r_offset[8];
937  /* Symbol index.  */
938  unsigned char r_sym[4];
939  /* Special symbol.  */
940  unsigned char r_ssym[1];
941  /* Third relocation.  */
942  unsigned char r_type3[1];
943  /* Second relocation.  */
944  unsigned char r_type2[1];
945  /* First relocation.  */
946  unsigned char r_type[1];
947  /* Addend.  */
948  unsigned char r_addend[8];
949} Elf64_Mips_External_Rela;
950
951typedef struct
952{
953  /* Address of relocation.  */
954  bfd_vma r_offset;
955  /* Symbol index.  */
956  unsigned long r_sym;
957  /* Special symbol.  */
958  unsigned char r_ssym;
959  /* Third relocation.  */
960  unsigned char r_type3;
961  /* Second relocation.  */
962  unsigned char r_type2;
963  /* First relocation.  */
964  unsigned char r_type;
965  /* Addend.  */
966  bfd_signed_vma r_addend;
967} Elf64_Mips_Internal_Rela;
968
969/* MIPS ELF 64 relocation info access macros.  */
970#define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
971#define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
972#define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
973#define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
974
975/* Values found in the r_ssym field of a relocation entry.  */
976
977/* No relocation.  */
978#define RSS_UNDEF	0
979
980/* Value of GP.  */
981#define RSS_GP		1
982
983/* Value of GP in object being relocated.  */
984#define RSS_GP0		2
985
986/* Address of location being relocated.  */
987#define RSS_LOC		3
988
989/* A SHT_MIPS_OPTIONS section contains a series of options, each of
990   which starts with this header.  */
991
992typedef struct
993{
994  /* Type of option.  */
995  unsigned char kind[1];
996  /* Size of option descriptor, including header.  */
997  unsigned char size[1];
998  /* Section index of affected section, or 0 for global option.  */
999  unsigned char section[2];
1000  /* Information specific to this kind of option.  */
1001  unsigned char info[4];
1002} Elf_External_Options;
1003
1004typedef struct
1005{
1006  /* Type of option.  */
1007  unsigned char kind;
1008  /* Size of option descriptor, including header.  */
1009  unsigned char size;
1010  /* Section index of affected section, or 0 for global option.  */
1011  uint16_t section;
1012  /* Information specific to this kind of option.  */
1013  uint32_t info;
1014} Elf_Internal_Options;
1015
1016/* MIPS ELF option header swapping routines.  */
1017extern void bfd_mips_elf_swap_options_in
1018  (bfd *, const Elf_External_Options *, Elf_Internal_Options *);
1019extern void bfd_mips_elf_swap_options_out
1020  (bfd *, const Elf_Internal_Options *, Elf_External_Options *);
1021
1022/* Values which may appear in the kind field of an Elf_Options
1023   structure.  */
1024
1025/* Undefined.  */
1026#define ODK_NULL	0
1027
1028/* Register usage and GP value.  */
1029#define ODK_REGINFO	1
1030
1031/* Exception processing information.  */
1032#define ODK_EXCEPTIONS	2
1033
1034/* Section padding information.  */
1035#define ODK_PAD		3
1036
1037/* Hardware workarounds performed.  */
1038#define ODK_HWPATCH	4
1039
1040/* Fill value used by the linker.  */
1041#define ODK_FILL	5
1042
1043/* Reserved space for desktop tools.  */
1044#define ODK_TAGS	6
1045
1046/* Hardware workarounds, AND bits when merging.  */
1047#define ODK_HWAND	7
1048
1049/* Hardware workarounds, OR bits when merging.  */
1050#define ODK_HWOR	8
1051
1052/* GP group to use for text/data sections.  */
1053#define ODK_GP_GROUP	9
1054
1055/* ID information.  */
1056#define ODK_IDENT	10
1057
1058/* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
1059   structure.  In the 64 bit ABI, it is the following structure.  The
1060   info field of the options header is not used.  */
1061
1062typedef struct
1063{
1064  /* Mask of general purpose registers used.  */
1065  unsigned char ri_gprmask[4];
1066  /* Padding.  */
1067  unsigned char ri_pad[4];
1068  /* Mask of co-processor registers used.  */
1069  unsigned char ri_cprmask[4][4];
1070  /* GP register value for this object file.  */
1071  unsigned char ri_gp_value[8];
1072} Elf64_External_RegInfo;
1073
1074typedef struct
1075{
1076  /* Mask of general purpose registers used.  */
1077  uint32_t ri_gprmask;
1078  /* Padding.  */
1079  uint32_t ri_pad;
1080  /* Mask of co-processor registers used.  */
1081  uint32_t ri_cprmask[4];
1082  /* GP register value for this object file.  */
1083  uint64_t ri_gp_value;
1084} Elf64_Internal_RegInfo;
1085
1086/* ABI Flags structure version 0.  */
1087
1088typedef struct
1089{
1090  /* Version of flags structure.  */
1091  unsigned char version[2];
1092  /* The level of the ISA: 1-5, 32, 64.  */
1093  unsigned char isa_level[1];
1094  /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1095  unsigned char isa_rev[1];
1096  /* The size of general purpose registers.  */
1097  unsigned char gpr_size[1];
1098  /* The size of co-processor 1 registers.  */
1099  unsigned char cpr1_size[1];
1100  /* The size of co-processor 2 registers.  */
1101  unsigned char cpr2_size[1];
1102  /* The floating-point ABI.  */
1103  unsigned char fp_abi[1];
1104  /* Processor-specific extension.  */
1105  unsigned char isa_ext[4];
1106  /* Mask of ASEs used.  */
1107  unsigned char ases[4];
1108  /* Mask of general flags.  */
1109  unsigned char flags1[4];
1110  unsigned char flags2[4];
1111} Elf_External_ABIFlags_v0;
1112
1113typedef struct elf_internal_abiflags_v0
1114{
1115  /* Version of flags structure.  */
1116  unsigned short version;
1117  /* The level of the ISA: 1-5, 32, 64.  */
1118  unsigned char isa_level;
1119  /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1120  unsigned char isa_rev;
1121  /* The size of general purpose registers.  */
1122  unsigned char gpr_size;
1123  /* The size of co-processor 1 registers.  */
1124  unsigned char cpr1_size;
1125  /* The size of co-processor 2 registers.  */
1126  unsigned char cpr2_size;
1127  /* The floating-point ABI.  */
1128  unsigned char fp_abi;
1129  /* Processor-specific extension.  */
1130  unsigned long isa_ext;
1131  /* Mask of ASEs used.  */
1132  unsigned long ases;
1133  /* Mask of general flags.  */
1134  unsigned long flags1;
1135  unsigned long flags2;
1136} Elf_Internal_ABIFlags_v0;
1137
1138typedef struct
1139{
1140  /* The hash value computed from the name of the corresponding
1141     dynamic symbol.  */
1142  unsigned char ms_hash_value[4];
1143  /* Contains both the dynamic relocation index and the symbol flags
1144     field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1145     to access the individual values.  The dynamic relocation index
1146     identifies the first entry in the .rel.dyn section that
1147     references the dynamic symbol corresponding to this msym entry.
1148     If the index is 0, no dynamic relocations are associated with the
1149     symbol.  The symbol flags field is reserved for future use.  */
1150  unsigned char ms_info[4];
1151} Elf32_External_Msym;
1152
1153typedef struct
1154{
1155  /* The hash value computed from the name of the corresponding
1156     dynamic symbol.  */
1157  unsigned long ms_hash_value;
1158  /* Contains both the dynamic relocation index and the symbol flags
1159     field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1160     to access the individual values.  The dynamic relocation index
1161     identifies the first entry in the .rel.dyn section that
1162     references the dynamic symbol corresponding to this msym entry.
1163     If the index is 0, no dynamic relocations are associated with the
1164     symbol.  The symbol flags field is reserved for future use.  */
1165  unsigned long ms_info;
1166} Elf32_Internal_Msym;
1167
1168#define ELF32_MS_REL_INDEX(i) ((i) >> 8)
1169#define ELF32_MS_FLAGS(i)     (i) & 0xff)
1170#define ELF32_MS_INFO(r, f)   (((r) << 8) + ((f) & 0xff))
1171
1172/* MIPS ELF reginfo swapping routines.  */
1173extern void bfd_mips_elf64_swap_reginfo_in
1174  (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *);
1175extern void bfd_mips_elf64_swap_reginfo_out
1176  (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *);
1177
1178/* MIPS ELF flags swapping routines.  */
1179extern void bfd_mips_elf_swap_abiflags_v0_in
1180  (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *);
1181extern void bfd_mips_elf_swap_abiflags_v0_out
1182  (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *);
1183
1184/* Masks for the info work of an ODK_EXCEPTIONS descriptor.  */
1185#define OEX_FPU_MIN	0x1f	/* FPEs which must be enabled.  */
1186#define OEX_FPU_MAX	0x1f00	/* FPEs which may be enabled.  */
1187#define OEX_PAGE0	0x10000	/* Page zero must be mapped.  */
1188#define OEX_SMM		0x20000	/* Force sequential memory mode.  */
1189#define OEX_FPDBUG	0x40000	/* Force precise floating-point
1190				   exceptions (debug mode).  */
1191#define OEX_DISMISS	0x80000	/* Dismiss invalid address faults.  */
1192
1193/* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX.  */
1194#define OEX_FPU_INVAL	0x10	/* Invalid operation exception.  */
1195#define OEX_FPU_DIV0	0x08	/* Division by zero exception.  */
1196#define OEX_FPU_OFLO	0x04	/* Overflow exception.  */
1197#define OEX_FPU_UFLO	0x02	/* Underflow exception.  */
1198#define OEX_FPU_INEX	0x01	/* Inexact exception.  */
1199
1200/* Masks for the info word of an ODK_PAD descriptor.  */
1201#define OPAD_PREFIX	0x01
1202#define OPAD_POSTFIX	0x02
1203#define OPAD_SYMBOL	0x04
1204
1205/* Masks for the info word of an ODK_HWPATCH descriptor.  */
1206#define OHW_R4KEOP	0x00000001	/* R4000 end-of-page patch.  */
1207#define OHW_R8KPFETCH	0x00000002	/* May need R8000 prefetch patch.  */
1208#define OHW_R5KEOP	0x00000004	/* R5000 end-of-page patch.  */
1209#define OHW_R5KCVTL	0x00000008	/* R5000 cvt.[ds].l bug
1210					   (clean == 1).  */
1211#define OHW_R10KLDL	0x00000010	/* Needs R10K misaligned
1212					   load patch. */
1213
1214/* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor.  */
1215#define OGP_GROUP	0x0000ffff	/* GP group number.  */
1216#define OGP_SELF	0xffff0000	/* Self-contained GP groups.  */
1217
1218/* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor.  */
1219#define OHWA0_R4KEOP_CHECKED	0x00000001
1220#define OHWA0_R4KEOP_CLEAN	0x00000002
1221
1222/* Values for the xxx_size bytes of an ABI flags structure.  */
1223
1224#define AFL_REG_NONE	     0x00	/* No registers.  */
1225#define AFL_REG_32	     0x01	/* 32-bit registers.  */
1226#define AFL_REG_64	     0x02	/* 64-bit registers.  */
1227#define AFL_REG_128	     0x03	/* 128-bit registers.  */
1228
1229/* Masks for the ases word of an ABI flags structure.  */
1230
1231#define AFL_ASE_DSP          0x00000001 /* DSP ASE.  */
1232#define AFL_ASE_DSPR2        0x00000002 /* DSP R2 ASE.  */
1233#define AFL_ASE_EVA          0x00000004 /* Enhanced VA Scheme.  */
1234#define AFL_ASE_MCU          0x00000008 /* MCU (MicroController) ASE.  */
1235#define AFL_ASE_MDMX         0x00000010 /* MDMX ASE.  */
1236#define AFL_ASE_MIPS3D       0x00000020 /* MIPS-3D ASE.  */
1237#define AFL_ASE_MT           0x00000040 /* MT ASE.  */
1238#define AFL_ASE_SMARTMIPS    0x00000080 /* SmartMIPS ASE.  */
1239#define AFL_ASE_VIRT         0x00000100 /* VZ ASE.  */
1240#define AFL_ASE_MSA          0x00000200 /* MSA ASE.  */
1241#define AFL_ASE_MIPS16       0x00000400 /* MIPS16 ASE.  */
1242#define AFL_ASE_MICROMIPS    0x00000800 /* MICROMIPS ASE.  */
1243#define AFL_ASE_XPA          0x00001000 /* XPA ASE.  */
1244#define AFL_ASE_DSPR3        0x00002000 /* DSP R3 ASE.  */
1245#define AFL_ASE_MIPS16E2     0x00004000 /* MIPS16e2 ASE.  */
1246#define AFL_ASE_CRC          0x00008000 /* CRC ASE.  */
1247#define AFL_ASE_RESERVED1    0x00010000 /* Reserved by MIPS Tech for WIP.  */
1248#define AFL_ASE_GINV         0x00020000 /* GINV ASE.  */
1249#define AFL_ASE_LOONGSON_MMI 0x00040000 /* Loongson MMI ASE.  */
1250#define AFL_ASE_LOONGSON_CAM 0x00080000 /* Loongson CAM ASE.  */
1251#define AFL_ASE_LOONGSON_EXT 0x00100000 /* Loongson EXT instructions.  */
1252#define AFL_ASE_LOONGSON_EXT2 0x00200000 /* Loongson EXT2 instructions.  */
1253#define AFL_ASE_MASK         0x003effff /* All ASEs.  */
1254
1255/* Values for the isa_ext word of an ABI flags structure.  */
1256
1257#define AFL_EXT_XLR           1  /* RMI Xlr instruction.  */
1258#define AFL_EXT_OCTEON2       2  /* Cavium Networks Octeon2.  */
1259#define AFL_EXT_OCTEONP       3  /* Cavium Networks OcteonP.  */
1260#define AFL_EXT_OCTEON        5  /* Cavium Networks Octeon.  */
1261#define AFL_EXT_5900          6  /* MIPS R5900 instruction.  */
1262#define AFL_EXT_4650          7  /* MIPS R4650 instruction.  */
1263#define AFL_EXT_4010          8  /* LSI R4010 instruction.  */
1264#define AFL_EXT_4100          9  /* NEC VR4100 instruction.  */
1265#define AFL_EXT_3900         10  /* Toshiba R3900 instruction.  */
1266#define AFL_EXT_10000        11  /* MIPS R10000 instruction.  */
1267#define AFL_EXT_SB1          12  /* Broadcom SB-1 instruction.  */
1268#define AFL_EXT_4111         13  /* NEC VR4111/VR4181 instruction.  */
1269#define AFL_EXT_4120         14  /* NEC VR4120 instruction.  */
1270#define AFL_EXT_5400         15  /* NEC VR5400 instruction.  */
1271#define AFL_EXT_5500         16  /* NEC VR5500 instruction.  */
1272#define AFL_EXT_LOONGSON_2E  17  /* ST Microelectronics Loongson 2E.  */
1273#define AFL_EXT_LOONGSON_2F  18  /* ST Microelectronics Loongson 2F.  */
1274#define AFL_EXT_OCTEON3      19  /* Cavium Networks Octeon3.  */
1275#define AFL_EXT_INTERAPTIV_MR2 20  /* Imagination interAptiv MR2.  */
1276
1277/* Masks for the flags1 word of an ABI flags structure.  */
1278#define AFL_FLAGS1_ODDSPREG   1	 /* Uses odd single-precision registers.  */
1279
1280extern unsigned int bfd_mips_isa_ext (bfd *);
1281
1282
1283/* Object attribute tags.  */
1284enum
1285{
1286  /* 0-3 are generic.  */
1287
1288  /* Floating-point ABI used by this object file.  */
1289  Tag_GNU_MIPS_ABI_FP = 4,
1290
1291  /* MSA ABI used by this object file.  */
1292  Tag_GNU_MIPS_ABI_MSA = 8,
1293};
1294
1295/* Object attribute values.  */
1296enum
1297{
1298  /* Values defined for Tag_GNU_MIPS_ABI_FP.  */
1299
1300  /* Not tagged or not using any ABIs affected by the differences.  */
1301  Val_GNU_MIPS_ABI_FP_ANY = 0,
1302
1303  /* Using hard-float -mdouble-float.  */
1304  Val_GNU_MIPS_ABI_FP_DOUBLE = 1,
1305
1306  /* Using hard-float -msingle-float.  */
1307  Val_GNU_MIPS_ABI_FP_SINGLE = 2,
1308
1309  /* Using soft-float.  */
1310  Val_GNU_MIPS_ABI_FP_SOFT = 3,
1311
1312  /* Using -mips32r2 -mfp64.  */
1313  Val_GNU_MIPS_ABI_FP_OLD_64 = 4,
1314
1315  /* Using -mfpxx */
1316  Val_GNU_MIPS_ABI_FP_XX = 5,
1317
1318  /* Using -mips32r2 -mfp64.  */
1319  Val_GNU_MIPS_ABI_FP_64 = 6,
1320
1321  /* Using -mips32r2 -mfp64 -mno-odd-spreg.  */
1322  Val_GNU_MIPS_ABI_FP_64A = 7,
1323
1324  /* This is reserved for backward-compatibility with an earlier
1325     implementation of the MIPS NaN2008 functionality.  */
1326  Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
1327
1328  /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
1329
1330  /* Not tagged or not using any ABIs affected by the differences.  */
1331  Val_GNU_MIPS_ABI_MSA_ANY = 0,
1332
1333  /* Using 128-bit MSA.  */
1334  Val_GNU_MIPS_ABI_MSA_128 = 1,
1335};
1336
1337#ifdef __cplusplus
1338}
1339#endif
1340
1341#endif /* _ELF_MIPS_H */
1342