1/* TI C6X assembler. 2 Copyright (C) 2010-2022 Free Software Foundation, Inc. 3 Contributed by Joseph Myers <joseph@codesourcery.com> 4 Bernd Schmidt <bernds@codesourcery.com> 5 6 This file is part of GAS, the GNU Assembler. 7 8 GAS is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GAS is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GAS; see the file COPYING. If not, write to the Free 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 21 02110-1301, USA. */ 22 23#include "as.h" 24#include "dwarf2dbg.h" 25#include "dw2gencfi.h" 26#include "safe-ctype.h" 27#include "subsegs.h" 28#include "opcode/tic6x.h" 29#include "elf/tic6x.h" 30#include "elf32-tic6x.h" 31 32/* Truncate and sign-extend at 32 bits, so that building on a 64-bit 33 host gives identical results to a 32-bit host. */ 34#define TRUNC(X) ((valueT) (X) & 0xffffffffU) 35#define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U) 36 37#define streq(a, b) (strcmp (a, b) == 0) 38 39/* Stuff for .scomm symbols. */ 40static segT sbss_section; 41static asection scom_section; 42static asymbol scom_symbol; 43 44const char comment_chars[] = ";"; 45const char line_comment_chars[] = "#*;"; 46const char line_separator_chars[] = "@"; 47 48const char EXP_CHARS[] = "eE"; 49const char FLT_CHARS[] = "dDfF"; 50 51const char *md_shortopts = ""; 52 53enum 54 { 55 OPTION_MARCH = OPTION_MD_BASE, 56 OPTION_MBIG_ENDIAN, 57 OPTION_MLITTLE_ENDIAN, 58 OPTION_MDSBT, 59 OPTION_MNO_DSBT, 60 OPTION_MPID, 61 OPTION_MPIC, 62 OPTION_MNO_PIC, 63 OPTION_MGENERATE_REL 64 }; 65 66struct option md_longopts[] = 67 { 68 { "march", required_argument, NULL, OPTION_MARCH }, 69 { "mbig-endian", no_argument, NULL, OPTION_MBIG_ENDIAN }, 70 { "mlittle-endian", no_argument, NULL, OPTION_MLITTLE_ENDIAN }, 71 { "mdsbt", no_argument, NULL, OPTION_MDSBT }, 72 { "mno-dsbt", no_argument, NULL, OPTION_MNO_DSBT }, 73 { "mpid", required_argument, NULL, OPTION_MPID }, 74 { "mpic", no_argument, NULL, OPTION_MPIC }, 75 { "mno-pic", no_argument, NULL, OPTION_MNO_PIC }, 76 { "mgenerate-rel", no_argument, NULL, OPTION_MGENERATE_REL }, 77 { NULL, no_argument, NULL, 0 } 78 }; 79size_t md_longopts_size = sizeof (md_longopts); 80 81/* The instructions enabled based only on the selected architecture 82 (all instructions, if no architecture specified). */ 83static unsigned short tic6x_arch_enable = (TIC6X_INSN_C62X 84 | TIC6X_INSN_C64X 85 | TIC6X_INSN_C64XP 86 | TIC6X_INSN_C67X 87 | TIC6X_INSN_C67XP 88 | TIC6X_INSN_C674X); 89 90/* The instructions enabled based on the current set of features 91 (architecture, as modified by other options). */ 92static unsigned short tic6x_features; 93 94/* The architecture attribute value, or C6XABI_Tag_ISA_none if 95 not yet set. */ 96static int tic6x_arch_attribute = C6XABI_Tag_ISA_none; 97 98/* Whether any instructions at all have been seen. Once any 99 instructions have been seen, architecture attributes merge into the 100 previous attribute value rather than replacing it. */ 101static bool tic6x_seen_insns = false; 102 103/* The number of registers in each register file supported by the 104 current architecture. */ 105static unsigned int tic6x_num_registers; 106 107/* Whether predication on A0 is possible. */ 108static bool tic6x_predicate_a0; 109 110/* Whether execute packets can cross fetch packet boundaries. */ 111static bool tic6x_can_cross_fp_boundary; 112 113/* Whether there are constraints on simultaneous reads and writes of 114 40-bit data. */ 115static bool tic6x_long_data_constraints; 116 117/* Whether compact instructions are available. */ 118static bool tic6x_compact_insns; 119 120/* Whether to generate RELA relocations. */ 121static bool tic6x_generate_rela = true; 122 123/* Whether the code uses DSBT addressing. */ 124static bool tic6x_dsbt; 125 126/* Types of position-independent data (attribute values for 127 Tag_ABI_PID). */ 128typedef enum 129 { 130 tic6x_pid_no = 0, 131 tic6x_pid_near = 1, 132 tic6x_pid_far = 2 133 } tic6x_pid_type; 134 135/* The type of data addressing used in this code. */ 136static tic6x_pid_type tic6x_pid; 137 138/* Whether the code uses position-independent code. */ 139static bool tic6x_pic; 140 141/* Table of supported architecture variants. */ 142typedef struct 143{ 144 const char *arch; 145 int attr; 146 unsigned short features; 147} tic6x_arch_table; 148static const tic6x_arch_table tic6x_arches[] = 149 { 150 { "c62x", C6XABI_Tag_ISA_C62X, TIC6X_INSN_C62X }, 151 { "c64x", C6XABI_Tag_ISA_C64X, TIC6X_INSN_C62X | TIC6X_INSN_C64X }, 152 { "c64x+", C6XABI_Tag_ISA_C64XP, (TIC6X_INSN_C62X 153 | TIC6X_INSN_C64X 154 | TIC6X_INSN_C64XP) }, 155 { "c67x", C6XABI_Tag_ISA_C67X, TIC6X_INSN_C62X | TIC6X_INSN_C67X }, 156 { "c67x+", C6XABI_Tag_ISA_C67XP, (TIC6X_INSN_C62X 157 | TIC6X_INSN_C67X 158 | TIC6X_INSN_C67XP) }, 159 { "c674x", C6XABI_Tag_ISA_C674X, (TIC6X_INSN_C62X 160 | TIC6X_INSN_C64X 161 | TIC6X_INSN_C64XP 162 | TIC6X_INSN_C67X 163 | TIC6X_INSN_C67XP 164 | TIC6X_INSN_C674X) } 165 }; 166 167/* Caller saved register encodings. The standard frame layout uses this 168 order, starting from the highest address. There must be 169 TIC6X_NUM_UNWIND_REGS values. */ 170enum 171{ 172 UNWIND_A15, 173 UNWIND_B15, 174 UNWIND_B14, 175 UNWIND_B13, 176 UNWIND_B12, 177 UNWIND_B11, 178 UNWIND_B10, 179 UNWIND_B3, 180 UNWIND_A14, 181 UNWIND_A13, 182 UNWIND_A12, 183 UNWIND_A11, 184 UNWIND_A10 185}; 186 187static void tic6x_output_unwinding (bool need_extab); 188 189/* Return the frame unwind state for the current function, allocating 190 as necessary. */ 191 192static tic6x_unwind_info *tic6x_get_unwind (void) 193{ 194 tic6x_unwind_info *unwind; 195 196 unwind = seg_info (now_seg)->tc_segment_info_data.unwind; 197 if (unwind) 198 return unwind; 199 200 unwind = seg_info (now_seg)->tc_segment_info_data.text_unwind; 201 if (unwind) 202 return unwind; 203 204 unwind =XNEW (tic6x_unwind_info); 205 seg_info (now_seg)->tc_segment_info_data.unwind = unwind; 206 memset (unwind, 0, sizeof (*unwind)); 207 return unwind; 208} 209 210/* Update the selected architecture based on ARCH, giving an error if 211 ARCH is an invalid value. Does not call tic6x_update_features; the 212 caller must do that if necessary. */ 213 214static void 215tic6x_use_arch (const char *arch) 216{ 217 unsigned int i; 218 219 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++) 220 if (strcmp (arch, tic6x_arches[i].arch) == 0) 221 { 222 tic6x_arch_enable = tic6x_arches[i].features; 223 if (tic6x_seen_insns) 224 tic6x_arch_attribute 225 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute, 226 tic6x_arches[i].attr); 227 else 228 tic6x_arch_attribute = tic6x_arches[i].attr; 229 return; 230 } 231 232 as_bad (_("unknown architecture '%s'"), arch); 233} 234 235/* Table of supported -mpid arguments. */ 236typedef struct 237{ 238 const char *arg; 239 tic6x_pid_type attr; 240} tic6x_pid_type_table; 241static const tic6x_pid_type_table tic6x_pid_types[] = 242 { 243 { "no", tic6x_pid_no }, 244 { "near", tic6x_pid_near }, 245 { "far", tic6x_pid_far } 246 }; 247 248/* Handle -mpid=ARG. */ 249 250static void 251tic6x_use_pid (const char *arg) 252{ 253 unsigned int i; 254 255 for (i = 0; i < ARRAY_SIZE (tic6x_pid_types); i++) 256 if (strcmp (arg, tic6x_pid_types[i].arg) == 0) 257 { 258 tic6x_pid = tic6x_pid_types[i].attr; 259 return; 260 } 261 262 as_bad (_("unknown -mpid= argument '%s'"), arg); 263} 264 265/* Parse a target-specific option. */ 266 267int 268md_parse_option (int c, const char *arg) 269{ 270 switch (c) 271 { 272 case OPTION_MARCH: 273 tic6x_use_arch (arg); 274 break; 275 276 case OPTION_MBIG_ENDIAN: 277 target_big_endian = 1; 278 break; 279 280 case OPTION_MLITTLE_ENDIAN: 281 target_big_endian = 0; 282 break; 283 284 case OPTION_MDSBT: 285 tic6x_dsbt = 1; 286 break; 287 288 case OPTION_MNO_DSBT: 289 tic6x_dsbt = 0; 290 break; 291 292 case OPTION_MPID: 293 tic6x_use_pid (arg); 294 break; 295 296 case OPTION_MPIC: 297 tic6x_pic = 1; 298 break; 299 300 case OPTION_MNO_PIC: 301 tic6x_pic = 0; 302 break; 303 304 case OPTION_MGENERATE_REL: 305 tic6x_generate_rela = false; 306 break; 307 308 default: 309 return 0; 310 } 311 return 1; 312} 313 314void 315md_show_usage (FILE *stream ATTRIBUTE_UNUSED) 316{ 317 unsigned int i; 318 319 fputc ('\n', stream); 320 fprintf (stream, _("TMS320C6000 options:\n")); 321 fprintf (stream, _(" -march=ARCH enable instructions from architecture ARCH\n")); 322 fprintf (stream, _(" -mbig-endian generate big-endian code\n")); 323 fprintf (stream, _(" -mlittle-endian generate little-endian code\n")); 324 fprintf (stream, _(" -mdsbt code uses DSBT addressing\n")); 325 fprintf (stream, _(" -mno-dsbt code does not use DSBT addressing\n")); 326 fprintf (stream, _(" -mpid=no code uses position-dependent data addressing\n")); 327 fprintf (stream, _(" -mpid=near code uses position-independent data addressing,\n" 328 " GOT accesses use near DP addressing\n")); 329 fprintf (stream, _(" -mpid=far code uses position-independent data addressing,\n" 330 " GOT accesses use far DP addressing\n")); 331 fprintf (stream, _(" -mpic code addressing is position-independent\n")); 332 fprintf (stream, _(" -mno-pic code addressing is position-dependent\n")); 333 /* -mgenerate-rel is only for testsuite use and is deliberately 334 undocumented. */ 335 336 fputc ('\n', stream); 337 fprintf (stream, _("Supported ARCH values are:")); 338 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++) 339 fprintf (stream, " %s", tic6x_arches[i].arch); 340 fputc ('\n', stream); 341} 342 343/* Update enabled features based on the current architecture and 344 related settings. */ 345static void 346tic6x_update_features (void) 347{ 348 tic6x_features = tic6x_arch_enable; 349 350 tic6x_num_registers 351 = (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? 32 : 16; 352 353 tic6x_predicate_a0 = (tic6x_arch_enable & TIC6X_INSN_C64X) != 0; 354 355 tic6x_can_cross_fp_boundary 356 = (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) != 0; 357 358 tic6x_long_data_constraints = (tic6x_arch_enable & TIC6X_INSN_C64X) == 0; 359 360 tic6x_compact_insns = (tic6x_arch_enable & TIC6X_INSN_C64XP) != 0; 361} 362 363/* Do configuration after all options have been parsed. */ 364 365void 366tic6x_after_parse_args (void) 367{ 368 tic6x_update_features (); 369} 370 371/* Parse a .cantunwind directive. */ 372static void 373s_tic6x_cantunwind (int ignored ATTRIBUTE_UNUSED) 374{ 375 tic6x_unwind_info *unwind = tic6x_get_unwind (); 376 377 /* GCC sometimes spits out superfluous .cantunwind directives, so ignore 378 them. */ 379 if (unwind->data_bytes == 0) 380 return; 381 382 if (unwind->data_bytes != -1) 383 { 384 as_bad (_("unexpected .cantunwind directive")); 385 return; 386 } 387 388 demand_empty_rest_of_line (); 389 390 if (unwind->personality_routine || unwind->personality_index != -1) 391 as_bad (_("personality routine specified for cantunwind frame")); 392 393 unwind->personality_index = -2; 394} 395 396/* Parse a .handlerdata directive. */ 397static void 398s_tic6x_handlerdata (int ignored ATTRIBUTE_UNUSED) 399{ 400 tic6x_unwind_info *unwind = tic6x_get_unwind (); 401 402 if (!unwind->saved_seg) 403 { 404 as_bad (_("unexpected .handlerdata directive")); 405 return; 406 } 407 408 if (unwind->table_entry || unwind->personality_index == -2) 409 { 410 as_bad (_("duplicate .handlerdata directive")); 411 return; 412 } 413 414 if (unwind->personality_index == -1 && unwind->personality_routine == NULL) 415 { 416 as_bad (_("personality routine required before .handlerdata directive")); 417 return; 418 } 419 420 tic6x_output_unwinding (true); 421} 422 423/* Parse a .endp directive. */ 424static void 425s_tic6x_endp (int ignored ATTRIBUTE_UNUSED) 426{ 427 tic6x_unwind_info *unwind = tic6x_get_unwind (); 428 429 if (unwind->data_bytes != 0) 430 { 431 /* Output a .exidx entry if we have not already done so. 432 Then switch back to the text section. */ 433 if (!unwind->table_entry) 434 tic6x_output_unwinding (false); 435 436 subseg_set (unwind->saved_seg, unwind->saved_subseg); 437 } 438 439 unwind->saved_seg = NULL; 440 unwind->table_entry = NULL; 441 unwind->data_bytes = 0; 442} 443 444/* Parse a .personalityindex directive. */ 445static void 446s_tic6x_personalityindex (int ignored ATTRIBUTE_UNUSED) 447{ 448 tic6x_unwind_info *unwind = tic6x_get_unwind (); 449 expressionS exp; 450 451 if (unwind->personality_routine || unwind->personality_index != -1) 452 as_bad (_("duplicate .personalityindex directive")); 453 454 expression (&exp); 455 456 if (exp.X_op != O_constant 457 || exp.X_add_number < 0 || exp.X_add_number > 15) 458 { 459 as_bad (_("bad personality routine number")); 460 ignore_rest_of_line (); 461 return; 462 } 463 464 unwind->personality_index = exp.X_add_number; 465 466 demand_empty_rest_of_line (); 467} 468 469static void 470s_tic6x_personality (int ignored ATTRIBUTE_UNUSED) 471{ 472 char *name, c; 473 tic6x_unwind_info *unwind = tic6x_get_unwind (); 474 475 if (unwind->personality_routine || unwind->personality_index != -1) 476 as_bad (_("duplicate .personality directive")); 477 478 c = get_symbol_name (&name); 479 unwind->personality_routine = symbol_find_or_make (name); 480 (void) restore_line_pointer (c); 481 demand_empty_rest_of_line (); 482} 483 484/* Parse a .arch directive. */ 485static void 486s_tic6x_arch (int ignored ATTRIBUTE_UNUSED) 487{ 488 char c; 489 char *arch; 490 491 arch = input_line_pointer; 492 while (*input_line_pointer && !ISSPACE (*input_line_pointer)) 493 input_line_pointer++; 494 c = *input_line_pointer; 495 *input_line_pointer = 0; 496 497 tic6x_use_arch (arch); 498 tic6x_update_features (); 499 *input_line_pointer = c; 500 demand_empty_rest_of_line (); 501} 502 503/* Parse a .ehtype directive. */ 504 505static void 506s_tic6x_ehtype (int ignored ATTRIBUTE_UNUSED) 507{ 508 expressionS exp; 509 char *p; 510 511#ifdef md_flush_pending_output 512 md_flush_pending_output (); 513#endif 514 515 if (is_it_end_of_statement ()) 516 { 517 demand_empty_rest_of_line (); 518 return; 519 } 520 521#ifdef md_cons_align 522 md_cons_align (4); 523#endif 524 525 526 expression (&exp); 527 528 if (exp.X_op != O_symbol) 529 { 530 as_bad (_("expected symbol")); 531 return; 532 } 533 534 p = frag_more (4); 535 memset (p, 0, 4); 536 fix_new_exp (frag_now, p - frag_now->fr_literal, 4, 537 &exp, 0, BFD_RELOC_C6000_EHTYPE); 538 539 demand_empty_rest_of_line (); 540} 541 542/* Parse a .nocmp directive. */ 543 544static void 545s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED) 546{ 547 seg_info (now_seg)->tc_segment_info_data.nocmp = true; 548 demand_empty_rest_of_line (); 549} 550 551/* .scomm pseudo-op handler. 552 553 This is a new pseudo-op to handle putting objects in .scommon. 554 By doing this the linker won't need to do any work, 555 and more importantly it removes the implicit -G arg necessary to 556 correctly link the object file. */ 557 558static void 559s_tic6x_scomm (int ignore ATTRIBUTE_UNUSED) 560{ 561 char *name; 562 char c; 563 char *p; 564 offsetT size; 565 symbolS *symbolP; 566 offsetT align; 567 int align2; 568 569 c = get_symbol_name (&name); 570 571 /* Just after name is now '\0'. */ 572 p = input_line_pointer; 573 (void) restore_line_pointer (c); 574 SKIP_WHITESPACE (); 575 if (*input_line_pointer != ',') 576 { 577 as_bad (_("expected comma after symbol name")); 578 ignore_rest_of_line (); 579 return; 580 } 581 582 /* Skip ','. */ 583 input_line_pointer++; 584 if ((size = get_absolute_expression ()) < 0) 585 { 586 /* xgettext:c-format */ 587 as_warn (_("invalid length for .scomm directive")); 588 ignore_rest_of_line (); 589 return; 590 } 591 592 /* The third argument to .scomm is the alignment. */ 593 if (*input_line_pointer != ',') 594 align = 8; 595 else 596 { 597 ++input_line_pointer; 598 align = get_absolute_expression (); 599 if (align <= 0) 600 { 601 as_warn (_("alignment is not a positive number")); 602 align = 8; 603 } 604 } 605 606 /* Convert to a power of 2 alignment. */ 607 if (align) 608 { 609 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2) 610 continue; 611 if (align != 1) 612 { 613 as_bad (_("alignment is not a power of 2")); 614 ignore_rest_of_line (); 615 return; 616 } 617 } 618 else 619 align2 = 0; 620 621 *p = 0; 622 symbolP = symbol_find_or_make (name); 623 *p = c; 624 625 if (S_IS_DEFINED (symbolP)) 626 { 627 /* xgettext:c-format */ 628 as_bad (_("attempt to re-define symbol `%s'"), 629 S_GET_NAME (symbolP)); 630 ignore_rest_of_line (); 631 return; 632 } 633 634 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) 635 { 636 /* xgettext:c-format */ 637 as_bad (_("attempt to redefine `%s' with a different length"), 638 S_GET_NAME (symbolP)); 639 640 ignore_rest_of_line (); 641 return; 642 } 643 644 if (symbol_get_obj (symbolP)->local) 645 { 646 segT old_sec = now_seg; 647 int old_subsec = now_subseg; 648 char *pfrag; 649 650 record_alignment (sbss_section, align2); 651 subseg_set (sbss_section, 0); 652 653 if (align2) 654 frag_align (align2, 0, 0); 655 656 if (S_GET_SEGMENT (symbolP) == sbss_section) 657 symbol_get_frag (symbolP)->fr_symbol = 0; 658 659 symbol_set_frag (symbolP, frag_now); 660 661 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, 662 (char *) 0); 663 *pfrag = 0; 664 S_SET_SIZE (symbolP, size); 665 S_SET_SEGMENT (symbolP, sbss_section); 666 S_CLEAR_EXTERNAL (symbolP); 667 subseg_set (old_sec, old_subsec); 668 } 669 else 670 { 671 S_SET_VALUE (symbolP, (valueT) size); 672 S_SET_ALIGN (symbolP, 1 << align2); 673 S_SET_EXTERNAL (symbolP); 674 S_SET_SEGMENT (symbolP, &scom_section); 675 } 676 677 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT; 678 679 demand_empty_rest_of_line (); 680} 681 682/* Track for each attribute whether it has been set explicitly (and so 683 should not have a default value set by the assembler). */ 684static bool tic6x_attributes_set_explicitly[NUM_KNOWN_OBJ_ATTRIBUTES]; 685 686/* Parse a .c6xabi_attribute directive. */ 687 688static void 689s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED) 690{ 691 int tag = obj_elf_vendor_attribute (OBJ_ATTR_PROC); 692 693 if (tag < NUM_KNOWN_OBJ_ATTRIBUTES) 694 tic6x_attributes_set_explicitly[tag] = true; 695} 696 697typedef struct 698{ 699 const char *name; 700 int tag; 701} tic6x_attribute_table; 702 703static const tic6x_attribute_table tic6x_attributes[] = 704 { 705#define TAG(tag, value) { #tag, tag }, 706#include "elf/tic6x-attrs.h" 707#undef TAG 708 }; 709 710/* Convert an attribute name to a number. */ 711 712int 713tic6x_convert_symbolic_attribute (const char *name) 714{ 715 unsigned int i; 716 717 for (i = 0; i < ARRAY_SIZE (tic6x_attributes); i++) 718 if (strcmp (name, tic6x_attributes[i].name) == 0) 719 return tic6x_attributes[i].tag; 720 721 return -1; 722} 723 724const pseudo_typeS md_pseudo_table[] = 725 { 726 { "arch", s_tic6x_arch, 0 }, 727 { "c6xabi_attribute", s_tic6x_c6xabi_attribute, 0 }, 728 { "nocmp", s_tic6x_nocmp, 0 }, 729 { "scomm", s_tic6x_scomm, 0 }, 730 { "word", cons, 4 }, 731 { "ehtype", s_tic6x_ehtype, 0 }, 732 { "endp", s_tic6x_endp, 0 }, 733 { "handlerdata", s_tic6x_handlerdata, 0 }, 734 { "personalityindex", s_tic6x_personalityindex, 0 }, 735 { "personality", s_tic6x_personality, 0 }, 736 { "cantunwind", s_tic6x_cantunwind, 0 }, 737 { 0, 0, 0 } 738 }; 739 740/* Hash table of opcodes. For each opcode name, this stores a pointer 741 to a tic6x_opcode_list listing (in an arbitrary order) all opcode 742 table entries with that name. */ 743static htab_t opcode_hash; 744 745/* Initialize the assembler (called once at assembler startup). */ 746 747void 748md_begin (void) 749{ 750 tic6x_opcode_id id; 751 flagword applicable; 752 segT seg; 753 subsegT subseg; 754 755 bfd_set_arch_mach (stdoutput, TARGET_ARCH, 0); 756 757 /* Insert opcodes into the hash table. */ 758 opcode_hash = str_htab_create (); 759 for (id = 0; id < tic6x_opcode_max; id++) 760 { 761 tic6x_opcode_list *opc = XNEW (tic6x_opcode_list); 762 763 opc->id = id; 764 opc->next = str_hash_find (opcode_hash, tic6x_opcode_table[id].name); 765 str_hash_insert (opcode_hash, tic6x_opcode_table[id].name, opc, 1); 766 } 767 768 /* Save the current subseg so we can restore it [it's the default one and 769 we don't want the initial section to be .sbss]. */ 770 seg = now_seg; 771 subseg = now_subseg; 772 773 /* The sbss section is for local .scomm symbols. */ 774 sbss_section = subseg_new (".bss", 0); 775 seg_info (sbss_section)->bss = 1; 776 777 /* This is copied from perform_an_assembly_pass. */ 778 applicable = bfd_applicable_section_flags (stdoutput); 779 bfd_set_section_flags (sbss_section, applicable & SEC_ALLOC); 780 781 subseg_set (seg, subseg); 782 783 /* We must construct a fake section similar to bfd_com_section 784 but with the name .scommon. */ 785 scom_section = *bfd_com_section_ptr; 786 scom_section.name = ".scommon"; 787 scom_section.output_section = & scom_section; 788 scom_section.symbol = & scom_symbol; 789 scom_section.symbol_ptr_ptr = & scom_section.symbol; 790 scom_symbol = * bfd_com_section_ptr->symbol; 791 scom_symbol.name = ".scommon"; 792 scom_symbol.section = & scom_section; 793} 794 795/* Whether the current line being parsed had the "||" parallel bars. */ 796static bool tic6x_line_parallel; 797 798/* Whether the current line being parsed started "||^" to indicate an 799 SPMASKed parallel instruction. */ 800static bool tic6x_line_spmask; 801 802/* If the current line being parsed had an instruction predicate, the 803 creg value for that predicate (which must be nonzero); otherwise 804 0. */ 805static unsigned int tic6x_line_creg; 806 807/* If the current line being parsed had an instruction predicate, the 808 z value for that predicate; otherwise 0. */ 809static unsigned int tic6x_line_z; 810 811/* Return 1 (updating input_line_pointer as appropriate) if the line 812 starting with C (immediately before input_line_pointer) starts with 813 pre-opcode text appropriate for this target, 0 otherwise. */ 814 815int 816tic6x_unrecognized_line (int c) 817{ 818 char *p, *endp; 819 unsigned int z; 820 bool areg; 821 bool bad_predicate; 822 823 switch (c) 824 { 825 case '|': 826 if (input_line_pointer[0] == '|') 827 { 828 if (input_line_pointer[1] == '^') 829 { 830 tic6x_line_spmask = true; 831 input_line_pointer += 2; 832 } 833 else 834 input_line_pointer += 1; 835 if (tic6x_line_parallel) 836 as_bad (_("multiple '||' on same line")); 837 tic6x_line_parallel = true; 838 if (tic6x_line_creg) 839 as_bad (_("'||' after predicate")); 840 return 1; 841 } 842 return 0; 843 844 case '[': 845 /* If it doesn't look like a predicate at all, just return 0. 846 If it looks like one but not a valid one, give a better 847 error. */ 848 p = input_line_pointer; 849 while (*p != ']' && !is_end_of_line[(unsigned char) *p]) 850 p++; 851 if (*p != ']') 852 return 0; 853 endp = p + 1; 854 p = input_line_pointer; 855 z = 0; 856 bad_predicate = false; 857 if (*p == '!') 858 { 859 z = 1; 860 p++; 861 } 862 if (*p == 'A' || *p == 'a') 863 areg = true; 864 else if (*p == 'B' || *p == 'b') 865 areg = false; 866 else 867 { 868 areg = true; /* Avoid uninitialized warning. */ 869 bad_predicate = true; 870 } 871 if (!bad_predicate) 872 { 873 p++; 874 if (*p != '0' && *p != '1' && *p != '2') 875 bad_predicate = true; 876 else if (p[1] != ']') 877 bad_predicate = true; 878 else 879 input_line_pointer = p + 2; 880 } 881 882 if (tic6x_line_creg) 883 as_bad (_("multiple predicates on same line")); 884 885 if (bad_predicate) 886 { 887 char ctmp = *endp; 888 *endp = 0; 889 as_bad (_("bad predicate '%s'"), input_line_pointer - 1); 890 *endp = ctmp; 891 input_line_pointer = endp; 892 return 1; 893 } 894 895 switch (*p) 896 { 897 case '0': 898 tic6x_line_creg = (areg ? 6 : 1); 899 if (areg && !tic6x_predicate_a0) 900 as_bad (_("predication on A0 not supported on this architecture")); 901 break; 902 903 case '1': 904 tic6x_line_creg = (areg ? 4 : 2); 905 break; 906 907 case '2': 908 tic6x_line_creg = (areg ? 5 : 3); 909 break; 910 911 default: 912 abort (); 913 } 914 915 tic6x_line_z = z; 916 return 1; 917 918 default: 919 return 0; 920 } 921} 922 923/* Do any target-specific handling of a label required. */ 924 925void 926tic6x_frob_label (symbolS *sym) 927{ 928 segment_info_type *si; 929 tic6x_label_list *list; 930 931 if (tic6x_line_parallel) 932 { 933 as_bad (_("label after '||'")); 934 tic6x_line_parallel = false; 935 tic6x_line_spmask = false; 936 } 937 if (tic6x_line_creg) 938 { 939 as_bad (_("label after predicate")); 940 tic6x_line_creg = 0; 941 tic6x_line_z = 0; 942 } 943 944 si = seg_info (now_seg); 945 list = si->tc_segment_info_data.label_list; 946 si->tc_segment_info_data.label_list = XNEW (tic6x_label_list); 947 si->tc_segment_info_data.label_list->next = list; 948 si->tc_segment_info_data.label_list->label = sym; 949 950 /* Defining tc_frob_label overrides the ELF definition of 951 obj_frob_label, so we need to apply its effects here. */ 952 dwarf2_emit_label (sym); 953} 954 955/* At end-of-line, give errors for start-of-line decorations that 956 needed an instruction but were not followed by one. */ 957 958static void 959tic6x_end_of_line (void) 960{ 961 if (tic6x_line_parallel) 962 { 963 as_bad (_("'||' not followed by instruction")); 964 tic6x_line_parallel = false; 965 tic6x_line_spmask = false; 966 } 967 if (tic6x_line_creg) 968 { 969 as_bad (_("predicate not followed by instruction")); 970 tic6x_line_creg = 0; 971 tic6x_line_z = 0; 972 } 973} 974 975/* Do any target-specific handling of the start of a logical line. */ 976 977void 978tic6x_start_line_hook (void) 979{ 980 tic6x_end_of_line (); 981} 982 983/* Do target-specific handling immediately after an input file from 984 the command line, and any other inputs it includes, have been 985 read. */ 986 987void 988tic6x_cleanup (void) 989{ 990 tic6x_end_of_line (); 991} 992 993/* Do target-specific initialization after arguments have been 994 processed and the output file created. */ 995 996void 997tic6x_init_after_args (void) 998{ 999 elf32_tic6x_set_use_rela_p (stdoutput, tic6x_generate_rela); 1000} 1001 1002/* Free LIST of labels (possibly NULL). */ 1003 1004static void 1005tic6x_free_label_list (tic6x_label_list *list) 1006{ 1007 while (list) 1008 { 1009 tic6x_label_list *old = list; 1010 1011 list = list->next; 1012 free (old); 1013 } 1014} 1015 1016/* Handle a data alignment of N bytes. */ 1017 1018void 1019tic6x_cons_align (int n ATTRIBUTE_UNUSED) 1020{ 1021 segment_info_type *seginfo = seg_info (now_seg); 1022 1023 /* Data means there is no current execute packet, and that any label 1024 applies to that data rather than a subsequent instruction. */ 1025 tic6x_free_label_list (seginfo->tc_segment_info_data.label_list); 1026 seginfo->tc_segment_info_data.label_list = NULL; 1027 seginfo->tc_segment_info_data.execute_packet_frag = NULL; 1028 seginfo->tc_segment_info_data.last_insn_lsb = NULL; 1029 seginfo->tc_segment_info_data.spmask_addr = NULL; 1030 seginfo->tc_segment_info_data.func_units_used = 0; 1031} 1032 1033/* Handle an alignment directive. Return TRUE if the 1034 machine-independent frag generation should be skipped. */ 1035 1036bool 1037tic6x_do_align (int n, char *fill, int len ATTRIBUTE_UNUSED, int max) 1038{ 1039 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle 1040 them in the md_end pass by inserting NOPs in parallel with 1041 previous instructions. We only do this in sections containing 1042 nothing but instructions. Code alignments of 1 or 2 bytes have 1043 no effect in such sections (but we record them with 1044 machine-dependent frags anyway so they can be skipped or 1045 converted to machine-independent), while those of more than 64 1046 bytes cannot reliably be handled in this way. */ 1047 if (n > 0 1048 && max >= 0 1049 && max < (1 << n) 1050 && !need_pass_2 1051 && fill == NULL 1052 && subseg_text_p (now_seg)) 1053 { 1054 fragS *align_frag; 1055 char *p; 1056 1057 if (n > 5) 1058 return false; 1059 1060 /* Machine-independent code would generate a frag here, but we 1061 wish to handle it in a machine-dependent way. */ 1062 if (frag_now_fix () != 0) 1063 { 1064 if (frag_now->fr_type != rs_machine_dependent) 1065 frag_wane (frag_now); 1066 1067 frag_new (0); 1068 } 1069 frag_grow (32); 1070 align_frag = frag_now; 1071 p = frag_var (rs_machine_dependent, 32, 32, max, NULL, n, NULL); 1072 /* This must be the same as the frag to which a pointer was just 1073 saved. */ 1074 if (p != align_frag->fr_literal) 1075 abort (); 1076 align_frag->tc_frag_data.is_insns = false; 1077 return true; 1078 } 1079 else 1080 return false; 1081} 1082 1083/* Types of operand for parsing purposes. These are used as bit-masks 1084 to tell tic6x_parse_operand what forms of operand are 1085 permitted. */ 1086#define TIC6X_OP_EXP 0x0001u 1087#define TIC6X_OP_REG 0x0002u 1088#define TIC6X_OP_REGPAIR 0x0004u 1089#define TIC6X_OP_IRP 0x0008u 1090#define TIC6X_OP_NRP 0x0010u 1091/* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always 1092 interpreted as an expression, which may be a symbol with the same 1093 name as a register that ends up being implicitly DP-relative. With 1094 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as 1095 a register if they match one, and failing that as an expression, 1096 which must be constant. */ 1097#define TIC6X_OP_MEM_NOUNREG 0x0020u 1098#define TIC6X_OP_MEM_UNREG 0x0040u 1099#define TIC6X_OP_CTRL 0x0080u 1100#define TIC6X_OP_FUNC_UNIT 0x0100u 1101 1102/* A register or register pair read by the assembler. */ 1103typedef struct 1104{ 1105 /* The side the register is on (1 or 2). */ 1106 unsigned int side; 1107 /* The register number (0 to 31). */ 1108 unsigned int num; 1109} tic6x_register; 1110 1111/* Types of modification of a base address. */ 1112typedef enum 1113 { 1114 tic6x_mem_mod_none, 1115 tic6x_mem_mod_plus, 1116 tic6x_mem_mod_minus, 1117 tic6x_mem_mod_preinc, 1118 tic6x_mem_mod_predec, 1119 tic6x_mem_mod_postinc, 1120 tic6x_mem_mod_postdec 1121 } tic6x_mem_mod; 1122 1123/* Scaled [] or unscaled () nature of an offset. */ 1124typedef enum 1125 { 1126 tic6x_offset_none, 1127 tic6x_offset_scaled, 1128 tic6x_offset_unscaled 1129 } tic6x_mem_scaling; 1130 1131/* A memory operand read by the assembler. */ 1132typedef struct 1133{ 1134 /* The base register. */ 1135 tic6x_register base_reg; 1136 /* How the base register is modified. */ 1137 tic6x_mem_mod mod; 1138 /* Whether there is an offset (required with plain "+" and "-"), and 1139 whether it is scaled or unscaled if so. */ 1140 tic6x_mem_scaling scaled; 1141 /* Whether the offset is a register (TRUE) or an expression 1142 (FALSE). */ 1143 bool offset_is_reg; 1144 /* The offset. */ 1145 union 1146 { 1147 expressionS exp; 1148 tic6x_register reg; 1149 } offset; 1150} tic6x_mem_ref; 1151 1152/* A functional unit in SPMASK operands read by the assembler. */ 1153typedef struct 1154{ 1155 /* The basic unit. */ 1156 tic6x_func_unit_base base; 1157 /* The side (1 or 2). */ 1158 unsigned int side; 1159} tic6x_func_unit_operand; 1160 1161/* An operand read by the assembler. */ 1162typedef struct 1163{ 1164 /* The syntactic form of the operand, as one of the bit-masks 1165 above. */ 1166 unsigned int form; 1167 /* The operand value. */ 1168 union 1169 { 1170 /* An expression: TIC6X_OP_EXP. */ 1171 expressionS exp; 1172 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */ 1173 tic6x_register reg; 1174 /* A memory reference: TIC6X_OP_MEM_NOUNREG, 1175 TIC6X_OP_MEM_UNREG. */ 1176 tic6x_mem_ref mem; 1177 /* A control register: TIC6X_OP_CTRL. */ 1178 tic6x_ctrl_id ctrl; 1179 /* A functional unit: TIC6X_OP_FUNC_UNIT. */ 1180 tic6x_func_unit_operand func_unit; 1181 } value; 1182} tic6x_operand; 1183 1184#define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0) 1185 1186/* Parse a register operand, or part of an operand, starting at *P. 1187 If syntactically OK (including that the number is in the range 0 to 1188 31, but not necessarily in range for this architecture), return 1189 TRUE, putting the register side and number in *REG and update *P to 1190 point immediately after the register number; otherwise return FALSE 1191 without changing *P (but possibly changing *REG). Do not print any 1192 diagnostics. */ 1193 1194static bool 1195tic6x_parse_register (char **p, tic6x_register *reg) 1196{ 1197 char *r = *p; 1198 1199 switch (*r) 1200 { 1201 case 'a': 1202 case 'A': 1203 reg->side = 1; 1204 break; 1205 1206 case 'b': 1207 case 'B': 1208 reg->side = 2; 1209 break; 1210 1211 default: 1212 return false; 1213 } 1214 r++; 1215 1216 if (*r >= '0' && *r <= '9') 1217 { 1218 reg->num = *r - '0'; 1219 r++; 1220 } 1221 else 1222 return false; 1223 1224 if (reg->num > 0 && *r >= '0' && *r <= '9') 1225 { 1226 reg->num = reg->num * 10 + (*r - '0'); 1227 r++; 1228 } 1229 1230 if (*r >= '0' && *r <= '9') 1231 return false; 1232 1233 if (reg->num >= 32) 1234 return false; 1235 *p = r; 1236 return true; 1237} 1238 1239/* Parse the initial two characters of a functional unit name starting 1240 at *P. If OK, set *BASE and *SIDE and return true; otherwise, 1241 return FALSE. */ 1242 1243static bool 1244tic6x_parse_func_unit_base (char *p, tic6x_func_unit_base *base, 1245 unsigned int *side) 1246{ 1247 bool good_func_unit = true; 1248 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu; 1249 unsigned int maybe_side = 0; 1250 1251 switch (p[0]) 1252 { 1253 case 'd': 1254 case 'D': 1255 maybe_base = tic6x_func_unit_d; 1256 break; 1257 1258 case 'l': 1259 case 'L': 1260 maybe_base = tic6x_func_unit_l; 1261 break; 1262 1263 case 'm': 1264 case 'M': 1265 maybe_base = tic6x_func_unit_m; 1266 break; 1267 1268 case 's': 1269 case 'S': 1270 maybe_base = tic6x_func_unit_s; 1271 break; 1272 1273 default: 1274 good_func_unit = false; 1275 break; 1276 } 1277 1278 if (good_func_unit) 1279 switch (p[1]) 1280 { 1281 case '1': 1282 maybe_side = 1; 1283 break; 1284 1285 case '2': 1286 maybe_side = 2; 1287 break; 1288 1289 default: 1290 good_func_unit = false; 1291 break; 1292 } 1293 1294 if (good_func_unit) 1295 { 1296 *base = maybe_base; 1297 *side = maybe_side; 1298 } 1299 1300 return good_func_unit; 1301} 1302 1303/* Parse an operand starting at *P. If the operand parses OK, return 1304 TRUE and store the value in *OP; otherwise return FALSE (possibly 1305 changing *OP). In any case, update *P to point to the following 1306 comma or end of line. The possible operand forms are given by 1307 OP_FORMS. For diagnostics, this is operand OPNO of an opcode 1308 starting at STR, length OPC_LEN. */ 1309 1310static bool 1311tic6x_parse_operand (char **p, tic6x_operand *op, unsigned int op_forms, 1312 char *str, int opc_len, unsigned int opno) 1313{ 1314 bool operand_parsed = false; 1315 char *q = *p; 1316 1317 if ((op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG)) 1318 == (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG)) 1319 abort (); 1320 1321 /* Check for functional unit names for SPMASK and SPMASKR. */ 1322 if (!operand_parsed && (op_forms & TIC6X_OP_FUNC_UNIT)) 1323 { 1324 tic6x_func_unit_base base = tic6x_func_unit_nfu; 1325 unsigned int side = 0; 1326 1327 if (tic6x_parse_func_unit_base (q, &base, &side)) 1328 { 1329 char *rq = q + 2; 1330 1331 skip_whitespace (rq); 1332 if (is_end_of_line[(unsigned char) *rq] || *rq == ',') 1333 { 1334 op->form = TIC6X_OP_FUNC_UNIT; 1335 op->value.func_unit.base = base; 1336 op->value.func_unit.side = side; 1337 operand_parsed = true; 1338 q = rq; 1339 } 1340 } 1341 } 1342 1343 /* Check for literal "irp". */ 1344 if (!operand_parsed && (op_forms & TIC6X_OP_IRP)) 1345 { 1346 if ((q[0] == 'i' || q[0] == 'I') 1347 && (q[1] == 'r' || q[1] == 'R') 1348 && (q[2] == 'p' || q[2] == 'P')) 1349 { 1350 char *rq = q + 3; 1351 1352 skip_whitespace (rq); 1353 if (is_end_of_line[(unsigned char) *rq] || *rq == ',') 1354 { 1355 op->form = TIC6X_OP_IRP; 1356 operand_parsed = true; 1357 q = rq; 1358 } 1359 } 1360 } 1361 1362 /* Check for literal "nrp". */ 1363 if (!operand_parsed && (op_forms & TIC6X_OP_NRP)) 1364 { 1365 if ((q[0] == 'n' || q[0] == 'N') 1366 && (q[1] == 'r' || q[1] == 'R') 1367 && (q[2] == 'p' || q[2] == 'P')) 1368 { 1369 char *rq = q + 3; 1370 1371 skip_whitespace (rq); 1372 if (is_end_of_line[(unsigned char) *rq] || *rq == ',') 1373 { 1374 op->form = TIC6X_OP_NRP; 1375 operand_parsed = true; 1376 q = rq; 1377 } 1378 } 1379 } 1380 1381 /* Check for control register names. */ 1382 if (!operand_parsed && (op_forms & TIC6X_OP_CTRL)) 1383 { 1384 tic6x_ctrl_id crid; 1385 1386 for (crid = 0; crid < tic6x_ctrl_max; crid++) 1387 { 1388 size_t len = strlen (tic6x_ctrl_table[crid].name); 1389 1390 if (strncasecmp (tic6x_ctrl_table[crid].name, q, len) == 0) 1391 { 1392 char *rq = q + len; 1393 1394 skip_whitespace (rq); 1395 if (is_end_of_line[(unsigned char) *rq] || *rq == ',') 1396 { 1397 op->form = TIC6X_OP_CTRL; 1398 op->value.ctrl = crid; 1399 operand_parsed = true; 1400 q = rq; 1401 if (!(tic6x_ctrl_table[crid].isa_variants & tic6x_features)) 1402 as_bad (_("control register '%s' not supported " 1403 "on this architecture"), 1404 tic6x_ctrl_table[crid].name); 1405 } 1406 } 1407 } 1408 } 1409 1410 /* See if this looks like a memory reference. */ 1411 if (!operand_parsed 1412 && (op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))) 1413 { 1414 bool mem_ok = true; 1415 char *mq = q; 1416 tic6x_mem_mod mem_mod = tic6x_mem_mod_none; 1417 tic6x_register base_reg; 1418 bool require_offset, permit_offset; 1419 tic6x_mem_scaling scaled; 1420 bool offset_is_reg; 1421 expressionS offset_exp; 1422 tic6x_register offset_reg; 1423 1424 if (*mq == '*') 1425 mq++; 1426 else 1427 mem_ok = false; 1428 1429 if (mem_ok) 1430 { 1431 skip_whitespace (mq); 1432 switch (*mq) 1433 { 1434 case '+': 1435 if (mq[1] == '+') 1436 { 1437 mem_mod = tic6x_mem_mod_preinc; 1438 mq += 2; 1439 } 1440 else 1441 { 1442 mem_mod = tic6x_mem_mod_plus; 1443 mq++; 1444 } 1445 break; 1446 1447 case '-': 1448 if (mq[1] == '-') 1449 { 1450 mem_mod = tic6x_mem_mod_predec; 1451 mq += 2; 1452 } 1453 else 1454 { 1455 mem_mod = tic6x_mem_mod_minus; 1456 mq++; 1457 } 1458 break; 1459 1460 default: 1461 break; 1462 } 1463 } 1464 1465 if (mem_ok) 1466 { 1467 skip_whitespace (mq); 1468 mem_ok = tic6x_parse_register (&mq, &base_reg); 1469 } 1470 1471 if (mem_ok && mem_mod == tic6x_mem_mod_none) 1472 { 1473 skip_whitespace (mq); 1474 if (mq[0] == '+' && mq[1] == '+') 1475 { 1476 mem_mod = tic6x_mem_mod_postinc; 1477 mq += 2; 1478 } 1479 else if (mq[0] == '-' && mq[1] == '-') 1480 { 1481 mem_mod = tic6x_mem_mod_postdec; 1482 mq += 2; 1483 } 1484 } 1485 1486 if (mem_mod == tic6x_mem_mod_none) 1487 permit_offset = false; 1488 else 1489 permit_offset = true; 1490 if (mem_mod == tic6x_mem_mod_plus || mem_mod == tic6x_mem_mod_minus) 1491 require_offset = true; 1492 else 1493 require_offset = false; 1494 scaled = tic6x_offset_none; 1495 offset_is_reg = false; 1496 1497 if (mem_ok && permit_offset) 1498 { 1499 char endc = 0; 1500 1501 skip_whitespace (mq); 1502 switch (*mq) 1503 { 1504 case '[': 1505 scaled = tic6x_offset_scaled; 1506 mq++; 1507 endc = ']'; 1508 break; 1509 1510 case '(': 1511 scaled = tic6x_offset_unscaled; 1512 mq++; 1513 endc = ')'; 1514 break; 1515 1516 default: 1517 break; 1518 } 1519 if (scaled != tic6x_offset_none) 1520 { 1521 skip_whitespace (mq); 1522 if (scaled == tic6x_offset_scaled 1523 || (op_forms & TIC6X_OP_MEM_UNREG)) 1524 { 1525 bool reg_ok; 1526 char *rq = mq; 1527 1528 reg_ok = tic6x_parse_register (&rq, &offset_reg); 1529 if (reg_ok) 1530 { 1531 skip_whitespace (rq); 1532 if (*rq == endc) 1533 { 1534 mq = rq; 1535 offset_is_reg = true; 1536 } 1537 } 1538 } 1539 if (!offset_is_reg) 1540 { 1541 char *save_input_line_pointer; 1542 1543 save_input_line_pointer = input_line_pointer; 1544 input_line_pointer = mq; 1545 expression (&offset_exp); 1546 mq = input_line_pointer; 1547 input_line_pointer = save_input_line_pointer; 1548 } 1549 skip_whitespace (mq); 1550 if (*mq == endc) 1551 mq++; 1552 else 1553 mem_ok = false; 1554 } 1555 } 1556 1557 if (mem_ok && require_offset && scaled == tic6x_offset_none) 1558 mem_ok = false; 1559 1560 if (mem_ok) 1561 { 1562 skip_whitespace (mq); 1563 if (!is_end_of_line[(unsigned char) *mq] && *mq != ',') 1564 mem_ok = false; 1565 } 1566 1567 if (mem_ok) 1568 { 1569 op->form = op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG); 1570 op->value.mem.base_reg = base_reg; 1571 op->value.mem.mod = mem_mod; 1572 op->value.mem.scaled = scaled; 1573 op->value.mem.offset_is_reg = offset_is_reg; 1574 if (offset_is_reg) 1575 op->value.mem.offset.reg = offset_reg; 1576 else 1577 op->value.mem.offset.exp = offset_exp; 1578 operand_parsed = true; 1579 q = mq; 1580 if (base_reg.num >= tic6x_num_registers) 1581 as_bad (_("register number %u not supported on this architecture"), 1582 base_reg.num); 1583 if (offset_is_reg && offset_reg.num >= tic6x_num_registers) 1584 as_bad (_("register number %u not supported on this architecture"), 1585 offset_reg.num); 1586 } 1587 } 1588 1589 /* See if this looks like a register or register pair. */ 1590 if (!operand_parsed && (op_forms & (TIC6X_OP_REG | TIC6X_OP_REGPAIR))) 1591 { 1592 tic6x_register first_reg, second_reg; 1593 bool reg_ok; 1594 char *rq = q; 1595 1596 reg_ok = tic6x_parse_register (&rq, &first_reg); 1597 1598 if (reg_ok) 1599 { 1600 if (*rq == ':' && (op_forms & TIC6X_OP_REGPAIR)) 1601 { 1602 rq++; 1603 reg_ok = tic6x_parse_register (&rq, &second_reg); 1604 if (reg_ok) 1605 { 1606 skip_whitespace (rq); 1607 if (is_end_of_line[(unsigned char) *rq] || *rq == ',') 1608 { 1609 if ((second_reg.num & 1) 1610 || (first_reg.num != second_reg.num + 1) 1611 || (first_reg.side != second_reg.side)) 1612 as_bad (_("register pair for operand %u of '%.*s'" 1613 " not a valid even/odd pair"), opno, 1614 opc_len, str); 1615 op->form = TIC6X_OP_REGPAIR; 1616 op->value.reg = second_reg; 1617 operand_parsed = true; 1618 q = rq; 1619 } 1620 } 1621 } 1622 else if (op_forms & TIC6X_OP_REG) 1623 { 1624 skip_whitespace (rq); 1625 if (is_end_of_line[(unsigned char) *rq] || *rq == ',') 1626 { 1627 op->form = TIC6X_OP_REG; 1628 op->value.reg = first_reg; 1629 operand_parsed = true; 1630 q = rq; 1631 } 1632 } 1633 } 1634 if (operand_parsed) 1635 { 1636 if (first_reg.num >= tic6x_num_registers) 1637 as_bad (_("register number %u not supported on this architecture"), 1638 first_reg.num); 1639 if (op->form == TIC6X_OP_REGPAIR 1640 && second_reg.num >= tic6x_num_registers) 1641 as_bad (_("register number %u not supported on this architecture"), 1642 second_reg.num); 1643 } 1644 } 1645 1646 /* Otherwise, parse it as an expression. */ 1647 if (!operand_parsed && (op_forms & TIC6X_OP_EXP)) 1648 { 1649 char *save_input_line_pointer; 1650 1651 save_input_line_pointer = input_line_pointer; 1652 input_line_pointer = q; 1653 op->form = TIC6X_OP_EXP; 1654 expression (&op->value.exp); 1655 q = input_line_pointer; 1656 input_line_pointer = save_input_line_pointer; 1657 operand_parsed = true; 1658 } 1659 1660 if (operand_parsed) 1661 { 1662 /* Now the operand has been parsed, there must be nothing more 1663 before the comma or end of line. */ 1664 skip_whitespace (q); 1665 if (!is_end_of_line[(unsigned char) *q] && *q != ',') 1666 { 1667 operand_parsed = false; 1668 as_bad (_("junk after operand %u of '%.*s'"), opno, 1669 opc_len, str); 1670 while (!is_end_of_line[(unsigned char) *q] && *q != ',') 1671 q++; 1672 } 1673 } 1674 else 1675 { 1676 /* This could not be parsed as any acceptable form of 1677 operand. */ 1678 switch (op_forms) 1679 { 1680 case TIC6X_OP_REG | TIC6X_OP_REGPAIR: 1681 as_bad (_("bad register or register pair for operand %u of '%.*s'"), 1682 opno, opc_len, str); 1683 break; 1684 1685 case TIC6X_OP_REG | TIC6X_OP_CTRL: 1686 case TIC6X_OP_REG: 1687 as_bad (_("bad register for operand %u of '%.*s'"), 1688 opno, opc_len, str); 1689 break; 1690 1691 case TIC6X_OP_REGPAIR: 1692 as_bad (_("bad register pair for operand %u of '%.*s'"), 1693 opno, opc_len, str); 1694 break; 1695 1696 case TIC6X_OP_FUNC_UNIT: 1697 as_bad (_("bad functional unit for operand %u of '%.*s'"), 1698 opno, opc_len, str); 1699 break; 1700 1701 default: 1702 as_bad (_("bad operand %u of '%.*s'"), 1703 opno, opc_len, str); 1704 break; 1705 1706 } 1707 while (!is_end_of_line[(unsigned char) *q] && *q != ',') 1708 q++; 1709 } 1710 *p = q; 1711 return operand_parsed; 1712} 1713 1714/* Table of assembler operators and associated O_* values. */ 1715typedef struct 1716{ 1717 const char *name; 1718 operatorT op; 1719} tic6x_operator_table; 1720static const tic6x_operator_table tic6x_operators[] = { 1721#define O_dsbt_index O_md1 1722 { "dsbt_index", O_dsbt_index }, 1723#define O_got O_md2 1724 { "got", O_got }, 1725#define O_dpr_got O_md3 1726 { "dpr_got", O_dpr_got }, 1727#define O_dpr_byte O_md4 1728 { "dpr_byte", O_dpr_byte }, 1729#define O_dpr_hword O_md5 1730 { "dpr_hword", O_dpr_hword }, 1731#define O_dpr_word O_md6 1732 { "dpr_word", O_dpr_word }, 1733#define O_pcr_offset O_md7 1734 { "pcr_offset", O_pcr_offset } 1735}; 1736 1737/* Parse a name in some machine-specific way. Used on C6X to handle 1738 assembler operators. */ 1739 1740int 1741tic6x_parse_name (const char *name, expressionS *exprP, 1742 enum expr_mode mode ATTRIBUTE_UNUSED, char *nextchar) 1743{ 1744 char *p = input_line_pointer; 1745 char c, *name_start, *name_end; 1746 const char *inner_name; 1747 unsigned int i; 1748 operatorT op = O_illegal; 1749 symbolS *sym, *op_sym = NULL; 1750 1751 if (*name != '$') 1752 return 0; 1753 1754 for (i = 0; i < ARRAY_SIZE (tic6x_operators); i++) 1755 if (strcasecmp (name + 1, tic6x_operators[i].name) == 0) 1756 { 1757 op = tic6x_operators[i].op; 1758 break; 1759 } 1760 1761 if (op == O_illegal) 1762 return 0; 1763 1764 *input_line_pointer = *nextchar; 1765 skip_whitespace (p); 1766 1767 if (*p != '(') 1768 { 1769 *input_line_pointer = 0; 1770 return 0; 1771 } 1772 p++; 1773 skip_whitespace (p); 1774 1775 if (!is_name_beginner (*p)) 1776 { 1777 *input_line_pointer = 0; 1778 return 0; 1779 } 1780 1781 name_start = p; 1782 p++; 1783 while (is_part_of_name (*p)) 1784 p++; 1785 name_end = p; 1786 skip_whitespace (p); 1787 1788 if (op == O_pcr_offset) 1789 { 1790 char *op_name_start, *op_name_end; 1791 1792 if (*p != ',') 1793 { 1794 *input_line_pointer = 0; 1795 return 0; 1796 } 1797 p++; 1798 skip_whitespace (p); 1799 1800 if (!is_name_beginner (*p)) 1801 { 1802 *input_line_pointer = 0; 1803 return 0; 1804 } 1805 1806 op_name_start = p; 1807 p++; 1808 while (is_part_of_name (*p)) 1809 p++; 1810 op_name_end = p; 1811 skip_whitespace (p); 1812 1813 c = *op_name_end; 1814 *op_name_end = 0; 1815 op_sym = symbol_find_or_make (op_name_start); 1816 *op_name_end = c; 1817 } 1818 1819 if (*p != ')') 1820 { 1821 *input_line_pointer = 0; 1822 return 0; 1823 } 1824 1825 input_line_pointer = p + 1; 1826 *nextchar = *input_line_pointer; 1827 *input_line_pointer = 0; 1828 1829 c = *name_end; 1830 *name_end = 0; 1831 inner_name = name_start; 1832 if (op == O_dsbt_index && strcmp (inner_name, "__c6xabi_DSBT_BASE") != 0) 1833 { 1834 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE")); 1835 inner_name = "__c6xabi_DSBT_BASE"; 1836 } 1837 sym = symbol_find_or_make (inner_name); 1838 *name_end = c; 1839 1840 exprP->X_op = op; 1841 exprP->X_add_symbol = sym; 1842 exprP->X_add_number = 0; 1843 exprP->X_op_symbol = op_sym; 1844 exprP->X_md = 0; 1845 1846 return 1; 1847} 1848 1849/* Create a fixup for an expression. Same arguments as fix_new_exp, 1850 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that 1851 fixes resolving to constants should have those constants implicitly 1852 shifted) and FALSE otherwise, but look for C6X-specific expression 1853 types and adjust the relocations or give errors accordingly. */ 1854 1855static void 1856tic6x_fix_new_exp (fragS *frag, int where, int size, expressionS *exp, 1857 int pcrel, bfd_reloc_code_real_type r_type, 1858 bool fix_adda) 1859{ 1860 bfd_reloc_code_real_type new_reloc = BFD_RELOC_UNUSED; 1861 symbolS *subsy = NULL; 1862 fixS *fix; 1863 1864 switch (exp->X_op) 1865 { 1866 case O_dsbt_index: 1867 switch (r_type) 1868 { 1869 case BFD_RELOC_C6000_SBR_U15_W: 1870 new_reloc = BFD_RELOC_C6000_DSBT_INDEX; 1871 break; 1872 1873 default: 1874 as_bad (_("$DSBT_INDEX not supported in this context")); 1875 return; 1876 } 1877 break; 1878 1879 case O_got: 1880 switch (r_type) 1881 { 1882 case BFD_RELOC_C6000_SBR_U15_W: 1883 new_reloc = BFD_RELOC_C6000_SBR_GOT_U15_W; 1884 break; 1885 1886 default: 1887 as_bad (_("$GOT not supported in this context")); 1888 return; 1889 } 1890 break; 1891 1892 case O_dpr_got: 1893 switch (r_type) 1894 { 1895 case BFD_RELOC_C6000_ABS_L16: 1896 new_reloc = BFD_RELOC_C6000_SBR_GOT_L16_W; 1897 break; 1898 1899 case BFD_RELOC_C6000_ABS_H16: 1900 new_reloc = BFD_RELOC_C6000_SBR_GOT_H16_W; 1901 break; 1902 1903 default: 1904 as_bad (_("$DPR_GOT not supported in this context")); 1905 return; 1906 } 1907 break; 1908 1909 case O_dpr_byte: 1910 switch (r_type) 1911 { 1912 case BFD_RELOC_C6000_ABS_S16: 1913 new_reloc = BFD_RELOC_C6000_SBR_S16; 1914 break; 1915 1916 case BFD_RELOC_C6000_ABS_L16: 1917 new_reloc = BFD_RELOC_C6000_SBR_L16_B; 1918 break; 1919 1920 case BFD_RELOC_C6000_ABS_H16: 1921 new_reloc = BFD_RELOC_C6000_SBR_H16_B; 1922 break; 1923 1924 default: 1925 as_bad (_("$DPR_BYTE not supported in this context")); 1926 return; 1927 } 1928 break; 1929 1930 case O_dpr_hword: 1931 switch (r_type) 1932 { 1933 case BFD_RELOC_C6000_ABS_L16: 1934 new_reloc = BFD_RELOC_C6000_SBR_L16_H; 1935 break; 1936 1937 case BFD_RELOC_C6000_ABS_H16: 1938 new_reloc = BFD_RELOC_C6000_SBR_H16_H; 1939 break; 1940 1941 default: 1942 as_bad (_("$DPR_HWORD not supported in this context")); 1943 return; 1944 } 1945 break; 1946 1947 case O_dpr_word: 1948 switch (r_type) 1949 { 1950 case BFD_RELOC_C6000_ABS_L16: 1951 new_reloc = BFD_RELOC_C6000_SBR_L16_W; 1952 break; 1953 1954 case BFD_RELOC_C6000_ABS_H16: 1955 new_reloc = BFD_RELOC_C6000_SBR_H16_W; 1956 break; 1957 1958 default: 1959 as_bad (_("$DPR_WORD not supported in this context")); 1960 return; 1961 } 1962 break; 1963 1964 case O_pcr_offset: 1965 subsy = exp->X_op_symbol; 1966 switch (r_type) 1967 { 1968 case BFD_RELOC_C6000_ABS_S16: 1969 case BFD_RELOC_C6000_ABS_L16: 1970 new_reloc = BFD_RELOC_C6000_PCR_L16; 1971 break; 1972 1973 case BFD_RELOC_C6000_ABS_H16: 1974 new_reloc = BFD_RELOC_C6000_PCR_H16; 1975 break; 1976 1977 default: 1978 as_bad (_("$PCR_OFFSET not supported in this context")); 1979 return; 1980 } 1981 break; 1982 1983 case O_symbol: 1984 break; 1985 1986 default: 1987 if (pcrel) 1988 { 1989 as_bad (_("invalid PC-relative operand")); 1990 return; 1991 } 1992 break; 1993 } 1994 1995 if (new_reloc == BFD_RELOC_UNUSED) 1996 fix = fix_new_exp (frag, where, size, exp, pcrel, r_type); 1997 else 1998 fix = fix_new (frag, where, size, exp->X_add_symbol, exp->X_add_number, 1999 pcrel, new_reloc); 2000 fix->tc_fix_data.fix_subsy = subsy; 2001 fix->tc_fix_data.fix_adda = fix_adda; 2002} 2003 2004/* Generate a fix for a constant (.word etc.). Needed to ensure these 2005 go through the error checking in tic6x_fix_new_exp. */ 2006 2007void 2008tic6x_cons_fix_new (fragS *frag, int where, int size, expressionS *exp, 2009 bfd_reloc_code_real_type r_type) 2010{ 2011 switch (size) 2012 { 2013 case 1: 2014 r_type = BFD_RELOC_8; 2015 break; 2016 2017 case 2: 2018 r_type = BFD_RELOC_16; 2019 break; 2020 2021 case 4: 2022 r_type = BFD_RELOC_32; 2023 break; 2024 2025 default: 2026 as_bad (_("no %d-byte relocations available"), size); 2027 return; 2028 } 2029 2030 tic6x_fix_new_exp (frag, where, size, exp, 0, r_type, false); 2031} 2032 2033/* Initialize target-specific fix data. */ 2034 2035void 2036tic6x_init_fix_data (fixS *fixP) 2037{ 2038 fixP->tc_fix_data.fix_adda = false; 2039 fixP->tc_fix_data.fix_subsy = NULL; 2040} 2041 2042/* Return true if the fix can be handled by GAS, false if it must 2043 be passed through to the linker. */ 2044 2045bool 2046tic6x_fix_adjustable (fixS *fixP) 2047{ 2048 switch (fixP->fx_r_type) 2049 { 2050 /* Adjust_reloc_syms doesn't know about the GOT. */ 2051 case BFD_RELOC_C6000_SBR_GOT_U15_W: 2052 case BFD_RELOC_C6000_SBR_GOT_H16_W: 2053 case BFD_RELOC_C6000_SBR_GOT_L16_W: 2054 case BFD_RELOC_C6000_EHTYPE: 2055 return 0; 2056 2057 case BFD_RELOC_C6000_PREL31: 2058 return 0; 2059 2060 case BFD_RELOC_C6000_PCR_H16: 2061 case BFD_RELOC_C6000_PCR_L16: 2062 return 0; 2063 2064 default: 2065 return 1; 2066 } 2067} 2068 2069/* Given the fine-grained form of an operand, return the coarse 2070 (bit-mask) form. */ 2071 2072static unsigned int 2073tic6x_coarse_operand_form (tic6x_operand_form form) 2074{ 2075 switch (form) 2076 { 2077 case tic6x_operand_asm_const: 2078 case tic6x_operand_link_const: 2079 return TIC6X_OP_EXP; 2080 2081 case tic6x_operand_reg: 2082 case tic6x_operand_xreg: 2083 case tic6x_operand_dreg: 2084 case tic6x_operand_areg: 2085 case tic6x_operand_retreg: 2086 return TIC6X_OP_REG; 2087 2088 case tic6x_operand_regpair: 2089 case tic6x_operand_xregpair: 2090 case tic6x_operand_dregpair: 2091 return TIC6X_OP_REGPAIR; 2092 2093 case tic6x_operand_irp: 2094 return TIC6X_OP_IRP; 2095 2096 case tic6x_operand_nrp: 2097 return TIC6X_OP_NRP; 2098 2099 case tic6x_operand_ctrl: 2100 return TIC6X_OP_CTRL; 2101 2102 case tic6x_operand_mem_short: 2103 case tic6x_operand_mem_long: 2104 case tic6x_operand_mem_deref: 2105 return TIC6X_OP_MEM_NOUNREG; 2106 2107 case tic6x_operand_mem_ndw: 2108 return TIC6X_OP_MEM_UNREG; 2109 2110 case tic6x_operand_func_unit: 2111 return TIC6X_OP_FUNC_UNIT; 2112 2113 default: 2114 abort (); 2115 } 2116} 2117 2118/* How an operand may match or not match a desired form. If different 2119 instruction alternatives fail in different ways, the first failure 2120 in this list determines the diagnostic. */ 2121typedef enum 2122 { 2123 /* Matches. */ 2124 tic6x_match_matches, 2125 /* Bad coarse form. */ 2126 tic6x_match_coarse, 2127 /* Not constant. */ 2128 tic6x_match_non_const, 2129 /* Register on wrong side. */ 2130 tic6x_match_wrong_side, 2131 /* Not a valid address register. */ 2132 tic6x_match_bad_address, 2133 /* Not a valid return address register. */ 2134 tic6x_match_bad_return, 2135 /* Control register not readable. */ 2136 tic6x_match_ctrl_write_only, 2137 /* Control register not writable. */ 2138 tic6x_match_ctrl_read_only, 2139 /* Not a valid memory reference for this instruction. */ 2140 tic6x_match_bad_mem 2141 } tic6x_operand_match; 2142 2143/* Return whether an operand matches the given fine-grained form and 2144 read/write usage, and, if it does not match, how it fails to match. 2145 The main functional unit side is SIDE; the cross-path side is CROSS 2146 (the same as SIDE if a cross path not used); the data side is 2147 DATA_SIDE. */ 2148static tic6x_operand_match 2149tic6x_operand_matches_form (const tic6x_operand *op, tic6x_operand_form form, 2150 tic6x_rw rw, unsigned int side, unsigned int cross, 2151 unsigned int data_side) 2152{ 2153 unsigned int coarse = tic6x_coarse_operand_form (form); 2154 2155 if (coarse != op->form) 2156 return tic6x_match_coarse; 2157 2158 switch (form) 2159 { 2160 case tic6x_operand_asm_const: 2161 if (op->value.exp.X_op == O_constant) 2162 return tic6x_match_matches; 2163 else 2164 return tic6x_match_non_const; 2165 2166 case tic6x_operand_link_const: 2167 case tic6x_operand_irp: 2168 case tic6x_operand_nrp: 2169 case tic6x_operand_func_unit: 2170 /* All expressions are link-time constants, although there may 2171 not be relocations to express them in the output file. "irp" 2172 and "nrp" are unique operand values. All parsed functional 2173 unit names are valid. */ 2174 return tic6x_match_matches; 2175 2176 case tic6x_operand_reg: 2177 case tic6x_operand_regpair: 2178 if (op->value.reg.side == side) 2179 return tic6x_match_matches; 2180 else 2181 return tic6x_match_wrong_side; 2182 2183 case tic6x_operand_xreg: 2184 case tic6x_operand_xregpair: 2185 if (op->value.reg.side == cross) 2186 return tic6x_match_matches; 2187 else 2188 return tic6x_match_wrong_side; 2189 2190 case tic6x_operand_dreg: 2191 case tic6x_operand_dregpair: 2192 if (op->value.reg.side == data_side) 2193 return tic6x_match_matches; 2194 else 2195 return tic6x_match_wrong_side; 2196 2197 case tic6x_operand_areg: 2198 if (op->value.reg.side != cross) 2199 return tic6x_match_wrong_side; 2200 else if (op->value.reg.side == 2 2201 && (op->value.reg.num == 14 || op->value.reg.num == 15)) 2202 return tic6x_match_matches; 2203 else 2204 return tic6x_match_bad_address; 2205 2206 case tic6x_operand_retreg: 2207 if (op->value.reg.side != side) 2208 return tic6x_match_wrong_side; 2209 else if (op->value.reg.num != 3) 2210 return tic6x_match_bad_return; 2211 else 2212 return tic6x_match_matches; 2213 2214 case tic6x_operand_ctrl: 2215 switch (rw) 2216 { 2217 case tic6x_rw_read: 2218 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read 2219 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write) 2220 return tic6x_match_matches; 2221 else 2222 return tic6x_match_ctrl_write_only; 2223 2224 case tic6x_rw_write: 2225 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_write 2226 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write) 2227 return tic6x_match_matches; 2228 else 2229 return tic6x_match_ctrl_read_only; 2230 2231 default: 2232 abort (); 2233 } 2234 2235 case tic6x_operand_mem_deref: 2236 if (op->value.mem.mod != tic6x_mem_mod_none) 2237 return tic6x_match_bad_mem; 2238 else if (op->value.mem.scaled != tic6x_offset_none) 2239 abort (); 2240 else if (op->value.mem.base_reg.side != side) 2241 return tic6x_match_bad_mem; 2242 else 2243 return tic6x_match_matches; 2244 2245 case tic6x_operand_mem_short: 2246 case tic6x_operand_mem_ndw: 2247 if (op->value.mem.base_reg.side != side) 2248 return tic6x_match_bad_mem; 2249 if (op->value.mem.mod == tic6x_mem_mod_none) 2250 { 2251 if (op->value.mem.scaled != tic6x_offset_none) 2252 abort (); 2253 return tic6x_match_matches; 2254 } 2255 if (op->value.mem.scaled == tic6x_offset_none) 2256 { 2257 if (op->value.mem.mod == tic6x_mem_mod_plus 2258 || op->value.mem.mod == tic6x_mem_mod_minus) 2259 abort (); 2260 return tic6x_match_matches; 2261 } 2262 if (op->value.mem.offset_is_reg) 2263 { 2264 if (op->value.mem.scaled == tic6x_offset_unscaled 2265 && form != tic6x_operand_mem_ndw) 2266 abort (); 2267 if (op->value.mem.offset.reg.side == side) 2268 return tic6x_match_matches; 2269 else 2270 return tic6x_match_bad_mem; 2271 } 2272 else 2273 { 2274 if (op->value.mem.offset.exp.X_op == O_constant) 2275 return tic6x_match_matches; 2276 else 2277 return tic6x_match_bad_mem; 2278 } 2279 2280 case tic6x_operand_mem_long: 2281 if (op->value.mem.base_reg.side == 2 2282 && (op->value.mem.base_reg.num == 14 2283 || op->value.mem.base_reg.num == 15)) 2284 { 2285 switch (op->value.mem.mod) 2286 { 2287 case tic6x_mem_mod_none: 2288 if (op->value.mem.scaled != tic6x_offset_none) 2289 abort (); 2290 return tic6x_match_matches; 2291 2292 case tic6x_mem_mod_plus: 2293 if (op->value.mem.scaled == tic6x_offset_none) 2294 abort (); 2295 if (op->value.mem.offset_is_reg) 2296 return tic6x_match_bad_mem; 2297 else if (op->value.mem.scaled == tic6x_offset_scaled 2298 && op->value.mem.offset.exp.X_op != O_constant) 2299 return tic6x_match_bad_mem; 2300 else 2301 return tic6x_match_matches; 2302 2303 case tic6x_mem_mod_minus: 2304 case tic6x_mem_mod_preinc: 2305 case tic6x_mem_mod_predec: 2306 case tic6x_mem_mod_postinc: 2307 case tic6x_mem_mod_postdec: 2308 return tic6x_match_bad_mem; 2309 2310 default: 2311 abort (); 2312 } 2313 2314 } 2315 else 2316 return tic6x_match_bad_mem; 2317 2318 default: 2319 abort (); 2320 } 2321} 2322 2323/* Return the number of bits shift used with DP-relative coding method 2324 CODING. */ 2325 2326static unsigned int 2327tic6x_dpr_shift (tic6x_coding_method coding) 2328{ 2329 switch (coding) 2330 { 2331 case tic6x_coding_ulcst_dpr_byte: 2332 return 0; 2333 2334 case tic6x_coding_ulcst_dpr_half: 2335 return 1; 2336 2337 case tic6x_coding_ulcst_dpr_word: 2338 return 2; 2339 2340 default: 2341 abort (); 2342 } 2343} 2344 2345/* Return the relocation used with DP-relative coding method 2346 CODING. */ 2347 2348static bfd_reloc_code_real_type 2349tic6x_dpr_reloc (tic6x_coding_method coding) 2350{ 2351 switch (coding) 2352 { 2353 case tic6x_coding_ulcst_dpr_byte: 2354 return BFD_RELOC_C6000_SBR_U15_B; 2355 2356 case tic6x_coding_ulcst_dpr_half: 2357 return BFD_RELOC_C6000_SBR_U15_H; 2358 2359 case tic6x_coding_ulcst_dpr_word: 2360 return BFD_RELOC_C6000_SBR_U15_W; 2361 2362 default: 2363 abort (); 2364 } 2365} 2366 2367/* Given a memory reference *MEM_REF as originally parsed, fill in 2368 defaults for missing offsets. */ 2369 2370static void 2371tic6x_default_mem_ref (tic6x_mem_ref *mem_ref) 2372{ 2373 switch (mem_ref->mod) 2374 { 2375 case tic6x_mem_mod_none: 2376 if (mem_ref->scaled != tic6x_offset_none) 2377 abort (); 2378 mem_ref->mod = tic6x_mem_mod_plus; 2379 mem_ref->scaled = tic6x_offset_unscaled; 2380 mem_ref->offset_is_reg = false; 2381 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp); 2382 mem_ref->offset.exp.X_op = O_constant; 2383 mem_ref->offset.exp.X_add_number = 0; 2384 mem_ref->offset.exp.X_unsigned = 0; 2385 break; 2386 2387 case tic6x_mem_mod_plus: 2388 case tic6x_mem_mod_minus: 2389 if (mem_ref->scaled == tic6x_offset_none) 2390 abort (); 2391 break; 2392 2393 case tic6x_mem_mod_preinc: 2394 case tic6x_mem_mod_predec: 2395 case tic6x_mem_mod_postinc: 2396 case tic6x_mem_mod_postdec: 2397 if (mem_ref->scaled != tic6x_offset_none) 2398 break; 2399 mem_ref->scaled = tic6x_offset_scaled; 2400 mem_ref->offset_is_reg = false; 2401 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp); 2402 mem_ref->offset.exp.X_op = O_constant; 2403 mem_ref->offset.exp.X_add_number = 1; 2404 mem_ref->offset.exp.X_unsigned = 0; 2405 break; 2406 2407 default: 2408 abort (); 2409 } 2410} 2411 2412/* Return the encoding in the 8-bit field of an SPMASK or SPMASKR 2413 instruction of the specified UNIT, side SIDE. */ 2414 2415static unsigned int 2416tic6x_encode_spmask (tic6x_func_unit_base unit, unsigned int side) 2417{ 2418 switch (unit) 2419 { 2420 case tic6x_func_unit_l: 2421 return 1 << (side - 1); 2422 2423 case tic6x_func_unit_s: 2424 return 1 << (side + 1); 2425 2426 case tic6x_func_unit_d: 2427 return 1 << (side + 3); 2428 2429 case tic6x_func_unit_m: 2430 return 1 << (side + 5); 2431 2432 default: 2433 abort (); 2434 } 2435} 2436 2437/* Try to encode the instruction with opcode number ID and operands 2438 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z 2439 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and 2440 FUNC_UNIT_DATA_SIDE describe the functional unit specification; 2441 SPLOOP_II is the ii value from the previous SPLOOP-family 2442 instruction, or 0 if not in such a loop; the only possible problems 2443 are operands being out of range (they already match the 2444 fine-grained form), and inappropriate predication. If this 2445 succeeds, return the encoding and set *OK to true; otherwise return 2446 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to 2447 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA. 2448 Print error messages for failure if PRINT_ERRORS is true; the 2449 opcode starts at STR and has length OPC_LEN. */ 2450 2451static unsigned int 2452tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands, 2453 unsigned int num_operands, unsigned int this_line_creg, 2454 unsigned int this_line_z, unsigned int func_unit_side, 2455 unsigned int func_unit_cross, 2456 unsigned int func_unit_data_side, int sploop_ii, 2457 expressionS **fix_exp, int *fix_pcrel, 2458 bfd_reloc_code_real_type *fx_r_type, bool *fix_adda, 2459 bool *fix_needed, bool *ok, 2460 bool print_errors, char *str, int opc_len) 2461{ 2462 const tic6x_opcode *opct; 2463 const tic6x_insn_format *fmt; 2464 unsigned int opcode_value; 2465 unsigned int fld; 2466 2467 opct = &tic6x_opcode_table[id]; 2468 fmt = &tic6x_insn_format_table[opct->format]; 2469 opcode_value = fmt->cst_bits; 2470 2471 for (fld = 0; fld < opct->num_fixed_fields; fld++) 2472 { 2473 if (opct->fixed_fields[fld].min_val == opct->fixed_fields[fld].max_val) 2474 { 2475 const tic6x_insn_field *fldd; 2476 fldd = tic6x_field_from_fmt (fmt, opct->fixed_fields[fld].field_id); 2477 if (fldd == NULL) 2478 abort (); 2479 opcode_value |= opct->fixed_fields[fld].min_val << fldd->bitfields[0].low_pos; 2480 } 2481 } 2482 2483 for (fld = 0; fld < opct->num_variable_fields; fld++) 2484 { 2485 const tic6x_insn_field *fldd; 2486 unsigned int value; 2487 unsigned int opno; 2488 unsigned int ffld; 2489 offsetT sign_value; 2490 unsigned int bits; 2491 unsigned int fcyc_bits; 2492 expressionS *expp; 2493 expressionS ucexp; 2494 tic6x_mem_ref mem; 2495 2496 fldd = tic6x_field_from_fmt (fmt, opct->variable_fields[fld].field_id); 2497 if (fldd == NULL) 2498 abort (); 2499 opno = opct->variable_fields[fld].operand_num; 2500 switch (opct->variable_fields[fld].coding_method) 2501 { 2502 case tic6x_coding_ucst: 2503 if (operands[opno].form != TIC6X_OP_EXP) 2504 abort (); 2505 if (operands[opno].value.exp.X_op != O_constant) 2506 abort (); 2507 ucexp = operands[opno].value.exp; 2508 unsigned_constant: 2509 if (ucexp.X_add_number < 0 2510 || ucexp.X_add_number >= (1 << fldd->bitfields[0].width)) 2511 { 2512 if (print_errors) 2513 as_bad (_("operand %u of '%.*s' out of range"), opno + 1, 2514 opc_len, str); 2515 *ok = false; 2516 return 0; 2517 } 2518 value = ucexp.X_add_number; 2519 break; 2520 2521 case tic6x_coding_scst: 2522 if (operands[opno].form != TIC6X_OP_EXP) 2523 abort (); 2524 if (operands[opno].value.exp.X_op != O_constant) 2525 { 2526 value = 0; 2527 /* Opcode table should not permit non-constants without 2528 a known relocation for them. */ 2529 if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16) 2530 abort (); 2531 *fix_needed = true; 2532 *fix_exp = &operands[opno].value.exp; 2533 *fix_pcrel = 0; 2534 *fx_r_type = BFD_RELOC_C6000_ABS_S16; 2535 *fix_adda = false; 2536 break; 2537 } 2538 sign_value = SEXT (operands[opno].value.exp.X_add_number); 2539 signed_constant: 2540 if (sign_value < -(1 << (fldd->bitfields[0].width - 1)) 2541 || (sign_value >= (1 << (fldd->bitfields[0].width - 1)))) 2542 { 2543 if (print_errors) 2544 as_bad (_("operand %u of '%.*s' out of range"), opno + 1, 2545 opc_len, str); 2546 *ok = false; 2547 return 0; 2548 } 2549 value = sign_value + (1 << (fldd->bitfields[0].width - 1)); 2550 value ^= (1 << (fldd->bitfields[0].width - 1)); 2551 break; 2552 2553 case tic6x_coding_ucst_minus_one: 2554 if (operands[opno].form != TIC6X_OP_EXP) 2555 abort (); 2556 if (operands[opno].value.exp.X_op != O_constant) 2557 abort (); 2558 if (operands[opno].value.exp.X_add_number <= 0 2559 || operands[opno].value.exp.X_add_number > (1 << fldd->bitfields[0].width)) 2560 { 2561 if (print_errors) 2562 as_bad (_("operand %u of '%.*s' out of range"), opno + 1, 2563 opc_len, str); 2564 *ok = false; 2565 return 0; 2566 } 2567 value = operands[opno].value.exp.X_add_number - 1; 2568 break; 2569 2570 case tic6x_coding_scst_negate: 2571 if (operands[opno].form != TIC6X_OP_EXP) 2572 abort (); 2573 if (operands[opno].value.exp.X_op != O_constant) 2574 abort (); 2575 sign_value = SEXT (-operands[opno].value.exp.X_add_number); 2576 goto signed_constant; 2577 2578 case tic6x_coding_ulcst_dpr_byte: 2579 case tic6x_coding_ulcst_dpr_half: 2580 case tic6x_coding_ulcst_dpr_word: 2581 bits = tic6x_dpr_shift (opct->variable_fields[fld].coding_method); 2582 switch (operands[opno].form) 2583 { 2584 case TIC6X_OP_EXP: 2585 if (operands[opno].value.exp.X_op == O_constant) 2586 { 2587 ucexp = operands[opno].value.exp; 2588 goto unsigned_constant; 2589 } 2590 expp = &operands[opno].value.exp; 2591 break; 2592 2593 case TIC6X_OP_MEM_NOUNREG: 2594 mem = operands[opno].value.mem; 2595 tic6x_default_mem_ref (&mem); 2596 if (mem.offset_is_reg) 2597 abort (); 2598 if (mem.offset.exp.X_op == O_constant) 2599 { 2600 ucexp = mem.offset.exp; 2601 if (mem.scaled == tic6x_offset_unscaled) 2602 { 2603 if (ucexp.X_add_number & ((1 << bits) - 1)) 2604 { 2605 if (print_errors) 2606 as_bad (_("offset in operand %u of '%.*s' not " 2607 "divisible by %u"), opno + 1, opc_len, 2608 str, 1u << bits); 2609 *ok = false; 2610 return 0; 2611 } 2612 ucexp.X_add_number >>= bits; 2613 } 2614 goto unsigned_constant; 2615 } 2616 if (mem.scaled != tic6x_offset_unscaled) 2617 abort (); 2618 if (operands[opno].value.mem.mod == tic6x_mem_mod_none 2619 || operands[opno].value.mem.scaled != tic6x_offset_unscaled 2620 || operands[opno].value.mem.offset_is_reg) 2621 abort (); 2622 expp = &operands[opno].value.mem.offset.exp; 2623 break; 2624 2625 default: 2626 abort (); 2627 } 2628 value = 0; 2629 /* Opcode table should not use this encoding without a known 2630 relocation. */ 2631 if (fldd->bitfields[0].low_pos != 8 || fldd->bitfields[0].width != 15) 2632 abort (); 2633 /* We do not check for offset divisibility here; such a 2634 check is not needed at this point to encode the value, 2635 and if there is eventually a problem it will be detected 2636 either in md_apply_fix or at link time. */ 2637 *fix_needed = true; 2638 *fix_exp = expp; 2639 *fix_pcrel = 0; 2640 *fx_r_type 2641 = tic6x_dpr_reloc (opct->variable_fields[fld].coding_method); 2642 if (operands[opno].form == TIC6X_OP_EXP) 2643 *fix_adda = true; 2644 else 2645 *fix_adda = false; 2646 break; 2647 2648 case tic6x_coding_lcst_low16: 2649 if (operands[opno].form != TIC6X_OP_EXP) 2650 abort (); 2651 if (operands[opno].value.exp.X_op == O_constant) 2652 value = operands[opno].value.exp.X_add_number & 0xffff; 2653 else 2654 { 2655 value = 0; 2656 /* Opcode table should not use this encoding without a 2657 known relocation. */ 2658 if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16) 2659 abort (); 2660 *fix_needed = true; 2661 *fix_exp = &operands[opno].value.exp; 2662 *fix_pcrel = 0; 2663 *fx_r_type = BFD_RELOC_C6000_ABS_L16; 2664 *fix_adda = false; 2665 } 2666 break; 2667 2668 case tic6x_coding_lcst_high16: 2669 if (operands[opno].form != TIC6X_OP_EXP) 2670 abort (); 2671 if (operands[opno].value.exp.X_op == O_constant) 2672 value = (operands[opno].value.exp.X_add_number >> 16) & 0xffff; 2673 else 2674 { 2675 value = 0; 2676 /* Opcode table should not use this encoding without a 2677 known relocation. */ 2678 if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16) 2679 abort (); 2680 *fix_needed = true; 2681 *fix_exp = &operands[opno].value.exp; 2682 *fix_pcrel = 0; 2683 *fx_r_type = BFD_RELOC_C6000_ABS_H16; 2684 *fix_adda = false; 2685 } 2686 break; 2687 2688 case tic6x_coding_pcrel: 2689 case tic6x_coding_pcrel_half: 2690 if (operands[opno].form != TIC6X_OP_EXP) 2691 abort (); 2692 value = 0; 2693 *fix_needed = true; 2694 *fix_exp = &operands[opno].value.exp; 2695 *fix_pcrel = 1; 2696 if (fldd->bitfields[0].low_pos == 7 && fldd->bitfields[0].width == 21) 2697 *fx_r_type = BFD_RELOC_C6000_PCR_S21; 2698 else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 12) 2699 *fx_r_type = BFD_RELOC_C6000_PCR_S12; 2700 else if (fldd->bitfields[0].low_pos == 13 && fldd->bitfields[0].width == 10) 2701 *fx_r_type = BFD_RELOC_C6000_PCR_S10; 2702 else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 7) 2703 *fx_r_type = BFD_RELOC_C6000_PCR_S7; 2704 else 2705 /* Opcode table should not use this encoding without a 2706 known relocation. */ 2707 abort (); 2708 *fix_adda = false; 2709 break; 2710 2711 case tic6x_coding_regpair_lsb: 2712 switch (operands[opno].form) 2713 { 2714 case TIC6X_OP_REGPAIR: 2715 value = operands[opno].value.reg.num; 2716 break; 2717 2718 default: 2719 abort (); 2720 } 2721 break; 2722 2723 case tic6x_coding_regpair_msb: 2724 switch (operands[opno].form) 2725 { 2726 case TIC6X_OP_REGPAIR: 2727 value = operands[opno].value.reg.num + 1; 2728 break; 2729 2730 default: 2731 abort (); 2732 } 2733 break; 2734 2735 case tic6x_coding_reg: 2736 switch (operands[opno].form) 2737 { 2738 case TIC6X_OP_REG: 2739 case TIC6X_OP_REGPAIR: 2740 value = operands[opno].value.reg.num; 2741 break; 2742 2743 case TIC6X_OP_MEM_NOUNREG: 2744 case TIC6X_OP_MEM_UNREG: 2745 value = operands[opno].value.mem.base_reg.num; 2746 break; 2747 2748 default: 2749 abort (); 2750 } 2751 break; 2752 2753 case tic6x_coding_areg: 2754 switch (operands[opno].form) 2755 { 2756 case TIC6X_OP_REG: 2757 value = (operands[opno].value.reg.num == 15 ? 1 : 0); 2758 break; 2759 2760 case TIC6X_OP_MEM_NOUNREG: 2761 value = (operands[opno].value.mem.base_reg.num == 15 ? 1 : 0); 2762 break; 2763 2764 default: 2765 abort (); 2766 } 2767 break; 2768 2769 case tic6x_coding_crlo: 2770 if (operands[opno].form != TIC6X_OP_CTRL) 2771 abort (); 2772 value = tic6x_ctrl_table[operands[opno].value.ctrl].crlo; 2773 break; 2774 2775 case tic6x_coding_crhi: 2776 if (operands[opno].form != TIC6X_OP_CTRL) 2777 abort (); 2778 value = 0; 2779 break; 2780 2781 case tic6x_coding_reg_shift: 2782 if (operands[opno].form != TIC6X_OP_REGPAIR) 2783 abort (); 2784 value = operands[opno].value.reg.num >> 1; 2785 break; 2786 2787 case tic6x_coding_mem_offset: 2788 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG) 2789 abort (); 2790 mem = operands[opno].value.mem; 2791 tic6x_default_mem_ref (&mem); 2792 if (mem.offset_is_reg) 2793 { 2794 if (mem.scaled != tic6x_offset_scaled) 2795 abort (); 2796 value = mem.offset.reg.num; 2797 } 2798 else 2799 { 2800 int scale; 2801 2802 if (mem.offset.exp.X_op != O_constant) 2803 abort (); 2804 switch (mem.scaled) 2805 { 2806 case tic6x_offset_scaled: 2807 scale = 1; 2808 break; 2809 2810 case tic6x_offset_unscaled: 2811 scale = opct->operand_info[opno].size; 2812 if (scale != 1 && scale != 2 && scale != 4 && scale != 8) 2813 abort (); 2814 break; 2815 2816 default: 2817 abort (); 2818 } 2819 if (mem.offset.exp.X_add_number < 0 2820 || mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width) * scale) 2821 { 2822 if (print_errors) 2823 as_bad (_("offset in operand %u of '%.*s' out of range"), 2824 opno + 1, opc_len, str); 2825 *ok = false; 2826 return 0; 2827 } 2828 if (mem.offset.exp.X_add_number % scale) 2829 { 2830 if (print_errors) 2831 as_bad (_("offset in operand %u of '%.*s' not " 2832 "divisible by %u"), 2833 opno + 1, opc_len, str, scale); 2834 *ok = false; 2835 return 0; 2836 } 2837 value = mem.offset.exp.X_add_number / scale; 2838 } 2839 break; 2840 2841 case tic6x_coding_mem_offset_noscale: 2842 if (operands[opno].form != TIC6X_OP_MEM_UNREG) 2843 abort (); 2844 mem = operands[opno].value.mem; 2845 tic6x_default_mem_ref (&mem); 2846 if (mem.offset_is_reg) 2847 value = mem.offset.reg.num; 2848 else 2849 { 2850 if (mem.offset.exp.X_op != O_constant) 2851 abort (); 2852 if (mem.offset.exp.X_add_number < 0 2853 || mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width)) 2854 { 2855 if (print_errors) 2856 as_bad (_("offset in operand %u of '%.*s' out of range"), 2857 opno + 1, opc_len, str); 2858 *ok = false; 2859 return 0; 2860 } 2861 value = mem.offset.exp.X_add_number; 2862 } 2863 break; 2864 2865 case tic6x_coding_mem_mode: 2866 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG 2867 && operands[opno].form != TIC6X_OP_MEM_UNREG) 2868 abort (); 2869 mem = operands[opno].value.mem; 2870 tic6x_default_mem_ref (&mem); 2871 switch (mem.mod) 2872 { 2873 case tic6x_mem_mod_plus: 2874 value = 1; 2875 break; 2876 2877 case tic6x_mem_mod_minus: 2878 value = 0; 2879 break; 2880 2881 case tic6x_mem_mod_preinc: 2882 value = 9; 2883 break; 2884 2885 case tic6x_mem_mod_predec: 2886 value = 8; 2887 break; 2888 2889 case tic6x_mem_mod_postinc: 2890 value = 11; 2891 break; 2892 2893 case tic6x_mem_mod_postdec: 2894 value = 10; 2895 break; 2896 2897 default: 2898 abort (); 2899 } 2900 value += (mem.offset_is_reg ? 4 : 0); 2901 break; 2902 2903 case tic6x_coding_scaled: 2904 if (operands[opno].form != TIC6X_OP_MEM_UNREG) 2905 abort (); 2906 mem = operands[opno].value.mem; 2907 tic6x_default_mem_ref (&mem); 2908 switch (mem.scaled) 2909 { 2910 case tic6x_offset_unscaled: 2911 value = 0; 2912 break; 2913 2914 case tic6x_offset_scaled: 2915 value = 1; 2916 break; 2917 2918 default: 2919 abort (); 2920 } 2921 break; 2922 2923 case tic6x_coding_spmask: 2924 /* The position of such a field is hardcoded in the handling 2925 of "||^". */ 2926 if (fldd->bitfields[0].low_pos != 18) 2927 abort (); 2928 value = 0; 2929 for (opno = 0; opno < num_operands; opno++) 2930 { 2931 unsigned int v; 2932 2933 v = tic6x_encode_spmask (operands[opno].value.func_unit.base, 2934 operands[opno].value.func_unit.side); 2935 if (value & v) 2936 { 2937 if (print_errors) 2938 as_bad (_("functional unit already masked for operand " 2939 "%u of '%.*s'"), opno + 1, opc_len, str); 2940 *ok = false; 2941 return 0; 2942 } 2943 value |= v; 2944 } 2945 break; 2946 2947 case tic6x_coding_reg_unused: 2948 /* This is a placeholder; correct handling goes along with 2949 resource constraint checks. */ 2950 value = 0; 2951 break; 2952 2953 case tic6x_coding_fstg: 2954 case tic6x_coding_fcyc: 2955 if (operands[opno].form != TIC6X_OP_EXP) 2956 abort (); 2957 if (operands[opno].value.exp.X_op != O_constant) 2958 abort (); 2959 if (!sploop_ii) 2960 { 2961 if (print_errors) 2962 as_bad (_("'%.*s' instruction not in a software " 2963 "pipelined loop"), 2964 opc_len, str); 2965 *ok = false; 2966 return 0; 2967 } 2968 2969 if (sploop_ii <= 1) 2970 fcyc_bits = 0; 2971 else if (sploop_ii <= 2) 2972 fcyc_bits = 1; 2973 else if (sploop_ii <= 4) 2974 fcyc_bits = 2; 2975 else if (sploop_ii <= 8) 2976 fcyc_bits = 3; 2977 else if (sploop_ii <= 14) 2978 fcyc_bits = 4; 2979 else 2980 abort (); 2981 if (fcyc_bits > fldd->bitfields[0].width) 2982 abort (); 2983 2984 if (opct->variable_fields[fld].coding_method == tic6x_coding_fstg) 2985 { 2986 int i, t; 2987 if (operands[opno].value.exp.X_add_number < 0 2988 || (operands[opno].value.exp.X_add_number 2989 >= (1 << (fldd->bitfields[0].width - fcyc_bits)))) 2990 { 2991 if (print_errors) 2992 as_bad (_("operand %u of '%.*s' out of range"), opno + 1, 2993 opc_len, str); 2994 *ok = false; 2995 return 0; 2996 } 2997 value = operands[opno].value.exp.X_add_number; 2998 for (t = 0, i = fcyc_bits; i < fldd->bitfields[0].width; i++) 2999 { 3000 t = (t << 1) | (value & 1); 3001 value >>= 1; 3002 } 3003 value = t << fcyc_bits; 3004 } 3005 else 3006 { 3007 if (operands[opno].value.exp.X_add_number < 0 3008 || (operands[opno].value.exp.X_add_number >= sploop_ii)) 3009 { 3010 if (print_errors) 3011 as_bad (_("operand %u of '%.*s' out of range"), opno + 1, 3012 opc_len, str); 3013 *ok = false; 3014 return 0; 3015 } 3016 value = operands[opno].value.exp.X_add_number; 3017 } 3018 break; 3019 3020 case tic6x_coding_fu: 3021 value = func_unit_side == 2 ? 1 : 0; 3022 break; 3023 3024 case tic6x_coding_data_fu: 3025 value = func_unit_data_side == 2 ? 1 : 0; 3026 break; 3027 3028 case tic6x_coding_xpath: 3029 value = func_unit_cross; 3030 break; 3031 3032 default: 3033 abort (); 3034 } 3035 3036 for (ffld = 0; ffld < opct->num_fixed_fields; ffld++) 3037 if ((opct->fixed_fields[ffld].field_id 3038 == opct->variable_fields[fld].field_id) 3039 && (value < opct->fixed_fields[ffld].min_val 3040 || value > opct->fixed_fields[ffld].max_val)) 3041 { 3042 if (print_errors) 3043 as_bad (_("operand %u of '%.*s' out of range"), opno + 1, 3044 opc_len, str); 3045 *ok = false; 3046 return 0; 3047 } 3048 3049 opcode_value |= value << fldd->bitfields[0].low_pos; 3050 } 3051 3052 if (this_line_creg) 3053 { 3054 const tic6x_insn_field *creg; 3055 const tic6x_insn_field *z; 3056 3057 creg = tic6x_field_from_fmt (fmt, tic6x_field_creg); 3058 if (creg == NULL) 3059 { 3060 if (print_errors) 3061 as_bad (_("instruction '%.*s' cannot be predicated"), 3062 opc_len, str); 3063 *ok = false; 3064 return 0; 3065 } 3066 z = tic6x_field_from_fmt (fmt, tic6x_field_z); 3067 /* If there is a creg field, there must be a z field; otherwise 3068 there is an error in the format table. */ 3069 if (z == NULL) 3070 abort (); 3071 3072 opcode_value |= this_line_creg << creg->bitfields[0].low_pos; 3073 opcode_value |= this_line_z << z->bitfields[0].low_pos; 3074 } 3075 3076 *ok = true; 3077 return opcode_value; 3078} 3079 3080/* Convert the target integer stored in N bytes in BUF to a host 3081 integer, returning that value. */ 3082 3083static valueT 3084md_chars_to_number (char *buf, int n) 3085{ 3086 valueT result = 0; 3087 unsigned char *p = (unsigned char *) buf; 3088 3089 if (target_big_endian) 3090 { 3091 while (n--) 3092 { 3093 result <<= 8; 3094 result |= (*p++ & 0xff); 3095 } 3096 } 3097 else 3098 { 3099 while (n--) 3100 { 3101 result <<= 8; 3102 result |= (p[n] & 0xff); 3103 } 3104 } 3105 3106 return result; 3107} 3108 3109/* Assemble the instruction starting at STR (an opcode, with the 3110 opcode name all-lowercase). */ 3111 3112void 3113md_assemble (char *str) 3114{ 3115 char *p; 3116 int opc_len; 3117 bool this_line_parallel; 3118 bool this_line_spmask; 3119 unsigned int this_line_creg; 3120 unsigned int this_line_z; 3121 tic6x_label_list *this_insn_label_list; 3122 segment_info_type *seginfo; 3123 tic6x_opcode_list *opc_list, *opc; 3124 tic6x_func_unit_base func_unit_base = tic6x_func_unit_nfu; 3125 unsigned int func_unit_side = 0; 3126 unsigned int func_unit_cross = 0; 3127 unsigned int cross_side = 0; 3128 unsigned int func_unit_data_side = 0; 3129 unsigned int max_matching_opcodes, num_matching_opcodes; 3130 tic6x_opcode_id *opcm = NULL; 3131 unsigned int opc_rank[TIC6X_NUM_PREFER]; 3132 const tic6x_opcode *opct = NULL; 3133 int min_rank, try_rank, max_rank; 3134 bool num_operands_permitted[TIC6X_MAX_SOURCE_OPERANDS + 1] = { false }; 3135 unsigned int operand_forms[TIC6X_MAX_SOURCE_OPERANDS] = { 0 }; 3136 tic6x_operand operands[TIC6X_MAX_SOURCE_OPERANDS]; 3137 unsigned int max_num_operands; 3138 unsigned int num_operands_read; 3139 bool ok_this_arch, ok_this_fu, ok_this_arch_fu; 3140 bool bad_operands = false; 3141 unsigned int opcode_value; 3142 bool encoded_ok; 3143 bool fix_needed = false; 3144 expressionS *fix_exp = NULL; 3145 int fix_pcrel = 0; 3146 bfd_reloc_code_real_type fx_r_type = BFD_RELOC_UNUSED; 3147 bool fix_adda = false; 3148 fragS *insn_frag; 3149 char *output; 3150 3151 p = str; 3152 while (*p && !is_end_of_line[(unsigned char) *p] && *p != ' ') 3153 p++; 3154 3155 /* This function should only have been called when there is actually 3156 an instruction to assemble. */ 3157 if (p == str) 3158 abort (); 3159 3160 /* Now an instruction has been seen, architecture attributes from 3161 .arch directives merge with rather than overriding the previous 3162 value. */ 3163 tic6x_seen_insns = true; 3164 /* If no .arch directives or -march options have been seen, we are 3165 assessing instruction validity based on the C674X default, so set 3166 the attribute accordingly. */ 3167 if (tic6x_arch_attribute == C6XABI_Tag_ISA_none) 3168 tic6x_arch_attribute = C6XABI_Tag_ISA_C674X; 3169 3170 /* Reset global settings for parallel bars and predicates now to 3171 avoid extra errors if there are problems with this opcode. */ 3172 this_line_parallel = tic6x_line_parallel; 3173 this_line_spmask = tic6x_line_spmask; 3174 this_line_creg = tic6x_line_creg; 3175 this_line_z = tic6x_line_z; 3176 tic6x_line_parallel = false; 3177 tic6x_line_spmask = false; 3178 tic6x_line_creg = 0; 3179 tic6x_line_z = 0; 3180 seginfo = seg_info (now_seg); 3181 this_insn_label_list = seginfo->tc_segment_info_data.label_list; 3182 seginfo->tc_segment_info_data.label_list = NULL; 3183 3184 opc_list = str_hash_find_n (opcode_hash, str, p - str); 3185 if (opc_list == NULL) 3186 { 3187 char c = *p; 3188 *p = 0; 3189 as_bad (_("unknown opcode '%s'"), str); 3190 *p = c; 3191 return; 3192 } 3193 3194 opc_len = p - str; 3195 skip_whitespace (p); 3196 3197 /* See if there is something that looks like a functional unit 3198 specifier. */ 3199 if (*p == '.') 3200 { 3201 bool good_func_unit; 3202 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu; 3203 unsigned int maybe_side = 0; 3204 unsigned int maybe_cross = 0; 3205 unsigned int maybe_data_side = 0; 3206 3207 good_func_unit = tic6x_parse_func_unit_base (p + 1, &maybe_base, 3208 &maybe_side); 3209 3210 if (good_func_unit) 3211 { 3212 if (p[3] == ' ' || is_end_of_line[(unsigned char) p[3]]) 3213 p += 3; 3214 else if ((p[3] == 'x' || p[3] == 'X') 3215 && (p[4] == ' ' || is_end_of_line[(unsigned char) p[4]])) 3216 { 3217 maybe_cross = 1; 3218 p += 4; 3219 } 3220 else if (maybe_base == tic6x_func_unit_d 3221 && (p[3] == 't' || p[3] == 'T') 3222 && (p[4] == '1' || p[4] == '2') 3223 && (p[5] == ' ' || is_end_of_line[(unsigned char) p[5]])) 3224 { 3225 maybe_data_side = p[4] - '0'; 3226 p += 5; 3227 } 3228 else 3229 good_func_unit = false; 3230 } 3231 3232 if (good_func_unit) 3233 { 3234 func_unit_base = maybe_base; 3235 func_unit_side = maybe_side; 3236 func_unit_cross = maybe_cross; 3237 cross_side = (func_unit_cross ? 3 - func_unit_side : func_unit_side); 3238 func_unit_data_side = maybe_data_side; 3239 } 3240 3241 skip_whitespace (p); 3242 } 3243 3244 /* Determine which entries in the opcode table match, and the 3245 associated permitted forms of operands. */ 3246 max_matching_opcodes = 0; 3247 for (opc = opc_list; opc; opc = opc->next) 3248 max_matching_opcodes++; 3249 num_matching_opcodes = 0; 3250 opcm = XNEWVEC (tic6x_opcode_id, max_matching_opcodes); 3251 max_num_operands = 0; 3252 ok_this_arch = false; 3253 ok_this_fu = false; 3254 ok_this_arch_fu = false; 3255 for (opc = opc_list; opc; opc = opc->next) 3256 { 3257 unsigned int num_operands; 3258 unsigned int i; 3259 bool this_opc_arch_ok = true; 3260 bool this_opc_fu_ok = true; 3261 3262 if (tic6x_insn_format_table[tic6x_opcode_table[opc->id].format].num_bits 3263 != 32) 3264 continue; 3265 if (!(tic6x_opcode_table[opc->id].isa_variants & tic6x_features)) 3266 this_opc_arch_ok = false; 3267 if (tic6x_opcode_table[opc->id].func_unit != func_unit_base) 3268 this_opc_fu_ok = false; 3269 if (func_unit_side == 1 3270 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_B_ONLY)) 3271 this_opc_fu_ok = false; 3272 if (func_unit_cross 3273 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_NO_CROSS)) 3274 this_opc_fu_ok = false; 3275 if (!func_unit_data_side 3276 && (tic6x_opcode_table[opc->id].flags 3277 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE))) 3278 this_opc_fu_ok = false; 3279 if (func_unit_data_side 3280 && !(tic6x_opcode_table[opc->id].flags 3281 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE))) 3282 this_opc_fu_ok = false; 3283 if (func_unit_data_side == 1 3284 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_T2_ONLY)) 3285 this_opc_fu_ok = false; 3286 if (this_opc_arch_ok) 3287 ok_this_arch = true; 3288 if (this_opc_fu_ok) 3289 ok_this_fu = true; 3290 if (!this_opc_arch_ok || !this_opc_fu_ok) 3291 continue; 3292 ok_this_arch_fu = true; 3293 opcm[num_matching_opcodes] = opc->id; 3294 num_matching_opcodes++; 3295 num_operands = tic6x_opcode_table[opc->id].num_operands; 3296 3297 if (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SPMASK) 3298 { 3299 if (num_operands != 1 3300 || (tic6x_opcode_table[opc->id].operand_info[0].form 3301 != tic6x_operand_func_unit)) 3302 abort (); 3303 num_operands = 8; 3304 for (i = 0; i < num_operands; i++) 3305 { 3306 operand_forms[i] 3307 |= tic6x_coarse_operand_form (tic6x_operand_func_unit); 3308 num_operands_permitted[i] = true; 3309 } 3310 } 3311 else 3312 { 3313 for (i = 0; i < num_operands; i++) 3314 { 3315 tic6x_operand_form f 3316 = tic6x_opcode_table[opc->id].operand_info[i].form; 3317 3318 operand_forms[i] |= tic6x_coarse_operand_form (f); 3319 } 3320 } 3321 num_operands_permitted[num_operands] = true; 3322 if (num_operands > max_num_operands) 3323 max_num_operands = num_operands; 3324 } 3325 3326 if (!ok_this_arch) 3327 { 3328 as_bad (_("'%.*s' instruction not supported on this architecture"), 3329 opc_len, str); 3330 free (opcm); 3331 return; 3332 } 3333 3334 if (!ok_this_fu) 3335 { 3336 as_bad (_("'%.*s' instruction not supported on this functional unit"), 3337 opc_len, str); 3338 free (opcm); 3339 return; 3340 } 3341 3342 if (!ok_this_arch_fu) 3343 { 3344 as_bad (_("'%.*s' instruction not supported on this functional unit" 3345 " for this architecture"), 3346 opc_len, str); 3347 free (opcm); 3348 return; 3349 } 3350 3351 /* If there were no instructions matching the above availability 3352 checks, we should now have given an error and returned. */ 3353 if (num_matching_opcodes == 0) 3354 abort (); 3355 3356 num_operands_read = 0; 3357 while (true) 3358 { 3359 skip_whitespace (p); 3360 if (is_end_of_line[(unsigned char) *p]) 3361 { 3362 if (num_operands_read > 0) 3363 { 3364 as_bad (_("missing operand after comma")); 3365 bad_operands = true; 3366 } 3367 break; 3368 } 3369 3370 if (max_num_operands == 0) 3371 { 3372 as_bad (_("too many operands to '%.*s'"), opc_len, str); 3373 bad_operands = true; 3374 break; 3375 } 3376 3377 if (!tic6x_parse_operand (&p, &operands[num_operands_read], 3378 operand_forms[num_operands_read], str, opc_len, 3379 num_operands_read + 1)) 3380 bad_operands = true; 3381 num_operands_read++; 3382 3383 if (is_end_of_line[(unsigned char) *p]) 3384 break; 3385 else if (*p == ',') 3386 { 3387 p++; 3388 if (num_operands_read == max_num_operands) 3389 { 3390 as_bad (_("too many operands to '%.*s'"), opc_len, str); 3391 bad_operands = true; 3392 break; 3393 } 3394 continue; 3395 } 3396 else 3397 /* Operand parsing should consume whole operands. */ 3398 abort (); 3399 } 3400 3401 if (!bad_operands && !num_operands_permitted[num_operands_read]) 3402 { 3403 as_bad (_("bad number of operands to '%.*s'"), opc_len, str); 3404 bad_operands = true; 3405 } 3406 3407 if (!bad_operands) 3408 { 3409 /* Each operand is of the right syntactic form for some opcode 3410 choice, and the number of operands is valid. Check that each 3411 operand is OK in detail for some opcode choice with the right 3412 number of operands. */ 3413 unsigned int i; 3414 3415 for (i = 0; i < num_operands_read; i++) 3416 { 3417 bool coarse_ok = false; 3418 bool fine_ok = false; 3419 tic6x_operand_match fine_failure = tic6x_match_matches; 3420 unsigned int j; 3421 3422 for (j = 0; j < num_matching_opcodes; j++) 3423 { 3424 tic6x_operand_form f; 3425 tic6x_rw rw; 3426 unsigned int cf; 3427 tic6x_operand_match this_fine_failure; 3428 3429 if (tic6x_opcode_table[opcm[j]].flags & TIC6X_FLAG_SPMASK) 3430 { 3431 f = tic6x_operand_func_unit; 3432 rw = tic6x_rw_none; 3433 } 3434 else 3435 { 3436 if (tic6x_opcode_table[opcm[j]].num_operands 3437 != num_operands_read) 3438 continue; 3439 3440 f = tic6x_opcode_table[opcm[j]].operand_info[i].form; 3441 rw = tic6x_opcode_table[opcm[j]].operand_info[i].rw; 3442 } 3443 cf = tic6x_coarse_operand_form (f); 3444 3445 if (operands[i].form != cf) 3446 continue; 3447 3448 coarse_ok = true; 3449 this_fine_failure 3450 = tic6x_operand_matches_form (&operands[i], f, rw, 3451 func_unit_side, 3452 cross_side, 3453 func_unit_data_side); 3454 if (this_fine_failure == tic6x_match_matches) 3455 { 3456 fine_ok = true; 3457 break; 3458 } 3459 if (fine_failure == tic6x_match_matches 3460 || fine_failure > this_fine_failure) 3461 fine_failure = this_fine_failure; 3462 } 3463 3464 /* No instructions should have operand syntactic forms only 3465 acceptable with certain numbers of operands, so no 3466 diagnostic for this case. */ 3467 if (!coarse_ok) 3468 abort (); 3469 3470 if (!fine_ok) 3471 { 3472 switch (fine_failure) 3473 { 3474 case tic6x_match_non_const: 3475 as_bad (_("operand %u of '%.*s' not constant"), 3476 i + 1, opc_len, str); 3477 break; 3478 3479 case tic6x_match_wrong_side: 3480 as_bad (_("operand %u of '%.*s' on wrong side"), 3481 i + 1, opc_len, str); 3482 break; 3483 3484 case tic6x_match_bad_return: 3485 as_bad (_("operand %u of '%.*s' not a valid return " 3486 "address register"), 3487 i + 1, opc_len, str); 3488 break; 3489 3490 case tic6x_match_ctrl_write_only: 3491 as_bad (_("operand %u of '%.*s' is write-only"), 3492 i + 1, opc_len, str); 3493 break; 3494 3495 case tic6x_match_ctrl_read_only: 3496 as_bad (_("operand %u of '%.*s' is read-only"), 3497 i + 1, opc_len, str); 3498 break; 3499 3500 case tic6x_match_bad_mem: 3501 as_bad (_("operand %u of '%.*s' not a valid memory " 3502 "reference"), 3503 i + 1, opc_len, str); 3504 break; 3505 3506 case tic6x_match_bad_address: 3507 as_bad (_("operand %u of '%.*s' not a valid base " 3508 "address register"), 3509 i + 1, opc_len, str); 3510 break; 3511 3512 default: 3513 abort (); 3514 } 3515 bad_operands = true; 3516 break; 3517 } 3518 } 3519 } 3520 3521 if (!bad_operands) 3522 { 3523 /* Each operand is OK for some opcode choice, and the number of 3524 operands is valid. Check whether there is an opcode choice 3525 for which all operands are simultaneously valid. */ 3526 unsigned int i; 3527 bool found_match = false; 3528 3529 for (i = 0; i < TIC6X_NUM_PREFER; i++) 3530 opc_rank[i] = (unsigned int) -1; 3531 3532 min_rank = TIC6X_NUM_PREFER - 1; 3533 max_rank = 0; 3534 3535 for (i = 0; i < num_matching_opcodes; i++) 3536 { 3537 unsigned int j; 3538 bool this_matches = true; 3539 3540 if (!(tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK) 3541 && tic6x_opcode_table[opcm[i]].num_operands != num_operands_read) 3542 continue; 3543 3544 for (j = 0; j < num_operands_read; j++) 3545 { 3546 tic6x_operand_form f; 3547 tic6x_rw rw; 3548 3549 if (tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK) 3550 { 3551 f = tic6x_operand_func_unit; 3552 rw = tic6x_rw_none; 3553 } 3554 else 3555 { 3556 f = tic6x_opcode_table[opcm[i]].operand_info[j].form; 3557 rw = tic6x_opcode_table[opcm[i]].operand_info[j].rw; 3558 } 3559 if (tic6x_operand_matches_form (&operands[j], f, rw, 3560 func_unit_side, 3561 cross_side, 3562 func_unit_data_side) 3563 != tic6x_match_matches) 3564 { 3565 this_matches = false; 3566 break; 3567 } 3568 } 3569 3570 if (this_matches) 3571 { 3572 int rank = TIC6X_PREFER_VAL (tic6x_opcode_table[opcm[i]].flags); 3573 3574 if (rank < min_rank) 3575 min_rank = rank; 3576 if (rank > max_rank) 3577 max_rank = rank; 3578 3579 if (opc_rank[rank] == (unsigned int) -1) 3580 opc_rank[rank] = i; 3581 else 3582 /* The opcode table should provide a total ordering 3583 for all cases where multiple matches may get 3584 here. */ 3585 abort (); 3586 3587 found_match = true; 3588 } 3589 } 3590 3591 if (!found_match) 3592 { 3593 as_bad (_("bad operand combination for '%.*s'"), opc_len, str); 3594 bad_operands = true; 3595 } 3596 } 3597 3598 if (bad_operands) 3599 { 3600 free (opcm); 3601 return; 3602 } 3603 3604 opcode_value = 0; 3605 encoded_ok = false; 3606 for (try_rank = max_rank; try_rank >= min_rank; try_rank--) 3607 { 3608 fix_needed = false; 3609 3610 if (opc_rank[try_rank] == (unsigned int) -1) 3611 continue; 3612 3613 opcode_value = tic6x_try_encode (opcm[opc_rank[try_rank]], operands, 3614 num_operands_read, this_line_creg, 3615 this_line_z, func_unit_side, 3616 func_unit_cross, func_unit_data_side, 3617 seginfo->tc_segment_info_data.sploop_ii, 3618 &fix_exp, &fix_pcrel, &fx_r_type, 3619 &fix_adda, &fix_needed, &encoded_ok, 3620 try_rank == min_rank, 3621 str, opc_len); 3622 if (encoded_ok) 3623 { 3624 opct = &tic6x_opcode_table[opcm[opc_rank[try_rank]]]; 3625 break; 3626 } 3627 } 3628 3629 free (opcm); 3630 3631 if (!encoded_ok) 3632 return; 3633 3634 if (this_line_parallel) 3635 { 3636 insn_frag = seginfo->tc_segment_info_data.execute_packet_frag; 3637 if (insn_frag == NULL) 3638 { 3639 as_bad (_("parallel instruction not following another instruction")); 3640 return; 3641 } 3642 3643 if (insn_frag->fr_fix >= 32) 3644 { 3645 as_bad (_("too many instructions in execute packet")); 3646 return; 3647 } 3648 3649 if (this_insn_label_list != NULL) 3650 as_bad (_("label not at start of execute packet")); 3651 3652 if (opct->flags & TIC6X_FLAG_FIRST) 3653 as_bad (_("'%.*s' instruction not at start of execute packet"), 3654 opc_len, str); 3655 3656 *seginfo->tc_segment_info_data.last_insn_lsb |= 0x1; 3657 output = insn_frag->fr_literal + insn_frag->fr_fix; 3658 } 3659 else 3660 { 3661 tic6x_label_list *l; 3662 3663 seginfo->tc_segment_info_data.spmask_addr = NULL; 3664 seginfo->tc_segment_info_data.func_units_used = 0; 3665 3666 /* Start a new frag for this execute packet. */ 3667 if (frag_now_fix () != 0) 3668 { 3669 if (frag_now->fr_type != rs_machine_dependent) 3670 frag_wane (frag_now); 3671 3672 frag_new (0); 3673 } 3674 frag_grow (32); 3675 insn_frag = seginfo->tc_segment_info_data.execute_packet_frag = frag_now; 3676 for (l = this_insn_label_list; l; l = l->next) 3677 { 3678 symbol_set_frag (l->label, frag_now); 3679 S_SET_VALUE (l->label, 0); 3680 S_SET_SEGMENT (l->label, now_seg); 3681 } 3682 tic6x_free_label_list (this_insn_label_list); 3683 dwarf2_emit_insn (0); 3684 output = frag_var (rs_machine_dependent, 32, 32, 0, NULL, 0, NULL); 3685 /* This must be the same as the frag to which a pointer was just 3686 saved. */ 3687 if (output != insn_frag->fr_literal) 3688 abort (); 3689 insn_frag->tc_frag_data.is_insns = true; 3690 insn_frag->tc_frag_data.can_cross_fp_boundary 3691 = tic6x_can_cross_fp_boundary; 3692 } 3693 3694 if (func_unit_base != tic6x_func_unit_nfu) 3695 { 3696 unsigned int func_unit_enc; 3697 3698 func_unit_enc = tic6x_encode_spmask (func_unit_base, func_unit_side); 3699 3700 if (seginfo->tc_segment_info_data.func_units_used & func_unit_enc) 3701 as_bad (_("functional unit already used in this execute packet")); 3702 3703 seginfo->tc_segment_info_data.func_units_used |= func_unit_enc; 3704 } 3705 3706 if (opct->flags & TIC6X_FLAG_SPLOOP) 3707 { 3708 if (seginfo->tc_segment_info_data.sploop_ii) 3709 as_bad (_("nested software pipelined loop")); 3710 if (num_operands_read != 1 3711 || operands[0].form != TIC6X_OP_EXP 3712 || operands[0].value.exp.X_op != O_constant) 3713 abort (); 3714 seginfo->tc_segment_info_data.sploop_ii 3715 = operands[0].value.exp.X_add_number; 3716 } 3717 else if (opct->flags & TIC6X_FLAG_SPKERNEL) 3718 { 3719 if (!seginfo->tc_segment_info_data.sploop_ii) 3720 as_bad (_("'%.*s' instruction not in a software pipelined loop"), 3721 opc_len, str); 3722 seginfo->tc_segment_info_data.sploop_ii = 0; 3723 } 3724 3725 if (this_line_spmask) 3726 { 3727 if (seginfo->tc_segment_info_data.spmask_addr == NULL) 3728 as_bad (_("'||^' without previous SPMASK")); 3729 else if (func_unit_base == tic6x_func_unit_nfu) 3730 as_bad (_("cannot mask instruction using no functional unit")); 3731 else 3732 { 3733 unsigned int spmask_opcode; 3734 unsigned int mask_bit; 3735 3736 spmask_opcode 3737 = md_chars_to_number (seginfo->tc_segment_info_data.spmask_addr, 3738 4); 3739 mask_bit = tic6x_encode_spmask (func_unit_base, func_unit_side); 3740 mask_bit <<= 18; 3741 if (spmask_opcode & mask_bit) 3742 as_bad (_("functional unit already masked")); 3743 spmask_opcode |= mask_bit; 3744 md_number_to_chars (seginfo->tc_segment_info_data.spmask_addr, 3745 spmask_opcode, 4); 3746 } 3747 } 3748 3749 record_alignment (now_seg, 5); 3750 md_number_to_chars (output, opcode_value, 4); 3751 if (fix_needed) 3752 tic6x_fix_new_exp (insn_frag, output - insn_frag->fr_literal, 4, fix_exp, 3753 fix_pcrel, fx_r_type, fix_adda); 3754 insn_frag->fr_fix += 4; 3755 insn_frag->fr_var -= 4; 3756 seginfo->tc_segment_info_data.last_insn_lsb 3757 = (target_big_endian ? output + 3 : output); 3758 if (opct->flags & TIC6X_FLAG_SPMASK) 3759 seginfo->tc_segment_info_data.spmask_addr = output; 3760} 3761 3762/* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT 3763 and the least significant BITS bits taken, at position POS. */ 3764#define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \ 3765 do { \ 3766 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \ 3767 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \ 3768 } while (0) 3769 3770/* Apply a fixup to the object file. */ 3771 3772void 3773md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3774{ 3775 valueT value = *valP; 3776 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3777 3778 value = SEXT (value); 3779 *valP = value; 3780 3781 fixP->fx_offset = SEXT (fixP->fx_offset); 3782 3783 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 3784 fixP->fx_done = 1; 3785 3786 /* We do our own overflow checks. */ 3787 fixP->fx_no_overflow = 1; 3788 3789 switch (fixP->fx_r_type) 3790 { 3791 case BFD_RELOC_NONE: 3792 case BFD_RELOC_C6000_EHTYPE: 3793 /* Force output to the object file. */ 3794 fixP->fx_done = 0; 3795 break; 3796 3797 case BFD_RELOC_32: 3798 if (fixP->fx_done || !seg->use_rela_p) 3799 md_number_to_chars (buf, value, 4); 3800 break; 3801 3802 case BFD_RELOC_16: 3803 if (fixP->fx_done || !seg->use_rela_p) 3804 { 3805 if (value + 0x8000 > 0xffff + 0x8000) 3806 as_bad_where (fixP->fx_file, fixP->fx_line, 3807 _("value too large for 2-byte field")); 3808 md_number_to_chars (buf, value, 2); 3809 } 3810 break; 3811 3812 case BFD_RELOC_8: 3813 if (fixP->fx_done || !seg->use_rela_p) 3814 { 3815 if (value + 0x80 > 0xff + 0x80) 3816 as_bad_where (fixP->fx_file, fixP->fx_line, 3817 _("value too large for 1-byte field")); 3818 *buf = value; 3819 } 3820 break; 3821 3822 case BFD_RELOC_C6000_ABS_S16: 3823 case BFD_RELOC_C6000_ABS_L16: 3824 case BFD_RELOC_C6000_SBR_S16: 3825 case BFD_RELOC_C6000_SBR_L16_B: 3826 case BFD_RELOC_C6000_SBR_L16_H: 3827 case BFD_RELOC_C6000_SBR_L16_W: 3828 case BFD_RELOC_C6000_SBR_GOT_L16_W: 3829 if (fixP->fx_done || !seg->use_rela_p) 3830 { 3831 valueT newval = md_chars_to_number (buf, 4); 3832 int shift; 3833 3834 switch (fixP->fx_r_type) 3835 { 3836 case BFD_RELOC_C6000_SBR_L16_H: 3837 shift = 1; 3838 break; 3839 3840 case BFD_RELOC_C6000_SBR_L16_W: 3841 case BFD_RELOC_C6000_SBR_GOT_L16_W: 3842 shift = 2; 3843 break; 3844 3845 default: 3846 shift = 0; 3847 break; 3848 } 3849 3850 MODIFY_VALUE (newval, value, shift, 7, 16); 3851 if ((value + 0x8000 > 0x7fff + 0x8000) 3852 && (fixP->fx_r_type == BFD_RELOC_C6000_ABS_S16 3853 || fixP->fx_r_type == BFD_RELOC_C6000_SBR_S16)) 3854 as_bad_where (fixP->fx_file, fixP->fx_line, 3855 _("immediate offset out of range")); 3856 3857 md_number_to_chars (buf, newval, 4); 3858 } 3859 if (fixP->fx_done 3860 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_S16 3861 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_L16) 3862 abort (); 3863 break; 3864 3865 case BFD_RELOC_C6000_ABS_H16: 3866 case BFD_RELOC_C6000_SBR_H16_B: 3867 case BFD_RELOC_C6000_SBR_H16_H: 3868 case BFD_RELOC_C6000_SBR_H16_W: 3869 case BFD_RELOC_C6000_SBR_GOT_H16_W: 3870 if (fixP->fx_done || !seg->use_rela_p) 3871 { 3872 valueT newval = md_chars_to_number (buf, 4); 3873 int shift; 3874 3875 switch (fixP->fx_r_type) 3876 { 3877 case BFD_RELOC_C6000_SBR_H16_H: 3878 shift = 17; 3879 break; 3880 3881 case BFD_RELOC_C6000_SBR_H16_W: 3882 case BFD_RELOC_C6000_SBR_GOT_H16_W: 3883 shift = 18; 3884 break; 3885 3886 default: 3887 shift = 16; 3888 break; 3889 } 3890 3891 MODIFY_VALUE (newval, value, shift, 7, 16); 3892 3893 md_number_to_chars (buf, newval, 4); 3894 } 3895 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_ABS_H16) 3896 abort (); 3897 break; 3898 3899 case BFD_RELOC_C6000_PCR_H16: 3900 case BFD_RELOC_C6000_PCR_L16: 3901 if (fixP->fx_done || !seg->use_rela_p) 3902 { 3903 valueT newval = md_chars_to_number (buf, 4); 3904 int shift = fixP->fx_r_type == BFD_RELOC_C6000_PCR_H16 ? 16 : 0; 3905 3906 MODIFY_VALUE (newval, value, shift, 7, 16); 3907 3908 md_number_to_chars (buf, newval, 4); 3909 } 3910 break; 3911 3912 case BFD_RELOC_C6000_SBR_U15_B: 3913 if (fixP->fx_done || !seg->use_rela_p) 3914 { 3915 valueT newval = md_chars_to_number (buf, 4); 3916 3917 MODIFY_VALUE (newval, value, 0, 8, 15); 3918 if (value > 0x7fff) 3919 as_bad_where (fixP->fx_file, fixP->fx_line, 3920 _("immediate offset out of range")); 3921 3922 md_number_to_chars (buf, newval, 4); 3923 } 3924 break; 3925 3926 case BFD_RELOC_C6000_SBR_U15_H: 3927 if (fixP->fx_done || !seg->use_rela_p) 3928 { 3929 valueT newval = md_chars_to_number (buf, 4); 3930 3931 /* Constant ADDA operands, processed as constant when the 3932 instruction is parsed, are encoded as-is rather than 3933 shifted. If the operand of an ADDA instruction is now 3934 constant (for example, the difference between two labels 3935 found after the instruction), ensure it is encoded the 3936 same way it would have been if the constant value had 3937 been known when the instruction was parsed. */ 3938 if (fixP->tc_fix_data.fix_adda && fixP->fx_done) 3939 value <<= 1; 3940 3941 MODIFY_VALUE (newval, value, 1, 8, 15); 3942 if (value & 1) 3943 as_bad_where (fixP->fx_file, fixP->fx_line, 3944 _("immediate offset not 2-byte-aligned")); 3945 if (value > 0xfffe) 3946 as_bad_where (fixP->fx_file, fixP->fx_line, 3947 _("immediate offset out of range")); 3948 3949 md_number_to_chars (buf, newval, 4); 3950 } 3951 break; 3952 3953 case BFD_RELOC_C6000_SBR_U15_W: 3954 case BFD_RELOC_C6000_SBR_GOT_U15_W: 3955 if (fixP->fx_done || !seg->use_rela_p) 3956 { 3957 valueT newval = md_chars_to_number (buf, 4); 3958 3959 /* Constant ADDA operands, processed as constant when the 3960 instruction is parsed, are encoded as-is rather than 3961 shifted. If the operand of an ADDA instruction is now 3962 constant (for example, the difference between two labels 3963 found after the instruction), ensure it is encoded the 3964 same way it would have been if the constant value had 3965 been known when the instruction was parsed. */ 3966 if (fixP->tc_fix_data.fix_adda && fixP->fx_done) 3967 value <<= 2; 3968 3969 MODIFY_VALUE (newval, value, 2, 8, 15); 3970 if (value & 3) 3971 as_bad_where (fixP->fx_file, fixP->fx_line, 3972 _("immediate offset not 4-byte-aligned")); 3973 if (value > 0x1fffc) 3974 as_bad_where (fixP->fx_file, fixP->fx_line, 3975 _("immediate offset out of range")); 3976 3977 md_number_to_chars (buf, newval, 4); 3978 } 3979 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_SBR_U15_W) 3980 abort (); 3981 break; 3982 3983 case BFD_RELOC_C6000_DSBT_INDEX: 3984 if (value != 0) 3985 as_bad_where (fixP->fx_file, fixP->fx_line, 3986 _("addend used with $DSBT_INDEX")); 3987 if (fixP->fx_done) 3988 abort (); 3989 break; 3990 3991 case BFD_RELOC_C6000_PCR_S21: 3992 if (fixP->fx_done || !seg->use_rela_p) 3993 { 3994 valueT newval = md_chars_to_number (buf, 4); 3995 3996 MODIFY_VALUE (newval, value, 2, 7, 21); 3997 3998 if (value & 3) 3999 as_bad_where (fixP->fx_file, fixP->fx_line, 4000 _("PC-relative offset not 4-byte-aligned")); 4001 if (value + 0x400000 > 0x3ffffc + 0x400000) 4002 as_bad_where (fixP->fx_file, fixP->fx_line, 4003 _("PC-relative offset out of range")); 4004 4005 md_number_to_chars (buf, newval, 4); 4006 } 4007 break; 4008 4009 case BFD_RELOC_C6000_PCR_S12: 4010 if (fixP->fx_done || !seg->use_rela_p) 4011 { 4012 valueT newval = md_chars_to_number (buf, 4); 4013 4014 MODIFY_VALUE (newval, value, 2, 16, 12); 4015 4016 if (value & 3) 4017 as_bad_where (fixP->fx_file, fixP->fx_line, 4018 _("PC-relative offset not 4-byte-aligned")); 4019 if (value + 0x2000 > 0x1ffc + 0x2000) 4020 as_bad_where (fixP->fx_file, fixP->fx_line, 4021 _("PC-relative offset out of range")); 4022 4023 md_number_to_chars (buf, newval, 4); 4024 } 4025 break; 4026 4027 case BFD_RELOC_C6000_PCR_S10: 4028 if (fixP->fx_done || !seg->use_rela_p) 4029 { 4030 valueT newval = md_chars_to_number (buf, 4); 4031 4032 MODIFY_VALUE (newval, value, 2, 13, 10); 4033 4034 if (value & 3) 4035 as_bad_where (fixP->fx_file, fixP->fx_line, 4036 _("PC-relative offset not 4-byte-aligned")); 4037 if (value + 0x800 > 0x7fc + 0x800) 4038 as_bad_where (fixP->fx_file, fixP->fx_line, 4039 _("PC-relative offset out of range")); 4040 4041 md_number_to_chars (buf, newval, 4); 4042 } 4043 break; 4044 4045 case BFD_RELOC_C6000_PCR_S7: 4046 if (fixP->fx_done || !seg->use_rela_p) 4047 { 4048 valueT newval = md_chars_to_number (buf, 4); 4049 4050 MODIFY_VALUE (newval, value, 2, 16, 7); 4051 4052 if (value & 3) 4053 as_bad_where (fixP->fx_file, fixP->fx_line, 4054 _("PC-relative offset not 4-byte-aligned")); 4055 if (value + 0x100 > 0xfc + 0x100) 4056 as_bad_where (fixP->fx_file, fixP->fx_line, 4057 _("PC-relative offset out of range")); 4058 4059 md_number_to_chars (buf, newval, 4); 4060 } 4061 break; 4062 4063 case BFD_RELOC_C6000_PREL31: 4064 /* Force output to the object file. */ 4065 fixP->fx_done = 0; 4066 break; 4067 4068 default: 4069 abort (); 4070 } 4071} 4072 4073/* Convert a floating-point number to target (IEEE) format. */ 4074 4075const char * 4076md_atof (int type, char *litP, int *sizeP) 4077{ 4078 return ieee_md_atof (type, litP, sizeP, target_big_endian); 4079} 4080 4081/* Adjust the frags in SECTION (see tic6x_end). */ 4082 4083static void 4084tic6x_adjust_section (bfd *abfd ATTRIBUTE_UNUSED, segT section, 4085 void *dummy ATTRIBUTE_UNUSED) 4086{ 4087 segment_info_type *info; 4088 frchainS *frchp; 4089 fragS *fragp; 4090 bool have_code = false; 4091 bool have_non_code = false; 4092 4093 info = seg_info (section); 4094 if (info == NULL) 4095 return; 4096 4097 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next) 4098 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next) 4099 switch (fragp->fr_type) 4100 { 4101 case rs_machine_dependent: 4102 if (fragp->tc_frag_data.is_insns) 4103 have_code = true; 4104 break; 4105 4106 case rs_dummy: 4107 case rs_fill: 4108 if (fragp->fr_fix > 0) 4109 have_non_code = true; 4110 break; 4111 4112 default: 4113 have_non_code = true; 4114 break; 4115 } 4116 4117 /* Process alignment requirements in a code-only section. */ 4118 if (have_code && !have_non_code) 4119 { 4120 /* If we need to insert an odd number of instructions to meet an 4121 alignment requirement, there must have been an odd number of 4122 instructions since the last 8-byte-aligned execute packet 4123 boundary. So there must have been an execute packet with an 4124 odd number (and so a number fewer than 8) of instructions 4125 into which we can insert a NOP without breaking any previous 4126 alignments. 4127 4128 If then we need to insert a number 2 mod 4 of instructions, 4129 the number of instructions since the last 16-byte-aligned 4130 execute packet boundary must be 2 mod 4. So between that 4131 boundary and the following 8-byte-aligned boundary there must 4132 either be at least one execute packet with 2-mod-4 4133 instructions, or at least two with an odd number of 4134 instructions; again, greedily inserting NOPs as soon as 4135 possible suffices to meet the alignment requirement. 4136 4137 If then we need to insert 4 instructions, we look between the 4138 last 32-byte-aligned boundary and the following 4139 16-byte-aligned boundary. The sizes of the execute packets 4140 in this range total 4 instructions mod 8, so again there is 4141 room for greedy insertion of NOPs to meet the alignment 4142 requirement, and before any intermediate point with 8-byte 4143 (2-instruction) alignment requirement the sizes of execute 4144 packets (and so the room for NOPs) will total 2 instructions 4145 mod 4 so greedy insertion will not break such alignments. 4146 4147 So we can always meet these alignment requirements by 4148 inserting NOPs in parallel with existing execute packets, and 4149 by induction the approach described above inserts the minimum 4150 number of such NOPs. */ 4151 4152 /* The number of NOPs we are currently looking to insert, if we 4153 have gone back to insert NOPs. */ 4154 unsigned int want_insert = 0; 4155 4156 /* Out of that number, the number inserted so far in the current 4157 stage of the above algorithm. */ 4158 unsigned int want_insert_done_so_far = 0; 4159 4160 /* The position mod 32 at the start of the current frag. */ 4161 unsigned int pos = 0; 4162 4163 /* The locations in the frag chain of the most recent frags at 4164 the start of which there is the given alignment. */ 4165 frchainS *frchp_last32, *frchp_last16, *frchp_last8; 4166 fragS *fragp_last32, *fragp_last16, *fragp_last8; 4167 unsigned int pos_last32, pos_last16, pos_last8; 4168 4169 frchp_last32 = frchp_last16 = frchp_last8 = info->frchainP; 4170 fragp_last32 = fragp_last16 = fragp_last8 = info->frchainP->frch_root; 4171 pos_last32 = pos_last16 = pos_last8 = 0; 4172 4173 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next) 4174 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next) 4175 look_at_frag: 4176 { 4177 bool go_back = false; 4178 frchainS *frchp_next; 4179 fragS *fragp_next; 4180 4181 if (fragp->fr_type != rs_machine_dependent) 4182 continue; 4183 4184 if (fragp->tc_frag_data.is_insns 4185 && pos + fragp->fr_fix > 32 4186 && !fragp->tc_frag_data.can_cross_fp_boundary) 4187 { 4188 /* As described above, we should always have met an 4189 alignment requirement by the time we come back to 4190 it. */ 4191 if (want_insert) 4192 abort (); 4193 4194 if (pos & 3) 4195 abort (); 4196 want_insert = (32 - pos) >> 2; 4197 if (want_insert > 7) 4198 abort (); 4199 want_insert_done_so_far = 0; 4200 go_back = true; 4201 } 4202 4203 if (!fragp->tc_frag_data.is_insns) 4204 { 4205 unsigned int would_insert_bytes; 4206 4207 if (!(pos & ((1 << fragp->fr_offset) - 1))) 4208 /* This alignment requirement is already met. */ 4209 continue; 4210 4211 /* As described above, we should always have met an 4212 alignment requirement by the time we come back to 4213 it. */ 4214 if (want_insert) 4215 abort (); 4216 4217 /* We may not be able to meet this requirement within 4218 the given number of characters. */ 4219 would_insert_bytes 4220 = ((1 << fragp->fr_offset) 4221 - (pos & ((1 << fragp->fr_offset) - 1))); 4222 4223 if (fragp->fr_subtype != 0 4224 && would_insert_bytes > fragp->fr_subtype) 4225 continue; 4226 4227 /* An unmet alignment must be 8, 16 or 32 bytes; 4228 smaller ones must always be met within code-only 4229 sections and larger ones cause the section not to 4230 be code-only. */ 4231 if (fragp->fr_offset != 3 4232 && fragp->fr_offset != 4 4233 && fragp->fr_offset != 5) 4234 abort (); 4235 4236 if (would_insert_bytes & 3) 4237 abort (); 4238 want_insert = would_insert_bytes >> 2; 4239 if (want_insert > 7) 4240 abort (); 4241 want_insert_done_so_far = 0; 4242 go_back = true; 4243 } 4244 else if (want_insert && !go_back) 4245 { 4246 unsigned int num_insns = fragp->fr_fix >> 2; 4247 unsigned int max_poss_nops = 8 - num_insns; 4248 4249 if (max_poss_nops) 4250 { 4251 unsigned int cur_want_nops, max_want_nops, do_nops, i; 4252 4253 if (want_insert & 1) 4254 cur_want_nops = 1; 4255 else if (want_insert & 2) 4256 cur_want_nops = 2; 4257 else if (want_insert & 4) 4258 cur_want_nops = 4; 4259 else 4260 abort (); 4261 4262 max_want_nops = cur_want_nops - want_insert_done_so_far; 4263 4264 do_nops = (max_poss_nops < max_want_nops 4265 ? max_poss_nops 4266 : max_want_nops); 4267 for (i = 0; i < do_nops; i++) 4268 { 4269 md_number_to_chars (fragp->fr_literal + fragp->fr_fix, 4270 0, 4); 4271 if (target_big_endian) 4272 fragp->fr_literal[fragp->fr_fix - 1] |= 0x1; 4273 else 4274 fragp->fr_literal[fragp->fr_fix - 4] |= 0x1; 4275 fragp->fr_fix += 4; 4276 fragp->fr_var -= 4; 4277 } 4278 want_insert_done_so_far += do_nops; 4279 if (want_insert_done_so_far == cur_want_nops) 4280 { 4281 want_insert -= want_insert_done_so_far; 4282 want_insert_done_so_far = 0; 4283 if (want_insert) 4284 go_back = true; 4285 } 4286 } 4287 } 4288 if (go_back) 4289 { 4290 if (want_insert & 1) 4291 { 4292 frchp = frchp_last8; 4293 fragp = fragp_last8; 4294 pos = pos_last8; 4295 } 4296 else if (want_insert & 2) 4297 { 4298 frchp = frchp_last8 = frchp_last16; 4299 fragp = fragp_last8 = fragp_last16; 4300 pos = pos_last8 = pos_last16; 4301 } 4302 else if (want_insert & 4) 4303 { 4304 frchp = frchp_last8 = frchp_last16 = frchp_last32; 4305 fragp = fragp_last8 = fragp_last16 = fragp_last32; 4306 pos = pos_last8 = pos_last16 = pos_last32; 4307 } 4308 else 4309 abort (); 4310 4311 goto look_at_frag; 4312 } 4313 4314 /* Update current position for moving past a code 4315 frag. */ 4316 pos += fragp->fr_fix; 4317 pos &= 31; 4318 frchp_next = frchp; 4319 fragp_next = fragp->fr_next; 4320 if (fragp_next == NULL) 4321 { 4322 frchp_next = frchp->frch_next; 4323 if (frchp_next != NULL) 4324 fragp_next = frchp_next->frch_root; 4325 } 4326 if (!(pos & 7)) 4327 { 4328 frchp_last8 = frchp_next; 4329 fragp_last8 = fragp_next; 4330 pos_last8 = pos; 4331 } 4332 if (!(pos & 15)) 4333 { 4334 frchp_last16 = frchp_next; 4335 fragp_last16 = fragp_next; 4336 pos_last16 = pos; 4337 } 4338 if (!(pos & 31)) 4339 { 4340 frchp_last32 = frchp_next; 4341 fragp_last32 = fragp_next; 4342 pos_last32 = pos; 4343 } 4344 } 4345 } 4346 4347 /* Now convert the machine-dependent frags to machine-independent 4348 ones. */ 4349 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next) 4350 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next) 4351 { 4352 if (fragp->fr_type == rs_machine_dependent) 4353 { 4354 if (fragp->tc_frag_data.is_insns) 4355 frag_wane (fragp); 4356 else 4357 { 4358 fragp->fr_type = rs_align_code; 4359 fragp->fr_var = 1; 4360 *fragp->fr_literal = 0; 4361 } 4362 } 4363 } 4364} 4365 4366/* Initialize the machine-dependent parts of a frag. */ 4367 4368void 4369tic6x_frag_init (fragS *fragp) 4370{ 4371 fragp->tc_frag_data.is_insns = false; 4372 fragp->tc_frag_data.can_cross_fp_boundary = false; 4373} 4374 4375/* Set an attribute if it has not already been set by the user. */ 4376 4377static void 4378tic6x_set_attribute_int (int tag, int value) 4379{ 4380 if (tag < 1 4381 || tag >= NUM_KNOWN_OBJ_ATTRIBUTES) 4382 abort (); 4383 if (!tic6x_attributes_set_explicitly[tag]) 4384 bfd_elf_add_proc_attr_int (stdoutput, tag, value); 4385} 4386 4387/* Set object attributes deduced from the input file and command line 4388 rather than given explicitly. */ 4389static void 4390tic6x_set_attributes (void) 4391{ 4392 if (tic6x_arch_attribute == C6XABI_Tag_ISA_none) 4393 tic6x_arch_attribute = C6XABI_Tag_ISA_C674X; 4394 4395 tic6x_set_attribute_int (Tag_ISA, tic6x_arch_attribute); 4396 tic6x_set_attribute_int (Tag_ABI_DSBT, tic6x_dsbt); 4397 tic6x_set_attribute_int (Tag_ABI_PID, tic6x_pid); 4398 tic6x_set_attribute_int (Tag_ABI_PIC, tic6x_pic); 4399} 4400 4401/* Do machine-dependent manipulations of the frag chains after all 4402 input has been read and before the machine-independent sizing and 4403 relaxing. */ 4404 4405void 4406tic6x_end (void) 4407{ 4408 /* Set object attributes at this point if not explicitly set. */ 4409 tic6x_set_attributes (); 4410 4411 /* Meeting alignment requirements may require inserting NOPs in 4412 parallel in execute packets earlier in the segment. Future 4413 16-bit instruction generation involves whole-segment optimization 4414 to determine the best choice and ordering of 32-bit or 16-bit 4415 instructions. This doesn't fit will in the general relaxation 4416 framework, so handle alignment and 16-bit instruction generation 4417 here. */ 4418 bfd_map_over_sections (stdoutput, tic6x_adjust_section, NULL); 4419} 4420 4421/* No machine-dependent frags at this stage; all converted in 4422 tic6x_end. */ 4423 4424void 4425md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec ATTRIBUTE_UNUSED, 4426 fragS *fragp ATTRIBUTE_UNUSED) 4427{ 4428 abort (); 4429} 4430 4431/* No machine-dependent frags at this stage; all converted in 4432 tic6x_end. */ 4433 4434int 4435md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 4436 segT seg ATTRIBUTE_UNUSED) 4437{ 4438 abort (); 4439} 4440 4441/* Put a number into target byte order. */ 4442 4443void 4444md_number_to_chars (char *buf, valueT val, int n) 4445{ 4446 if (target_big_endian) 4447 number_to_chars_bigendian (buf, val, n); 4448 else 4449 number_to_chars_littleendian (buf, val, n); 4450} 4451 4452/* Machine-dependent operand parsing not currently needed. */ 4453 4454void 4455md_operand (expressionS *op ATTRIBUTE_UNUSED) 4456{ 4457} 4458 4459/* PC-relative operands are relative to the start of the fetch 4460 packet. */ 4461 4462long 4463tic6x_pcrel_from_section (fixS *fixp, segT sec) 4464{ 4465 if (fixp->fx_addsy != NULL 4466 && (!S_IS_DEFINED (fixp->fx_addsy) 4467 || S_GET_SEGMENT (fixp->fx_addsy) != sec)) 4468 return 0; 4469 return (fixp->fx_where + fixp->fx_frag->fr_address) & ~(long) 0x1f; 4470} 4471 4472/* Round up a section size to the appropriate boundary. */ 4473 4474valueT 4475md_section_align (segT segment ATTRIBUTE_UNUSED, 4476 valueT size) 4477{ 4478 /* Round up section sizes to ensure that text sections consist of 4479 whole fetch packets. */ 4480 int align = bfd_section_alignment (segment); 4481 return ((size + (1 << align) - 1) & (-((valueT) 1 << align))); 4482} 4483 4484/* No special undefined symbol handling needed for now. */ 4485 4486symbolS * 4487md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 4488{ 4489 return NULL; 4490} 4491 4492/* Translate internal representation of relocation info to BFD target 4493 format. */ 4494 4495arelent * 4496tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 4497{ 4498 arelent *reloc; 4499 asymbol *symbol; 4500 bfd_reloc_code_real_type r_type; 4501 4502 reloc = XNEW (arelent); 4503 reloc->sym_ptr_ptr = XNEW (asymbol *); 4504 symbol = symbol_get_bfdsym (fixp->fx_addsy); 4505 *reloc->sym_ptr_ptr = symbol; 4506 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 4507 reloc->addend = (tic6x_generate_rela ? fixp->fx_offset : 0); 4508 r_type = fixp->fx_r_type; 4509 reloc->howto = bfd_reloc_type_lookup (stdoutput, r_type); 4510 4511 if (reloc->howto == NULL) 4512 { 4513 as_bad_where (fixp->fx_file, fixp->fx_line, 4514 _("Cannot represent relocation type %s"), 4515 bfd_get_reloc_code_name (r_type)); 4516 return NULL; 4517 } 4518 4519 /* Correct for adjustments bfd_install_relocation will make. */ 4520 if (reloc->howto->pcrel_offset && reloc->howto->partial_inplace) 4521 { 4522 reloc->addend += reloc->address; 4523 if (!bfd_is_com_section (bfd_asymbol_section (symbol))) 4524 reloc->addend -= symbol->value; 4525 } 4526 if (r_type == BFD_RELOC_C6000_PCR_H16 4527 || r_type == BFD_RELOC_C6000_PCR_L16) 4528 { 4529 symbolS *t = fixp->tc_fix_data.fix_subsy; 4530 segT sub_symbol_segment; 4531 4532 resolve_symbol_value (t); 4533 sub_symbol_segment = S_GET_SEGMENT (t); 4534 if (sub_symbol_segment == undefined_section) 4535 as_bad_where (fixp->fx_file, fixp->fx_line, 4536 _("undefined symbol %s in PCR relocation"), 4537 S_GET_NAME (t)); 4538 else 4539 { 4540 reloc->addend = reloc->address & ~0x1F; 4541 reloc->addend -= S_GET_VALUE (t); 4542 } 4543 } 4544 return reloc; 4545} 4546 4547/* Convert REGNAME to a DWARF-2 register number. */ 4548 4549int 4550tic6x_regname_to_dw2regnum (char *regname) 4551{ 4552 bool reg_ok; 4553 tic6x_register reg; 4554 char *rq = regname; 4555 4556 reg_ok = tic6x_parse_register (&rq, ®); 4557 4558 if (!reg_ok) 4559 return -1; 4560 4561 switch (reg.side) 4562 { 4563 case 1: /* A regs. */ 4564 if (reg.num < 16) 4565 return reg.num; 4566 else if (reg.num < 32) 4567 return (reg.num - 16) + 37; 4568 else 4569 return -1; 4570 4571 case 2: /* B regs. */ 4572 if (reg.num < 16) 4573 return reg.num + 16; 4574 else if (reg.num < 32) 4575 return (reg.num - 16) + 53; 4576 else 4577 return -1; 4578 4579 default: 4580 return -1; 4581 } 4582} 4583 4584/* Initialize the DWARF-2 unwind information for this procedure. */ 4585 4586void 4587tic6x_frame_initial_instructions (void) 4588{ 4589 /* CFA is initial stack pointer (B15). */ 4590 cfi_add_CFA_def_cfa (31, 0); 4591} 4592 4593/* Start an exception table entry. If idx is nonzero this is an index table 4594 entry. */ 4595 4596static void 4597tic6x_start_unwind_section (const segT text_seg, int idx) 4598{ 4599 tic6x_unwind_info *unwind = tic6x_get_unwind (); 4600 const char * text_name; 4601 const char * prefix; 4602 const char * prefix_once; 4603 struct elf_section_match match; 4604 size_t prefix_len; 4605 size_t text_len; 4606 char * sec_name; 4607 size_t sec_name_len; 4608 int type; 4609 int flags; 4610 int linkonce; 4611 4612 if (idx) 4613 { 4614 prefix = ELF_STRING_C6000_unwind; 4615 prefix_once = ELF_STRING_C6000_unwind_once; 4616 type = SHT_C6000_UNWIND; 4617 } 4618 else 4619 { 4620 prefix = ELF_STRING_C6000_unwind_info; 4621 prefix_once = ELF_STRING_C6000_unwind_info_once; 4622 type = SHT_PROGBITS; 4623 } 4624 4625 text_name = segment_name (text_seg); 4626 if (streq (text_name, ".text")) 4627 text_name = ""; 4628 4629 if (startswith (text_name, ".gnu.linkonce.t.")) 4630 { 4631 prefix = prefix_once; 4632 text_name += strlen (".gnu.linkonce.t."); 4633 } 4634 4635 prefix_len = strlen (prefix); 4636 text_len = strlen (text_name); 4637 sec_name_len = prefix_len + text_len; 4638 sec_name = XNEWVEC (char, sec_name_len + 1); 4639 memcpy (sec_name, prefix, prefix_len); 4640 memcpy (sec_name + prefix_len, text_name, text_len); 4641 sec_name[prefix_len + text_len] = '\0'; 4642 4643 flags = SHF_ALLOC; 4644 linkonce = 0; 4645 memset (&match, 0, sizeof (match)); 4646 4647 /* Handle COMDAT group. */ 4648 if (prefix != prefix_once && (text_seg->flags & SEC_LINK_ONCE) != 0) 4649 { 4650 match.group_name = elf_group_name (text_seg); 4651 if (match.group_name == NULL) 4652 { 4653 as_bad (_("group section `%s' has no group signature"), 4654 segment_name (text_seg)); 4655 ignore_rest_of_line (); 4656 return; 4657 } 4658 flags |= SHF_GROUP; 4659 linkonce = 1; 4660 } 4661 4662 obj_elf_change_section (sec_name, type, flags, 0, &match, 4663 linkonce, 0); 4664 4665 /* Set the section link for index tables. */ 4666 if (idx) 4667 elf_linked_to_section (now_seg) = text_seg; 4668 4669 seg_info (now_seg)->tc_segment_info_data.text_unwind = unwind; 4670} 4671 4672 4673static const int 4674tic6x_unwind_frame_regs[TIC6X_NUM_UNWIND_REGS] = 4675/* A15 B15 B14 B13 B12 B11 B10 B3 A14 A13 A12 A11 A10. */ 4676 { 15, 31, 30, 29, 28, 27, 26, 19, 14, 13, 12, 11, 10 }; 4677 4678/* Register save offsets for __c6xabi_push_rts. */ 4679static const int 4680tic6x_pop_rts_offset_little[TIC6X_NUM_UNWIND_REGS] = 4681/* A15 B15 B14 B13 B12 B11 B10 B3 A14 A13 A12 A11 A10. */ 4682 { -1, 1, 0, -3, -4, -7, -8,-11, -2, -5, -6, -9,-10}; 4683 4684static const int 4685tic6x_pop_rts_offset_big[TIC6X_NUM_UNWIND_REGS] = 4686/* A15 B15 B14 B13 B12 B11 B10 B3 A14 A13 A12 A11 A10. */ 4687 { -2, 1, 0, -4, -3, -8, -7,-12, -1, -6, -5,-10, -9}; 4688 4689/* Map from dwarf register number to unwind frame register number. */ 4690static int 4691tic6x_unwind_reg_from_dwarf (int dwarf) 4692{ 4693 int reg; 4694 4695 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++) 4696 { 4697 if (tic6x_unwind_frame_regs[reg] == dwarf) 4698 return reg; 4699 } 4700 4701 return -1; 4702} 4703 4704/* Unwinding bytecode definitions. */ 4705#define UNWIND_OP_ADD_SP 0x00 4706#define UNWIND_OP_ADD_SP2 0xd2 4707#define UNWIND_OP2_POP 0x8000 4708#define UNWIND_OP2_POP_COMPACT 0xa000 4709#define UNWIND_OP_POP_REG 0xc0 4710#define UNWIND_OP_MV_FP 0xd0 4711#define UNWIND_OP_POP_RTS 0xd1 4712#define UNWIND_OP_RET 0xe0 4713 4714/* Maximum stack adjustment for __c6xabi_unwind_cpp_pr3/4 */ 4715#define MAX_COMPACT_SP_OFFSET (0x7f << 3) 4716 4717static void 4718tic6x_flush_unwind_word (valueT data) 4719{ 4720 tic6x_unwind_info *unwind = tic6x_get_unwind (); 4721 char *ptr; 4722 4723 /* Create EXTAB entry if it does not exist. */ 4724 if (unwind->table_entry == NULL) 4725 { 4726 tic6x_start_unwind_section (unwind->saved_seg, 0); 4727 frag_align (2, 0, 0); 4728 record_alignment (now_seg, 2); 4729 unwind->table_entry = expr_build_dot (); 4730 ptr = frag_more (4); 4731 unwind->frag_start = ptr; 4732 } 4733 else 4734 { 4735 /* Append additional word of data. */ 4736 ptr = frag_more (4); 4737 } 4738 4739 md_number_to_chars (ptr, data, 4); 4740} 4741 4742/* Add a single byte of unwinding data. */ 4743 4744static void 4745tic6x_unwind_byte (int byte) 4746{ 4747 tic6x_unwind_info *unwind = tic6x_get_unwind (); 4748 4749 unwind->data_bytes++; 4750 /* Only flush the first word after we know multiple words are required. */ 4751 if (unwind->data_bytes == 5) 4752 { 4753 if (unwind->personality_index == -1) 4754 { 4755 /* At this point we know we are too big for pr0. */ 4756 unwind->personality_index = 1; 4757 tic6x_flush_unwind_word (0x81000000 | ((unwind->data >> 8) & 0xffff)); 4758 unwind->data = ((unwind->data & 0xff) << 8) | byte; 4759 unwind->data_bytes++; 4760 } 4761 else 4762 { 4763 tic6x_flush_unwind_word (unwind->data); 4764 unwind->data = byte; 4765 } 4766 } 4767 else 4768 { 4769 unwind->data = (unwind->data << 8) | byte; 4770 if ((unwind->data_bytes & 3) == 0 && unwind->data_bytes > 4) 4771 { 4772 tic6x_flush_unwind_word (unwind->data); 4773 unwind->data = 0; 4774 } 4775 } 4776} 4777 4778/* Add a two-byte unwinding opcode. */ 4779static void 4780tic6x_unwind_2byte (int bytes) 4781{ 4782 tic6x_unwind_byte (bytes >> 8); 4783 tic6x_unwind_byte (bytes & 0xff); 4784} 4785 4786static void 4787tic6x_unwind_uleb (offsetT offset) 4788{ 4789 while (offset > 0x7f) 4790 { 4791 tic6x_unwind_byte ((offset & 0x7f) | 0x80); 4792 offset >>= 7; 4793 } 4794 tic6x_unwind_byte (offset); 4795} 4796 4797void 4798tic6x_cfi_startproc (void) 4799{ 4800 tic6x_unwind_info *unwind = tic6x_get_unwind (); 4801 4802 unwind->personality_index = -1; 4803 unwind->personality_routine = NULL; 4804 if (unwind->table_entry) 4805 as_bad (_("missing .endp before .cfi_startproc")); 4806 4807 unwind->table_entry = NULL; 4808 unwind->data_bytes = -1; 4809} 4810 4811static void 4812tic6x_output_exidx_entry (void) 4813{ 4814 char *ptr; 4815 long where; 4816 unsigned int marked_pr_dependency; 4817 segT old_seg; 4818 subsegT old_subseg; 4819 tic6x_unwind_info *unwind = tic6x_get_unwind (); 4820 4821 old_seg = now_seg; 4822 old_subseg = now_subseg; 4823 4824 /* Add index table entry. This is two words. */ 4825 tic6x_start_unwind_section (unwind->saved_seg, 1); 4826 frag_align (2, 0, 0); 4827 record_alignment (now_seg, 2); 4828 4829 ptr = frag_more (8); 4830 memset (ptr, 0, 8); 4831 where = frag_now_fix () - 8; 4832 4833 /* Self relative offset of the function start. */ 4834 fix_new (frag_now, where, 4, unwind->function_start, 0, 1, 4835 BFD_RELOC_C6000_PREL31); 4836 4837 /* Indicate dependency on ABI-defined personality routines to the 4838 linker, if it hasn't been done already. */ 4839 marked_pr_dependency 4840 = seg_info (now_seg)->tc_segment_info_data.marked_pr_dependency; 4841 if (unwind->personality_index >= 0 && unwind->personality_index < 5 4842 && !(marked_pr_dependency & (1 << unwind->personality_index))) 4843 { 4844 static const char *const name[] = 4845 { 4846 "__c6xabi_unwind_cpp_pr0", 4847 "__c6xabi_unwind_cpp_pr1", 4848 "__c6xabi_unwind_cpp_pr2", 4849 "__c6xabi_unwind_cpp_pr3", 4850 "__c6xabi_unwind_cpp_pr4" 4851 }; 4852 symbolS *pr = symbol_find_or_make (name[unwind->personality_index]); 4853 fix_new (frag_now, where, 0, pr, 0, 1, BFD_RELOC_NONE); 4854 seg_info (now_seg)->tc_segment_info_data.marked_pr_dependency 4855 |= 1 << unwind->personality_index; 4856 } 4857 4858 if (unwind->table_entry) 4859 { 4860 /* Self relative offset of the table entry. */ 4861 fix_new (frag_now, where + 4, 4, unwind->table_entry, 0, 1, 4862 BFD_RELOC_C6000_PREL31); 4863 } 4864 else 4865 { 4866 /* Inline exception table entry. */ 4867 md_number_to_chars (ptr + 4, unwind->data, 4); 4868 } 4869 4870 /* Restore the original section. */ 4871 subseg_set (old_seg, old_subseg); 4872} 4873 4874static void 4875tic6x_output_unwinding (bool need_extab) 4876{ 4877 tic6x_unwind_info *unwind = tic6x_get_unwind (); 4878 unsigned safe_mask = unwind->safe_mask; 4879 unsigned compact_mask = unwind->compact_mask; 4880 unsigned reg_saved_mask = unwind->reg_saved_mask; 4881 offsetT cfa_offset = unwind->cfa_offset; 4882 long where; 4883 int reg; 4884 4885 if (unwind->personality_index == -2) 4886 { 4887 /* Function can not be unwound. */ 4888 unwind->data = 1; 4889 tic6x_output_exidx_entry (); 4890 return; 4891 } 4892 4893 if (unwind->personality_index == -1 && unwind->personality_routine == NULL) 4894 { 4895 /* Auto-select a personality routine if none specified. */ 4896 if (reg_saved_mask || cfa_offset >= MAX_COMPACT_SP_OFFSET) 4897 unwind->personality_index = -1; 4898 else if (safe_mask) 4899 unwind->personality_index = 3; 4900 else 4901 unwind->personality_index = 4; 4902 } 4903 4904 /* Calculate unwinding opcodes, and emit to EXTAB if necessary. */ 4905 unwind->table_entry = NULL; 4906 if (unwind->personality_index == 3 || unwind->personality_index == 4) 4907 { 4908 if (cfa_offset >= MAX_COMPACT_SP_OFFSET) 4909 { 4910 as_bad (_("stack pointer offset too large for personality routine")); 4911 return; 4912 } 4913 if (reg_saved_mask 4914 || (unwind->personality_index == 3 && compact_mask != 0) 4915 || (unwind->personality_index == 4 && safe_mask != 0)) 4916 { 4917 as_bad (_("stack frame layout does not match personality routine")); 4918 return; 4919 } 4920 4921 unwind->data = (1u << 31) | (unwind->personality_index << 24); 4922 if (unwind->cfa_reg == 15) 4923 unwind->data |= 0x7f << 17; 4924 else 4925 unwind->data |= cfa_offset << (17 - 3); 4926 4927 if (unwind->personality_index == 3) 4928 unwind->data |= safe_mask << 4; 4929 else 4930 unwind->data |= compact_mask << 4; 4931 unwind->data |= unwind->return_reg; 4932 unwind->data_bytes = 4; 4933 } 4934 else 4935 { 4936 if (unwind->personality_routine) 4937 { 4938 unwind->data = 0; 4939 unwind->data_bytes = 5; 4940 tic6x_flush_unwind_word (0); 4941 /* First word is personality routine. */ 4942 where = frag_now_fix () - 4; 4943 fix_new (frag_now, where, 4, unwind->personality_routine, 0, 1, 4944 BFD_RELOC_C6000_PREL31); 4945 } 4946 else if (unwind->personality_index > 0) 4947 { 4948 unwind->data = 0x8000 | (unwind->personality_index << 8); 4949 unwind->data_bytes = 2; 4950 } 4951 else /* pr0 or undecided */ 4952 { 4953 unwind->data = 0x80; 4954 unwind->data_bytes = 1; 4955 } 4956 4957 if (unwind->return_reg != UNWIND_B3) 4958 { 4959 tic6x_unwind_byte (UNWIND_OP_RET | unwind->return_reg); 4960 } 4961 4962 if (unwind->cfa_reg == 15) 4963 { 4964 tic6x_unwind_byte (UNWIND_OP_MV_FP); 4965 } 4966 else if (cfa_offset != 0) 4967 { 4968 cfa_offset >>= 3; 4969 if (cfa_offset > 0x80) 4970 { 4971 tic6x_unwind_byte (UNWIND_OP_ADD_SP2); 4972 tic6x_unwind_uleb (cfa_offset - 0x81); 4973 } 4974 else if (cfa_offset > 0x40) 4975 { 4976 tic6x_unwind_byte (UNWIND_OP_ADD_SP | 0x3f); 4977 tic6x_unwind_byte (UNWIND_OP_ADD_SP | (cfa_offset - 0x40)); 4978 } 4979 else 4980 { 4981 tic6x_unwind_byte (UNWIND_OP_ADD_SP | (cfa_offset - 1)); 4982 } 4983 } 4984 4985 if (safe_mask) 4986 tic6x_unwind_2byte (UNWIND_OP2_POP | unwind->safe_mask); 4987 else if (unwind->pop_rts) 4988 tic6x_unwind_byte (UNWIND_OP_POP_RTS); 4989 else if (compact_mask) 4990 tic6x_unwind_2byte (UNWIND_OP2_POP_COMPACT | unwind->compact_mask); 4991 else if (reg_saved_mask) 4992 { 4993 offsetT cur_offset; 4994 int val; 4995 int last_val; 4996 4997 tic6x_unwind_byte (UNWIND_OP_POP_REG | unwind->saved_reg_count); 4998 last_val = 0; 4999 for (cur_offset = 0; unwind->saved_reg_count > 0; cur_offset -= 4) 5000 { 5001 val = 0xf; 5002 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++) 5003 { 5004 if (!unwind->reg_saved[reg]) 5005 continue; 5006 5007 if (unwind->reg_offset[reg] == cur_offset) 5008 { 5009 unwind->saved_reg_count--; 5010 val = reg; 5011 break; 5012 } 5013 } 5014 if ((cur_offset & 4) == 4) 5015 tic6x_unwind_byte ((last_val << 4) | val); 5016 else 5017 last_val = val; 5018 } 5019 if ((cur_offset & 4) == 4) 5020 tic6x_unwind_byte ((last_val << 4) | 0xf); 5021 } 5022 5023 /* Pad with RETURN opcodes. */ 5024 while ((unwind->data_bytes & 3) != 0) 5025 tic6x_unwind_byte (UNWIND_OP_RET | UNWIND_B3); 5026 5027 if (unwind->personality_index == -1 && unwind->personality_routine == NULL) 5028 unwind->personality_index = 0; 5029 } 5030 5031 /* Force creation of an EXTAB entry if an LSDA is required. */ 5032 if (need_extab && !unwind->table_entry) 5033 { 5034 if (unwind->data_bytes != 4) 5035 abort (); 5036 5037 tic6x_flush_unwind_word (unwind->data); 5038 } 5039 else if (unwind->table_entry && !need_extab) 5040 { 5041 /* Add an empty descriptor if there is no user-specified data. */ 5042 char *ptr = frag_more (4); 5043 md_number_to_chars (ptr, 0, 4); 5044 } 5045 5046 /* Fill in length of unwinding bytecode. */ 5047 if (unwind->table_entry) 5048 { 5049 valueT tmp; 5050 if (unwind->data_bytes > 0x400) 5051 as_bad (_("too many unwinding instructions")); 5052 5053 if (unwind->personality_index == -1) 5054 { 5055 tmp = md_chars_to_number (unwind->frag_start + 4, 4); 5056 tmp |= (valueT) ((unwind->data_bytes - 8) >> 2) << 24; 5057 md_number_to_chars (unwind->frag_start + 4, tmp, 4); 5058 } 5059 else if (unwind->personality_index == 1 || unwind->personality_index == 2) 5060 { 5061 tmp = md_chars_to_number (unwind->frag_start, 4); 5062 tmp |= ((unwind->data_bytes - 4) >> 2) << 16; 5063 md_number_to_chars (unwind->frag_start, tmp, 4); 5064 } 5065 } 5066 tic6x_output_exidx_entry (); 5067} 5068 5069/* FIXME: This will get horribly confused if cfi directives are emitted for 5070 function epilogue. */ 5071void 5072tic6x_cfi_endproc (struct fde_entry *fde) 5073{ 5074 tic6x_unwind_info *unwind = tic6x_get_unwind (); 5075 struct cfi_insn_data *insn; 5076 int reg; 5077 unsigned safe_mask = 0; 5078 unsigned compact_mask = 0; 5079 unsigned reg_saved_mask = 0; 5080 offsetT cfa_offset = 0; 5081 offsetT save_offset = 0; 5082 5083 unwind->cfa_reg = 31; 5084 unwind->return_reg = UNWIND_B3; 5085 unwind->saved_reg_count = 0; 5086 unwind->pop_rts = false; 5087 5088 unwind->saved_seg = now_seg; 5089 unwind->saved_subseg = now_subseg; 5090 5091 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++) 5092 unwind->reg_saved[reg] = false; 5093 5094 /* Scan FDE instructions to build up stack frame layout. */ 5095 for (insn = fde->data; insn; insn = insn->next) 5096 { 5097 switch (insn->insn) 5098 { 5099 case DW_CFA_advance_loc: 5100 break; 5101 5102 case DW_CFA_def_cfa: 5103 unwind->cfa_reg = insn->u.ri.reg; 5104 cfa_offset = insn->u.ri.offset; 5105 break; 5106 5107 case DW_CFA_def_cfa_register: 5108 unwind->cfa_reg = insn->u.r; 5109 break; 5110 5111 case DW_CFA_def_cfa_offset: 5112 cfa_offset = insn->u.i; 5113 break; 5114 5115 case DW_CFA_undefined: 5116 case DW_CFA_same_value: 5117 reg = tic6x_unwind_reg_from_dwarf (insn->u.r); 5118 if (reg >= 0) 5119 unwind->reg_saved[reg] = false; 5120 break; 5121 5122 case DW_CFA_offset: 5123 reg = tic6x_unwind_reg_from_dwarf (insn->u.ri.reg); 5124 if (reg < 0) 5125 { 5126 as_bad (_("unable to generate unwinding opcode for reg %d"), 5127 insn->u.ri.reg); 5128 return; 5129 } 5130 unwind->reg_saved[reg] = true; 5131 unwind->reg_offset[reg] = insn->u.ri.offset; 5132 if (insn->u.ri.reg == UNWIND_B3) 5133 unwind->return_reg = UNWIND_B3; 5134 break; 5135 5136 case DW_CFA_register: 5137 if (insn->u.rr.reg1 != 19) 5138 { 5139 as_bad (_("unable to generate unwinding opcode for reg %d"), 5140 insn->u.rr.reg1); 5141 return; 5142 } 5143 5144 reg = tic6x_unwind_reg_from_dwarf (insn->u.rr.reg2); 5145 if (reg < 0) 5146 { 5147 as_bad (_("unable to generate unwinding opcode for reg %d"), 5148 insn->u.rr.reg2); 5149 return; 5150 } 5151 5152 unwind->return_reg = reg; 5153 unwind->reg_saved[UNWIND_B3] = false; 5154 if (unwind->reg_saved[reg]) 5155 { 5156 as_bad (_("unable to restore return address from " 5157 "previously restored reg")); 5158 return; 5159 } 5160 break; 5161 5162 case DW_CFA_restore: 5163 case DW_CFA_remember_state: 5164 case DW_CFA_restore_state: 5165 case DW_CFA_GNU_window_save: 5166 case CFI_escape: 5167 case CFI_val_encoded_addr: 5168 as_bad (_("unhandled CFA insn for unwinding (%d)"), insn->insn); 5169 break; 5170 5171 default: 5172 abort (); 5173 } 5174 } 5175 5176 if (unwind->cfa_reg != 15 && unwind->cfa_reg != 31) 5177 { 5178 as_bad (_("unable to generate unwinding opcode for frame pointer reg %d"), 5179 unwind->cfa_reg); 5180 return; 5181 } 5182 5183 if (unwind->cfa_reg == 15) 5184 { 5185 if (cfa_offset != 0) 5186 { 5187 as_bad (_("unable to generate unwinding opcode for " 5188 "frame pointer offset")); 5189 return; 5190 } 5191 } 5192 else 5193 { 5194 if ((cfa_offset & 7) != 0) 5195 { 5196 as_bad (_("unwound stack pointer not doubleword aligned")); 5197 return; 5198 } 5199 } 5200 5201 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++) 5202 { 5203 if (unwind->reg_saved[reg]) 5204 reg_saved_mask |= 1 << (TIC6X_NUM_UNWIND_REGS - (reg + 1)); 5205 } 5206 5207 /* Check for standard "safe debug" frame layout */ 5208 if (reg_saved_mask) 5209 { 5210 save_offset = 0; 5211 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++) 5212 { 5213 if (!unwind->reg_saved[reg]) 5214 continue; 5215 5216 if (target_big_endian 5217 && reg < TIC6X_NUM_UNWIND_REGS - 1 5218 && unwind->reg_saved[reg + 1] 5219 && tic6x_unwind_frame_regs[reg] 5220 == tic6x_unwind_frame_regs[reg + 1] + 1 5221 && (tic6x_unwind_frame_regs[reg] & 1) == 1 5222 && (save_offset & 4) == 4) 5223 { 5224 /* Swapped pair */ 5225 if (save_offset != unwind->reg_offset[reg + 1] 5226 || save_offset - 4 != unwind->reg_offset[reg]) 5227 break; 5228 save_offset -= 8; 5229 reg++; 5230 } 5231 else 5232 { 5233 if (save_offset != unwind->reg_offset[reg]) 5234 break; 5235 save_offset -= 4; 5236 } 5237 } 5238 if (reg == TIC6X_NUM_UNWIND_REGS) 5239 { 5240 safe_mask = reg_saved_mask; 5241 reg_saved_mask = 0; 5242 } 5243 } 5244 5245 /* Check for compact frame layout. */ 5246 if (reg_saved_mask) 5247 { 5248 save_offset = 0; 5249 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++) 5250 { 5251 int reg2; 5252 5253 if (!unwind->reg_saved[reg]) 5254 continue; 5255 5256 if (reg < TIC6X_NUM_UNWIND_REGS - 1) 5257 { 5258 reg2 = reg + 1; 5259 5260 if (!unwind->reg_saved[reg2] 5261 || tic6x_unwind_frame_regs[reg] 5262 != tic6x_unwind_frame_regs[reg2] + 1 5263 || (tic6x_unwind_frame_regs[reg2] & 1) != 0 5264 || save_offset == 0) 5265 reg2 = -1; 5266 } 5267 else 5268 reg2 = -1; 5269 5270 if (reg2 >= 0) 5271 { 5272 int high_offset; 5273 if (target_big_endian) 5274 high_offset = 4; /* lower address = positive stack offset. */ 5275 else 5276 high_offset = 0; 5277 5278 if (save_offset + 4 - high_offset != unwind->reg_offset[reg] 5279 || save_offset + high_offset != unwind->reg_offset[reg2]) 5280 { 5281 break; 5282 } 5283 reg++; 5284 } 5285 else 5286 { 5287 if (save_offset != unwind->reg_offset[reg]) 5288 break; 5289 } 5290 save_offset -= 8; 5291 } 5292 5293 if (reg == TIC6X_NUM_UNWIND_REGS) 5294 { 5295 compact_mask = reg_saved_mask; 5296 reg_saved_mask = 0; 5297 } 5298 } 5299 5300 /* Check for __c6xabi_pop_rts format */ 5301 if (reg_saved_mask == 0x17ff) 5302 { 5303 const int *pop_rts_offset = target_big_endian 5304 ? tic6x_pop_rts_offset_big 5305 : tic6x_pop_rts_offset_little; 5306 5307 save_offset = 0; 5308 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++) 5309 { 5310 if (reg == UNWIND_B15) 5311 continue; 5312 5313 if (unwind->reg_offset[reg] != pop_rts_offset[reg] * 4) 5314 break; 5315 } 5316 5317 if (reg == TIC6X_NUM_UNWIND_REGS) 5318 { 5319 unwind->pop_rts = true; 5320 reg_saved_mask = 0; 5321 } 5322 } 5323 /* If all else fails then describe the frame manually. */ 5324 if (reg_saved_mask) 5325 { 5326 save_offset = 0; 5327 5328 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++) 5329 { 5330 if (!unwind->reg_saved[reg]) 5331 continue; 5332 5333 unwind->saved_reg_count++; 5334 /* Encoding uses 4 bits per word, so size of unwinding opcode data 5335 limits the save area size. The exact cap will be figured out 5336 later due to overflow, the 0x800 here is just a quick sanity 5337 check to weed out obviously excessive offsets. */ 5338 if (unwind->reg_offset[reg] > 0 || unwind->reg_offset[reg] < -0x800 5339 || (unwind->reg_offset[reg] & 3) != 0) 5340 { 5341 as_bad (_("stack frame layout too complex for unwinder")); 5342 return; 5343 } 5344 5345 if (unwind->reg_offset[reg] < save_offset) 5346 save_offset = unwind->reg_offset[reg] - 4; 5347 } 5348 } 5349 5350 /* Align to 8-byte boundary (stack grows towards negative offsets). */ 5351 save_offset &= ~7; 5352 5353 if (unwind->cfa_reg == 31 && !reg_saved_mask) 5354 { 5355 cfa_offset += save_offset; 5356 if (cfa_offset < 0) 5357 { 5358 as_bad (_("unwound frame has negative size")); 5359 return; 5360 } 5361 } 5362 5363 unwind->safe_mask = safe_mask; 5364 unwind->compact_mask = compact_mask; 5365 unwind->reg_saved_mask = reg_saved_mask; 5366 unwind->cfa_offset = cfa_offset; 5367 unwind->function_start = fde->start_address; 5368} 5369