1//==- HexagonFrameLowering.h - Define frame lowering for Hexagon -*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
10#define LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
11
12#include "Hexagon.h"
13#include "HexagonBlockRanges.h"
14#include "MCTargetDesc/HexagonMCTargetDesc.h"
15#include "llvm/ADT/STLExtras.h"
16#include "llvm/CodeGen/MachineBasicBlock.h"
17#include "llvm/CodeGen/MachineFrameInfo.h"
18#include "llvm/CodeGen/TargetFrameLowering.h"
19#include <vector>
20
21namespace llvm {
22
23class BitVector;
24class HexagonInstrInfo;
25class HexagonRegisterInfo;
26class MachineFunction;
27class MachineInstr;
28class MachineRegisterInfo;
29class TargetRegisterClass;
30
31class HexagonFrameLowering : public TargetFrameLowering {
32public:
33  // First register which could possibly hold a variable argument.
34  int FirstVarArgSavedReg;
35  explicit HexagonFrameLowering()
36      : TargetFrameLowering(StackGrowsDown, Align(8), 0, Align(1), true) {}
37
38  // All of the prolog/epilog functionality, including saving and restoring
39  // callee-saved registers is handled in emitPrologue. This is to have the
40  // logic for shrink-wrapping in one place.
41  void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const
42      override;
43  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
44      override {}
45
46  bool enableCalleeSaveSkip(const MachineFunction &MF) const override;
47
48  bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
49                                 MachineBasicBlock::iterator MI,
50                                 ArrayRef<CalleeSavedInfo> CSI,
51                                 const TargetRegisterInfo *TRI) const override {
52    return true;
53  }
54
55  bool
56  restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
57                              MachineBasicBlock::iterator MI,
58                              MutableArrayRef<CalleeSavedInfo> CSI,
59                              const TargetRegisterInfo *TRI) const override {
60    return true;
61  }
62
63  bool hasReservedCallFrame(const MachineFunction &MF) const override {
64    // We always reserve call frame as a part of the initial stack allocation.
65    return true;
66  }
67
68  bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override {
69    // Override this function to avoid calling hasFP before CSI is set
70    // (the default implementation calls hasFP).
71    return true;
72  }
73
74  MachineBasicBlock::iterator
75  eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
76                                MachineBasicBlock::iterator I) const override;
77  void processFunctionBeforeFrameFinalized(MachineFunction &MF,
78      RegScavenger *RS = nullptr) const override;
79  void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
80      RegScavenger *RS) const override;
81
82  bool targetHandlesStackFrameRounding() const override {
83    return true;
84  }
85
86  StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
87                                     Register &FrameReg) const override;
88  bool hasFP(const MachineFunction &MF) const override;
89
90  const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries)
91      const override {
92    static const SpillSlot Offsets[] = {
93      { Hexagon::R17, -4 }, { Hexagon::R16, -8 }, { Hexagon::D8, -8 },
94      { Hexagon::R19, -12 }, { Hexagon::R18, -16 }, { Hexagon::D9, -16 },
95      { Hexagon::R21, -20 }, { Hexagon::R20, -24 }, { Hexagon::D10, -24 },
96      { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 },
97      { Hexagon::R25, -36 }, { Hexagon::R24, -40 }, { Hexagon::D12, -40 },
98      { Hexagon::R27, -44 }, { Hexagon::R26, -48 }, { Hexagon::D13, -48 }
99    };
100    NumEntries = array_lengthof(Offsets);
101    return Offsets;
102  }
103
104  bool assignCalleeSavedSpillSlots(MachineFunction &MF,
105      const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI)
106      const override;
107
108  bool needsAligna(const MachineFunction &MF) const;
109  const MachineInstr *getAlignaInstr(const MachineFunction &MF) const;
110
111  void insertCFIInstructions(MachineFunction &MF) const;
112
113private:
114  using CSIVect = std::vector<CalleeSavedInfo>;
115
116  void expandAlloca(MachineInstr *AI, const HexagonInstrInfo &TII,
117      unsigned SP, unsigned CF) const;
118  void insertPrologueInBlock(MachineBasicBlock &MBB, bool PrologueStubs) const;
119  void insertEpilogueInBlock(MachineBasicBlock &MBB) const;
120  void insertAllocframe(MachineBasicBlock &MBB,
121      MachineBasicBlock::iterator InsertPt, unsigned NumBytes) const;
122  bool insertCSRSpillsInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
123      const HexagonRegisterInfo &HRI, bool &PrologueStubs) const;
124  bool insertCSRRestoresInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
125      const HexagonRegisterInfo &HRI) const;
126  void updateEntryPaths(MachineFunction &MF, MachineBasicBlock &SaveB) const;
127  bool updateExitPaths(MachineBasicBlock &MBB, MachineBasicBlock &RestoreB,
128      BitVector &DoneT, BitVector &DoneF, BitVector &Path) const;
129  void insertCFIInstructionsAt(MachineBasicBlock &MBB,
130      MachineBasicBlock::iterator At) const;
131
132  void adjustForCalleeSavedRegsSpillCall(MachineFunction &MF) const;
133
134  bool expandCopy(MachineBasicBlock &B, MachineBasicBlock::iterator It,
135      MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
136      SmallVectorImpl<unsigned> &NewRegs) const;
137  bool expandStoreInt(MachineBasicBlock &B, MachineBasicBlock::iterator It,
138      MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
139      SmallVectorImpl<unsigned> &NewRegs) const;
140  bool expandLoadInt(MachineBasicBlock &B, MachineBasicBlock::iterator It,
141      MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
142      SmallVectorImpl<unsigned> &NewRegs) const;
143  bool expandStoreVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It,
144      MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
145      SmallVectorImpl<unsigned> &NewRegs) const;
146  bool expandLoadVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It,
147      MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
148      SmallVectorImpl<unsigned> &NewRegs) const;
149  bool expandStoreVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It,
150      MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
151      SmallVectorImpl<unsigned> &NewRegs) const;
152  bool expandLoadVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It,
153      MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
154      SmallVectorImpl<unsigned> &NewRegs) const;
155  bool expandStoreVec(MachineBasicBlock &B, MachineBasicBlock::iterator It,
156      MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
157      SmallVectorImpl<unsigned> &NewRegs) const;
158  bool expandLoadVec(MachineBasicBlock &B, MachineBasicBlock::iterator It,
159      MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
160      SmallVectorImpl<unsigned> &NewRegs) const;
161  bool expandSpillMacros(MachineFunction &MF,
162      SmallVectorImpl<unsigned> &NewRegs) const;
163
164  unsigned findPhysReg(MachineFunction &MF, HexagonBlockRanges::IndexRange &FIR,
165      HexagonBlockRanges::InstrIndexMap &IndexMap,
166      HexagonBlockRanges::RegToRangeMap &DeadMap,
167      const TargetRegisterClass *RC) const;
168  void optimizeSpillSlots(MachineFunction &MF,
169      SmallVectorImpl<unsigned> &VRegs) const;
170
171  void findShrunkPrologEpilog(MachineFunction &MF, MachineBasicBlock *&PrologB,
172      MachineBasicBlock *&EpilogB) const;
173
174  void addCalleeSaveRegistersAsImpOperand(MachineInstr *MI, const CSIVect &CSI,
175      bool IsDef, bool IsKill) const;
176  bool shouldInlineCSR(const MachineFunction &MF, const CSIVect &CSI) const;
177  bool useSpillFunction(const MachineFunction &MF, const CSIVect &CSI) const;
178  bool useRestoreFunction(const MachineFunction &MF, const CSIVect &CSI) const;
179  bool mayOverflowFrameOffset(MachineFunction &MF) const;
180};
181
182} // end namespace llvm
183
184#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
185