1/*	$NetBSD: membar_ops.S,v 1.13 2022/04/21 12:06:31 riastradh Exp $	*/
2
3/*-
4 * Copyright (c) 2006, 2007 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe, and by Andrew Doran.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include "atomic_op_asm.h"
33
34	.text
35	.set noreorder
36
37LEAF(_membar_sync)
38	j	ra
39	 BDSYNC
40END(_membar_sync)
41ATOMIC_OP_ALIAS(membar_sync,_membar_sync)
42
43STRONG_ALIAS(_membar_enter,_membar_sync)
44ATOMIC_OP_ALIAS(membar_enter,_membar_sync)
45
46#ifdef __OCTEON__
47
48/*
49 * cnMIPS guarantees load-before-load/store ordering without any
50 * barriers.  So the only barriers we need are store-before-load (sync)
51 * and store-before-store (syncw, i.e., sync 4).  See Table 2-32
52 * `Execution Ordering Rules' on p. 104 of Cavium OCTEON III CN78XX
53 * Hardware Reference Manual, CN78XX-HM-0.99E, September 2014:
54 *
55 *	First Operation		DLD [load instruction to a physical
56 *				address that is L2/DRAM]
57 *	Second Operation	Any
58 *	Execution Ordering Comments
59 *
60 *		The second operation cannot appear to execute before
61 *		the first (DLD) operation, regardless of the presence
62 *		or absence of SYNC* instructions.
63 *
64 * Note: I'm not sure if this applies to earlier cnMIPS -- can't find
65 * it in the Cavium Networks OCTEON Plus CN50XX Hardware Reference
66 * Manual CN50XX-HM-0.99E, July 2008.  Experimentally, on an erlite3
67 * (Cavium Octeon CN5020-500), I can easily detect reordering of
68 * store-before-store and store-before-load, but I haven't been able to
69 * detect any reordering of load-before-load or load-before-store.
70 *
71 * Note: On early cnMIPS (CN3xxx), there is an erratum which sometimes
72 * requires issuing two syncw's in a row.  I don't know the details --
73 * don't have documentation -- and in Linux it is only used for I/O
74 * purposes.
75 *
76 * Currently we don't build kernels that work on both Octeon and
77 * non-Octeon MIPS CPUs, so none of this is done with binary patching.
78 * For userlands we could use a separate shared library on Octeon with
79 * ld.so.conf to override the symbols with cheaper definitions, but we
80 * don't do that now.
81 */
82
83LEAF(_membar_acquire)
84	j	ra
85	 nop
86END(_membar_acquire)
87ATOMIC_OP_ALIAS(membar_acquire,_membar_acquire)
88
89STRONG_ALIAS(_membar_consumer,_membar_acquire)
90ATOMIC_OP_ALIAS(membar_consumer,_membar_acquire)
91
92LEAF(_membar_release)
93	j	ra
94	 syncw
95END(_membar_release)
96ATOMIC_OP_ALIAS(membar_release,_membar_release)
97
98STRONG_ALIAS(_membar_exit,_membar_release)
99ATOMIC_OP_ALIAS(membar_exit,_membar_release)
100
101STRONG_ALIAS(_membar_producer,_membar_release)
102ATOMIC_OP_ALIAS(membar_producer,_membar_release)
103
104#else  /* !__OCTEON__ */
105
106STRONG_ALIAS(_membar_acquire,_membar_sync)
107ATOMIC_OP_ALIAS(membar_acquire,_membar_sync)
108STRONG_ALIAS(_membar_release,_membar_sync)
109ATOMIC_OP_ALIAS(membar_release,_membar_sync)
110STRONG_ALIAS(_membar_exit,_membar_sync)
111ATOMIC_OP_ALIAS(membar_exit,_membar_sync)
112STRONG_ALIAS(_membar_consumer,_membar_sync)
113ATOMIC_OP_ALIAS(membar_consumer,_membar_sync)
114STRONG_ALIAS(_membar_producer,_membar_sync)
115ATOMIC_OP_ALIAS(membar_producer,_membar_sync)
116
117#endif
118