1/* $NetBSD: if_ie_vme.c,v 1.29 2011/02/01 19:36:24 chuck Exp $ */ 2 3/* 4 * Copyright (c) 1995 Charles D. Cranor 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28/* 29 * Converted to SUN ie driver by Charles D. Cranor, 30 * October 1994, January 1995. 31 */ 32 33/* 34 * The i82586 is a very painful chip, found in sun3's, sun-4/100's 35 * sun-4/200's, and VME based suns. The byte order is all wrong for a 36 * SUN, making life difficult. Programming this chip is mostly the same, 37 * but certain details differ from system to system. This driver is 38 * written so that different "ie" interfaces can be controled by the same 39 * driver. 40 */ 41 42/* 43 * programming notes: 44 * 45 * the ie chip operates in a 24 bit address space. 46 * 47 * most ie interfaces appear to be divided into two parts: 48 * - generic 586 stuff 49 * - board specific 50 * 51 * generic: 52 * the generic stuff of the ie chip is all done with data structures 53 * that live in the chip's memory address space. the chip expects 54 * its main data structure (the sys conf ptr -- SCP) to be at a fixed 55 * address in its 24 bit space: 0xfffff4 56 * 57 * the SCP points to another structure called the ISCP. 58 * the ISCP points to another structure called the SCB. 59 * the SCB has a status field, a linked list of "commands", and 60 * a linked list of "receive buffers". these are data structures that 61 * live in memory, not registers. 62 * 63 * board: 64 * to get the chip to do anything, you first put a command in the 65 * command data structure list. then you have to signal "attention" 66 * to the chip to get it to look at the command. how you 67 * signal attention depends on what board you have... on PC's 68 * there is an i/o port number to do this, on sun's there is a 69 * register bit you toggle. 70 * 71 * to get data from the chip you program it to interrupt... 72 * 73 * 74 * sun issues: 75 * 76 * there are 3 kinds of sun "ie" interfaces: 77 * 1 - a VME/multibus card 78 * 2 - an on-board interface (sun3's, sun-4/100's, and sun-4/200's) 79 * 3 - another VME board called the 3E 80 * 81 * the VME boards lives in vme16 space. only 16 and 8 bit accesses 82 * are allowed, so functions that copy data must be aware of this. 83 * 84 * the chip is an intel chip. this means that the byte order 85 * on all the "short"s in the chip's data structures is wrong. 86 * so, constants described in the intel docs are swapped for the sun. 87 * that means that any buffer pointers you give the chip must be 88 * swapped to intel format. yuck. 89 * 90 * VME/multibus interface: 91 * for the multibus interface the board ignores the top 4 bits 92 * of the chip address. the multibus interface has its own 93 * MMU like page map (without protections or valid bits, etc). 94 * there are 256 pages of physical memory on the board (each page 95 * is 1024 bytes). There are 1024 slots in the page map. so, 96 * a 1024 byte page takes up 10 bits of address for the offset, 97 * and if there are 1024 slots in the page that is another 10 bits 98 * of the address. That makes a 20 bit address, and as stated 99 * earlier the board ignores the top 4 bits, so that accounts 100 * for all 24 bits of address. 101 * 102 * Note that the last entry of the page map maps the top of the 103 * 24 bit address space and that the SCP is supposed to be at 104 * 0xfffff4 (taking into account allignment). so, 105 * for multibus, that entry in the page map has to be used for the SCP. 106 * 107 * The page map effects BOTH how the ie chip sees the 108 * memory, and how the host sees it. 109 * 110 * The page map is part of the "register" area of the board 111 * 112 * The page map to control where ram appears in the address space. 113 * We choose to have RAM start at 0 in the 24 bit address space. 114 * 115 * to get the phyiscal address of the board's RAM you must take the 116 * top 12 bits of the physical address of the register address and 117 * or in the 4 bits from the status word as bits 17-20 (remember that 118 * the board ignores the chip's top 4 address lines). For example: 119 * if the register is @ 0xffe88000, then the top 12 bits are 0xffe00000. 120 * to get the 4 bits from the status word just do status & IEVME_HADDR. 121 * suppose the value is "4". Then just shift it left 16 bits to get 122 * it into bits 17-20 (e.g. 0x40000). Then or it to get the 123 * address of RAM (in our example: 0xffe40000). see the attach routine! 124 * 125 * 126 * on-board interface: 127 * 128 * on the onboard ie interface the 24 bit address space is hardwired 129 * to be 0xff000000 -> 0xffffffff of KVA. this means that sc_iobase 130 * will be 0xff000000. sc_maddr will be where ever we allocate RAM 131 * in KVA. note that since the SCP is at a fixed address it means 132 * that we have to allocate a fixed KVA for the SCP. 133 * <fill in useful info later> 134 * 135 * 136 * VME3E interface: 137 * 138 * <fill in useful info later> 139 * 140 */ 141 142#include <sys/cdefs.h> 143__KERNEL_RCSID(0, "$NetBSD: if_ie_vme.c,v 1.29 2011/02/01 19:36:24 chuck Exp $"); 144 145#include <sys/param.h> 146#include <sys/systm.h> 147#include <sys/errno.h> 148#include <sys/device.h> 149#include <sys/protosw.h> 150#include <sys/socket.h> 151 152#include <net/if.h> 153#include <net/if_types.h> 154#include <net/if_dl.h> 155#include <net/if_media.h> 156#include <net/if_ether.h> 157 158#include <sys/bus.h> 159#include <sys/intr.h> 160#include <dev/vme/vmevar.h> 161 162#include <dev/ic/i82586reg.h> 163#include <dev/ic/i82586var.h> 164 165#include "locators.h" 166 167/* 168 * VME/multibus definitions 169 */ 170#define IEVME_PAGESIZE 1024 /* bytes */ 171#define IEVME_PAGSHIFT 10 /* bits */ 172#define IEVME_NPAGES 256 /* number of pages on chip */ 173#define IEVME_MAPSZ 1024 /* number of entries in the map */ 174 175/* 176 * PTE for the page map 177 */ 178#define IEVME_SBORDR 0x8000 /* sun byte order */ 179#define IEVME_IBORDR 0x0000 /* intel byte ordr */ 180 181#define IEVME_P2MEM 0x2000 /* memory is on P2 */ 182#define IEVME_OBMEM 0x0000 /* memory is on board */ 183 184#define IEVME_PGMASK 0x0fff /* gives the physical page frame number */ 185 186struct ievme { 187 u_int16_t pgmap[IEVME_MAPSZ]; 188 u_int16_t xxx[32]; /* prom */ 189 u_int16_t status; /* see below for bits */ 190 u_int16_t xxx2; /* filler */ 191 u_int16_t pectrl; /* parity control (see below) */ 192 u_int16_t peaddr; /* low 16 bits of address */ 193}; 194 195/* 196 * status bits 197 */ 198#define IEVME_RESET 0x8000 /* reset board */ 199#define IEVME_ONAIR 0x4000 /* go out of loopback 'on-air' */ 200#define IEVME_ATTEN 0x2000 /* attention */ 201#define IEVME_IENAB 0x1000 /* interrupt enable */ 202#define IEVME_PEINT 0x0800 /* parity error interrupt enable */ 203#define IEVME_PERR 0x0200 /* parity error flag */ 204#define IEVME_INT 0x0100 /* interrupt flag */ 205#define IEVME_P2EN 0x0020 /* enable p2 bus */ 206#define IEVME_256K 0x0010 /* 256kb rams */ 207#define IEVME_HADDR 0x000f /* mask for bits 17-20 of address */ 208 209/* 210 * parity control 211 */ 212#define IEVME_PARACK 0x0100 /* parity error ack */ 213#define IEVME_PARSRC 0x0080 /* parity error source */ 214#define IEVME_PAREND 0x0040 /* which end of the data got the error */ 215#define IEVME_PARADR 0x000f /* mask to get bits 17-20 of parity address */ 216 217/* Supported media */ 218static int media[] = { 219 IFM_ETHER | IFM_10_2, 220}; 221#define NMEDIA (sizeof(media) / sizeof(media[0])) 222 223/* 224 * the 3E board not supported (yet?) 225 */ 226 227 228static void ie_vmereset(struct ie_softc *, int); 229static void ie_vmeattend(struct ie_softc *, int); 230static void ie_vmerun(struct ie_softc *); 231static int ie_vmeintr(struct ie_softc *, int); 232 233int ie_vme_match(device_t, cfdata_t, void *); 234void ie_vme_attach(device_t, device_t, void *); 235 236struct ie_vme_softc { 237 struct ie_softc ie; 238 bus_space_tag_t ievt; 239 bus_space_handle_t ievh; 240}; 241 242CFATTACH_DECL_NEW(ie_vme, sizeof(struct ie_vme_softc), 243 ie_vme_match, ie_vme_attach, NULL, NULL); 244 245#define read_iev(sc, reg) \ 246 bus_space_read_2(sc->ievt, sc->ievh, offsetof(struct ievme, reg)) 247#define write_iev(sc, reg, val) \ 248 bus_space_write_2(sc->ievt, sc->ievh, offsetof(struct ievme, reg), val) 249 250/* 251 * MULTIBUS/VME support routines 252 */ 253void 254ie_vmereset(struct ie_softc *sc, int what) 255{ 256 struct ie_vme_softc *vsc = (struct ie_vme_softc *)sc; 257 write_iev(vsc, status, IEVME_RESET); 258 delay(100); /* XXX could be shorter? */ 259 write_iev(vsc, status, 0); 260} 261 262void 263ie_vmeattend(struct ie_softc *sc, int why) 264{ 265 struct ie_vme_softc *vsc = (struct ie_vme_softc *)sc; 266 267 /* flag! */ 268 write_iev(vsc, status, read_iev(vsc, status) | IEVME_ATTEN); 269 /* down. */ 270 write_iev(vsc, status, read_iev(vsc, status) & ~IEVME_ATTEN); 271} 272 273void 274ie_vmerun(struct ie_softc *sc) 275{ 276 struct ie_vme_softc *vsc = (struct ie_vme_softc *)sc; 277 278 write_iev(vsc, status, read_iev(vsc, status) 279 | IEVME_ONAIR | IEVME_IENAB | IEVME_PEINT); 280} 281 282int 283ie_vmeintr(struct ie_softc *sc, int where) 284{ 285 struct ie_vme_softc *vsc = (struct ie_vme_softc *)sc; 286 287 if (where != INTR_ENTER) 288 return (0); 289 290 /* 291 * check for parity error 292 */ 293 if (read_iev(vsc, status) & IEVME_PERR) { 294 aprint_error_dev(sc->sc_dev, "parity error (ctrl 0x%x @ 0x%02x%04x)\n", 295 read_iev(vsc, pectrl), 296 read_iev(vsc, pectrl) & IEVME_HADDR, 297 read_iev(vsc, peaddr)); 298 write_iev(vsc, pectrl, read_iev(vsc, pectrl) | IEVME_PARACK); 299 } 300 return (0); 301} 302 303void ie_memcopyin(struct ie_softc *, void *, int, size_t); 304void ie_memcopyout(struct ie_softc *, const void *, int, size_t); 305 306/* 307 * Copy board memory to kernel. 308 */ 309void 310ie_memcopyin(struct ie_softc *sc, void *p, int offset, size_t size) 311{ 312 size_t help; 313 314 if ((offset & 1) && ((u_long)p & 1) && size > 0) { 315 *(u_int8_t *)p = bus_space_read_1(sc->bt, sc->bh, offset); 316 offset++; 317 p = (u_int8_t *)p + 1; 318 size--; 319 } 320 321 if ((offset & 1) || ((u_long)p & 1)) { 322 bus_space_read_region_1(sc->bt, sc->bh, offset, p, size); 323 return; 324 } 325 326 help = size / 2; 327 bus_space_read_region_2(sc->bt, sc->bh, offset, p, help); 328 if (2 * help == size) 329 return; 330 331 offset += 2 * help; 332 p = (u_int16_t *)p + help; 333 *(u_int8_t *)p = bus_space_read_1(sc->bt, sc->bh, offset); 334} 335 336/* 337 * Copy from kernel space to board memory. 338 */ 339void 340ie_memcopyout(struct ie_softc *sc, const void *p, int offset, size_t size) 341{ 342 size_t help; 343 344 if ((offset & 1) && ((u_long)p & 1) && size > 0) { 345 bus_space_write_1(sc->bt, sc->bh, offset, *(const u_int8_t *)p); 346 offset++; 347 p = (const u_int8_t *)p + 1; 348 size--; 349 } 350 351 if ((offset & 1) || ((u_long)p & 1)) { 352 bus_space_write_region_1(sc->bt, sc->bh, offset, p, size); 353 return; 354 } 355 356 help = size / 2; 357 bus_space_write_region_2(sc->bt, sc->bh, offset, p, help); 358 if (2 * help == size) 359 return; 360 361 offset += 2 * help; 362 p = (const u_int16_t *)p + help; 363 bus_space_write_1(sc->bt, sc->bh, offset, *(const u_int8_t *)p); 364} 365 366/* read a 16-bit value at BH offset */ 367u_int16_t ie_vme_read16(struct ie_softc *, int offset); 368/* write a 16-bit value at BH offset */ 369void ie_vme_write16(struct ie_softc *, int offset, u_int16_t value); 370void ie_vme_write24(struct ie_softc *, int offset, int addr); 371 372u_int16_t 373ie_vme_read16(struct ie_softc *sc, int offset) 374{ 375 u_int16_t v; 376 377 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ); 378 v = bus_space_read_2(sc->bt, sc->bh, offset); 379 return (((v&0xff)<<8) | ((v>>8)&0xff)); 380} 381 382void 383ie_vme_write16(struct ie_softc *sc, int offset, u_int16_t v) 384{ 385 int v0 = ((((v)&0xff)<<8) | (((v)>>8)&0xff)); 386 bus_space_write_2(sc->bt, sc->bh, offset, v0); 387 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE); 388} 389 390void 391ie_vme_write24(struct ie_softc *sc, int offset, int addr) 392{ 393 u_char *f = (u_char *)&addr; 394 u_int16_t v0, v1; 395 u_char *t; 396 397 t = (u_char *)&v0; 398 t[0] = f[3]; t[1] = f[2]; 399 bus_space_write_2(sc->bt, sc->bh, offset, v0); 400 401 t = (u_char *)&v1; 402 t[0] = f[1]; t[1] = 0; 403 bus_space_write_2(sc->bt, sc->bh, offset+2, v1); 404 405 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE); 406} 407 408int 409ie_vme_match(device_t parent, cfdata_t cf, void *aux) 410{ 411 struct vme_attach_args *va = aux; 412 vme_chipset_tag_t ct = va->va_vct; 413 vme_am_t mod; 414 int error; 415 416 if (va->numcfranges < 2) { 417 printf("ie_vme_match: need 2 ranges\n"); 418 return (0); 419 } 420 if ((va->r[1].offset & 0xff0fffff) || 421 ((va->r[0].offset & 0xfff00000) 422 != (va->r[1].offset & 0xfff00000))) { 423 printf("ie_vme_match: base address mismatch\n"); 424 return (0); 425 } 426 if (va->r[0].size != VMECF_LEN_DEFAULT && 427 va->r[0].size != sizeof(sizeof(struct ievme))) { 428 printf("ie_vme_match: bad csr size\n"); 429 return (0); 430 } 431 if (va->r[1].size == VMECF_LEN_DEFAULT) { 432 printf("ie_vme_match: must specify memory size\n"); 433 return (0); 434 } 435 436 mod = 0x3d; /* VME_AM_A24|VME_AM_MBO|VME_AM_SUPER|VME_AM_DATA */ 437 438 if (va->r[0].am != VMECF_AM_DEFAULT && 439 va->r[0].am != mod) 440 return (0); 441 442 if (vme_space_alloc(va->va_vct, va->r[0].offset, 443 sizeof(struct ievme), mod)) 444 return (0); 445 if (vme_space_alloc(va->va_vct, va->r[1].offset, 446 va->r[1].size, mod)) { 447 vme_space_free(va->va_vct, va->r[0].offset, 448 sizeof(struct ievme), mod); 449 return (0); 450 } 451 error = vme_probe(ct, va->r[0].offset, 2, mod, VME_D16, 0, 0); 452 vme_space_free(va->va_vct, va->r[0].offset, sizeof(struct ievme), mod); 453 vme_space_free(va->va_vct, va->r[1].offset, va->r[1].size, mod); 454 455 return (error == 0); 456} 457 458void 459ie_vme_attach(device_t parent, device_t self, void *aux) 460{ 461 u_int8_t myaddr[ETHER_ADDR_LEN]; 462 struct ie_vme_softc *vsc = device_private(self); 463 struct vme_attach_args *va = aux; 464 vme_chipset_tag_t ct = va->va_vct; 465 struct ie_softc *sc; 466 vme_intr_handle_t ih; 467 vme_addr_t rampaddr; 468 vme_size_t memsize; 469 vme_mapresc_t resc; 470 int lcv; 471 prop_data_t eaddrprop; 472 vme_am_t mod; 473 474 /* 475 * *note*: we don't detect the difference between a VME3E and 476 * a multibus/vme card. if you want to use a 3E you'll have 477 * to fix this. 478 */ 479 mod = 0x3d; /* VME_AM_A24|VME_AM_MBO|VME_AM_SUPER|VME_AM_DATA */ 480 if (vme_space_alloc(va->va_vct, va->r[0].offset, 481 sizeof(struct ievme), mod) || 482 vme_space_alloc(va->va_vct, va->r[1].offset, 483 va->r[1].size, mod)) 484 panic("if_ie: vme alloc"); 485 486 sc = &vsc->ie; 487 sc->sc_dev = self; 488 489 sc->hwreset = ie_vmereset; 490 sc->hwinit = ie_vmerun; 491 sc->chan_attn = ie_vmeattend; 492 sc->intrhook = ie_vmeintr; 493 sc->memcopyout = ie_memcopyout; 494 sc->memcopyin = ie_memcopyin; 495 496 sc->ie_bus_barrier = NULL; 497 sc->ie_bus_read16 = ie_vme_read16; 498 sc->ie_bus_write16 = ie_vme_write16; 499 sc->ie_bus_write24 = ie_vme_write24; 500 501 memsize = va->r[1].size; 502 503 if (vme_space_map(ct, va->r[0].offset, sizeof(struct ievme), mod, 504 VME_D16 | VME_D8, 0, 505 &vsc->ievt, &vsc->ievh, &resc) != 0) 506 panic("if_ie: vme map csr"); 507 508 rampaddr = va->r[1].offset; 509 510 /* 4 more */ 511 rampaddr = rampaddr | ((read_iev(vsc, status) & IEVME_HADDR) << 16); 512 if (vme_space_map(ct, rampaddr, memsize, mod, VME_D16 | VME_D8, 0, 513 &sc->bt, &sc->bh, &resc) != 0) 514 panic("if_ie: vme map mem"); 515 516 write_iev(vsc, pectrl, read_iev(vsc, pectrl) | IEVME_PARACK); 517 518 /* 519 * Set up mappings, direct map except for last page 520 * which is mapped at zero and at high address (for scp) 521 */ 522 for (lcv = 0; lcv < IEVME_MAPSZ - 1; lcv++) 523 write_iev(vsc, pgmap[lcv], IEVME_SBORDR | IEVME_OBMEM | lcv); 524 write_iev(vsc, pgmap[IEVME_MAPSZ - 1], IEVME_SBORDR | IEVME_OBMEM | 0); 525 526 /* Clear all ram */ 527 bus_space_set_region_2(sc->bt, sc->bh, 0, 0, memsize/2); 528 529 /* 530 * We use the first page to set up SCP, ICSP and SCB data 531 * structures. The remaining pages become the buffer area 532 * (managed in i82586.c). 533 * SCP is in double-mapped page, so the 586 can see it at 534 * the mandatory magic address (IE_SCP_ADDR). 535 */ 536 sc->scp = (IE_SCP_ADDR & (IEVME_PAGESIZE - 1)); 537 538 /* iscp at location zero */ 539 sc->iscp = 0; 540 541 /* scb follows iscp */ 542 sc->scb = IE_ISCP_SZ; 543 544 ie_vme_write16(sc, IE_ISCP_SCB((long)sc->iscp), sc->scb); 545 ie_vme_write16(sc, IE_ISCP_BASE((u_long)sc->iscp), 0); 546 ie_vme_write24(sc, IE_SCP_ISCP((u_long)sc->scp), 0); 547 548 if (i82586_proberam(sc) == 0) { 549 printf(": memory probe failed\n"); 550 return; 551 } 552 553 /* 554 * Rest of first page is unused; rest of ram for buffers. 555 */ 556 sc->buf_area = IEVME_PAGESIZE; 557 sc->buf_area_sz = memsize - IEVME_PAGESIZE; 558 559 sc->do_xmitnopchain = 0; 560 561 printf("\n%s:", device_xname(self)); 562 563 eaddrprop = prop_dictionary_get(device_properties(self), "mac-address"); 564 if (eaddrprop != NULL && prop_data_size(eaddrprop) == ETHER_ADDR_LEN) 565 memcpy(myaddr, prop_data_data_nocopy(eaddrprop), 566 ETHER_ADDR_LEN); 567 568 i82586_attach(sc, "multibus/vme", myaddr, media, NMEDIA, media[0]); 569 570 vme_intr_map(ct, va->ilevel, va->ivector, &ih); 571 vme_intr_establish(ct, ih, IPL_NET, i82586_intr, sc); 572} 573