1/*	$NetBSD: wdc_isapnp.c,v 1.38 2008/03/18 20:46:36 cube Exp $	*/
2
3/*-
4 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Onno van der Linden.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: wdc_isapnp.c,v 1.38 2008/03/18 20:46:36 cube Exp $");
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/device.h>
38#include <sys/malloc.h>
39
40#include <sys/bus.h>
41#include <sys/intr.h>
42
43#include <dev/isa/isavar.h>
44#include <dev/isa/isadmavar.h>
45
46#include <dev/isapnp/isapnpreg.h>
47#include <dev/isapnp/isapnpvar.h>
48#include <dev/isapnp/isapnpdevs.h>
49
50#include <dev/ata/atavar.h>
51#include <dev/ic/wdcreg.h>
52#include <dev/ic/wdcvar.h>
53
54struct wdc_isapnp_softc {
55	struct	wdc_softc sc_wdcdev;
56	struct	ata_channel *wdc_chanlist[1];
57	struct	ata_channel ata_channel;
58	struct	ata_queue wdc_chqueue;
59	struct	wdc_regs wdc_regs;
60	isa_chipset_tag_t sc_ic;
61	void	*sc_ih;
62	int	sc_drq;
63};
64
65static int	wdc_isapnp_probe(device_t, cfdata_t, void *);
66static void	wdc_isapnp_attach(device_t, device_t, void *);
67
68CFATTACH_DECL_NEW(wdc_isapnp, sizeof(struct wdc_isapnp_softc),
69    wdc_isapnp_probe, wdc_isapnp_attach, NULL, NULL);
70
71#ifdef notyet
72static void	wdc_isapnp_dma_setup(struct wdc_isapnp_softc *);
73static void	wdc_isapnp_dma_start(void *, void *, size_t, int);
74static void	wdc_isapnp_dma_finish(void *);
75#endif
76
77static int
78wdc_isapnp_probe(device_t parent, cfdata_t match, void *aux)
79{
80	int pri, variant;
81
82	pri = isapnp_devmatch(aux, &isapnp_wdc_devinfo, &variant);
83	if (pri && variant > 0)
84		pri = 0;
85	return (pri);
86}
87
88static void
89wdc_isapnp_attach(device_t parent, device_t self, void *aux)
90{
91	struct wdc_isapnp_softc *sc = device_private(self);
92	struct wdc_regs *wdr;
93	struct isapnp_attach_args *ipa = aux;
94	int i;
95
96	if (ipa->ipa_nio != 2 ||
97	    ipa->ipa_nmem != 0 ||
98	    ipa->ipa_nmem32 != 0 ||
99	    ipa->ipa_nirq != 1 ||
100	    ipa->ipa_ndrq > 1) {
101		aprint_error(": unexpected configuration\n");
102		return;
103	}
104
105	if (isapnp_config(ipa->ipa_iot, ipa->ipa_memt, ipa)) {
106		aprint_error(": couldn't map registers\n");
107		return;
108	}
109
110	aprint_normal(": %s %s\n", ipa->ipa_devident, ipa->ipa_devclass);
111
112	sc->sc_wdcdev.sc_atac.atac_dev = self;
113	sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
114	wdr->cmd_iot = ipa->ipa_iot;
115	wdr->ctl_iot = ipa->ipa_iot;
116	/*
117	 * An IDE controller can feed us the regions in any order. Pass
118	 * them along with the 8-byte region in sc_ad.ioh, and the other
119	 * (2 byte) region in auxioh.
120	 */
121	if (ipa->ipa_io[0].length == 8) {
122		wdr->cmd_baseioh = ipa->ipa_io[0].h;
123		wdr->ctl_ioh = ipa->ipa_io[1].h;
124	} else {
125		wdr->cmd_baseioh = ipa->ipa_io[1].h;
126		wdr->ctl_ioh = ipa->ipa_io[0].h;
127	}
128
129	for (i = 0; i < WDC_NREG; i++) {
130		if (bus_space_subregion(wdr->cmd_iot,
131		    wdr->cmd_baseioh, i, i == 0 ? 4 : 1,
132		    &wdr->cmd_iohs[i]) != 0) {
133			aprint_error(": couldn't subregion registers\n");
134			return;
135		}
136	}
137	wdr->data32iot = wdr->cmd_iot;
138	wdr->data32ioh = wdr->cmd_iohs[0];
139
140	sc->sc_ic = ipa->ipa_ic;
141	sc->sc_ih = isa_intr_establish(ipa->ipa_ic, ipa->ipa_irq[0].num,
142	    ipa->ipa_irq[0].type, IPL_BIO, wdcintr, &sc->ata_channel);
143
144#ifdef notyet
145	if (ipa->ipa_ndrq > 0) {
146		sc->sc_drq = ipa->ipa_drq[0].num;
147
148		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA;
149		sc->sc_wdcdev.dma_start = &wdc_isapnp_dma_start;
150		sc->sc_wdcdev.dma_finish = &wdc_isapnp_dma_finish;
151		wdc_isapnp_dma_setup(sc);
152	}
153#endif
154	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
155	sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
156	sc->wdc_chanlist[0] = &sc->ata_channel;
157	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist;
158	sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
159	sc->ata_channel.ch_channel = 0;
160	sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
161	sc->ata_channel.ch_queue = &sc->wdc_chqueue;
162	sc->ata_channel.ch_ndrive = 2;
163
164	wdc_init_shadow_regs(&sc->ata_channel);
165
166	wdcattach(&sc->ata_channel);
167}
168
169#ifdef notyet
170static void
171wdc_isapnp_dma_setup(struct wdc_isapnp_softc *sc)
172{
173
174	if (isa_dmamap_create(sc->sc_ic, sc->sc_drq,
175	    MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
176		aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev,
177		    "can't create map for drq %d\n", sc->sc_drq);
178		sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA;
179	}
180}
181
182static void
183wdc_isapnp_dma_start(void *scv, void *buf, size_t size, int read)
184{
185	struct wdc_isapnp_softc *sc = scv;
186
187	isa_dmastart(sc->sc_ic, sc->sc_drq, buf, size, NULL,
188	    (read ? DMAMODE_READ : DMAMODE_WRITE) | DMAMODE_DEMAND,
189	    BUS_DMA_NOWAIT);
190}
191
192static void
193wdc_isapnp_dma_finish(void *scv)
194{
195	struct wdc_isapnp_softc *sc = scv;
196
197	isa_dmadone(sc->sc_ic, sc->sc_drq);
198}
199#endif
200