1/* $NetBSD$ */ 2 3/* 4 * Copyright (c) 1999 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#ifndef _DEV_IC_UNIVERSEREG_H_ 30#define _DEV_IC_UNIVERSEREG_H_ 31 32/* 33 * Register layout of the Newbridge/Tundra Universe II PCI-VME 34 * adapter chip (CA91C142). Looks the same from PCI and VME. 35 */ 36 37struct universe_pcislvimg { 38 u_int32_t lsi_ctl, lsi_bs, lsi_bd, lsi_to; 39}; 40 41struct universe_vmeslvimg { 42 u_int32_t vsi_ctl, vsi_bs, vsi_bd, vsi_to; 43}; 44 45struct universereg { 46 u_int32_t pci_id, pci_csr, pci_class, pci_misc0, pci_bs0, pci_bs1; 47 u_int32_t _space1[9]; 48 u_int32_t pci_misc1; 49 u_int32_t _space2[(0x100-0x40)/4]; 50 struct universe_pcislvimg pcislv0; 51 u_int32_t _space3; 52 struct universe_pcislvimg pcislv1; 53 u_int32_t _space4; 54 struct universe_pcislvimg pcislv2; 55 u_int32_t _space5; 56 struct universe_pcislvimg pcislv3; 57 u_int32_t _space6[(0x170-0x14c)/4]; 58 u_int32_t scyc_ctl, scyc_addr, scyc_en, scyc_cmp, scyc_swp; 59 u_int32_t lmisc; 60 u_int32_t slsi; 61 u_int32_t l_cmderr, laerr; 62 u_int32_t _space7[(0x1a0-0x194)/4]; 63 struct universe_pcislvimg pcislv4; 64 u_int32_t _space8; 65 struct universe_pcislvimg pcislv5; 66 u_int32_t _space9; 67 struct universe_pcislvimg pcislv6; 68 u_int32_t _space10; 69 struct universe_pcislvimg pcislv7; 70 u_int32_t _space11[(0x200-0x1ec)/4]; 71 u_int32_t dctl, dtbc, dla; 72 u_int32_t _space12; 73 u_int32_t dva; 74 u_int32_t _space13; 75 u_int32_t dcpp; 76 u_int32_t _space14; 77 u_int32_t dgcs, d_llue; 78 u_int32_t _space15[(0x300-0x228)/4]; 79 u_int32_t lint_en, lint_stat, lint_map0, lint_map1; 80 u_int32_t vint_en, vint_stat, vint_map0, vint_map1; 81 u_int32_t statid, v_statid[7]; 82 u_int32_t lint_map2, vint_map2; 83 u_int32_t mbox[4], sema[2]; 84 u_int32_t _space16[(0x400-0x360)/4]; 85 u_int32_t mast_ctl, misc_ctl, misc_stat, user_am; 86 u_int32_t _space17[(0xf00-0x410)/4]; 87 struct universe_vmeslvimg vmeslv0; 88 u_int32_t _space18; 89 struct universe_vmeslvimg vmeslv1; 90 u_int32_t _space19; 91 struct universe_vmeslvimg vmeslv2; 92 u_int32_t _space20; 93 struct universe_vmeslvimg vmeslv3; 94 u_int32_t _space21[(0xf64-0xf4c)/4]; 95 u_int32_t lm_ctl, lm_bs; 96 u_int32_t _space22; 97 u_int32_t vrai_ctl, vrai_bs; 98 u_int32_t _space23[(0xf80-0xf78)/4]; 99 u_int32_t vcsr_ctl, vcsr_to; 100 u_int32_t v_amerr, vaerr; 101 struct universe_vmeslvimg vmeslv4; 102 u_int32_t _space24; 103 struct universe_vmeslvimg vmeslv5; 104 u_int32_t _space25; 105 struct universe_vmeslvimg vmeslv6; 106 u_int32_t _space26; 107 struct universe_vmeslvimg vmeslv7; 108 u_int32_t _space27[(0xff0-0xfdc)/4]; 109 u_int32_t _space28; 110 u_int32_t vcsr_clr, vcsr_set, vcsr_bs; 111}; 112 113#endif /* _DEV_IC_UNIVERSEREG_H_ */ 114