1/* $NetBSD: chpidpnp.h,v 1.3 2007/10/17 19:56:49 garbled Exp $ */ 2/*- 3 * Copyright (c) 2006 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Tim Rightnour 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31/* 32 * Based on: 33 * IBM Power Personal Systems Architecture: Residual Data 34 * Document Number: PPS-AR-FW0001 Rev 0.5 April 3, 1996 35 */ 36 37#ifndef _CHPIDPNP_H_ 38#define _CHPIDPNP_H_ 39 40#define ChipID_Packet 0x70 /* tag for ChipIdPack without size */ 41 42/* the words MOT and IBM are made from these two bytes */ 43#define CHIP_VENDOR_IBM0 0x24 44#define CHIP_VENDOR_IBM1 0x4d 45#define CHIP_VENDOR_MOT0 0x35 46#define CHIP_VENDOR_MOT1 0xf4 47 48/* 49 * The chipid is the vendor id followed by 4 hex digits, e.g. for IBM 50 * platforms: Chip_ID=IBMxxxx. To avoid confusion with PnP Device IDs, IBM 51 * Chip IDs will begin at 0x8000. 52 */ 53typedef enum _Chip_Type { 54 Chip_MemCont = 0, 55 Chip_ISABridge = 1, 56 Chip_PCIBridge = 2, 57 Chip_PCMCIABridge = 3, 58 Chip_EISABridge = 4, 59 Chip_MCABridge = 5, 60 Chip_L2Cache = 6, 61 Chip_PM = 7, 62 Chip_IntrCont = 8, 63 Chip_MiscPlanar = 9, 64} Chip_Type; 65 66typedef enum _Chip_ID { 67 68/* Memory Controllers Memory Controller range: IBM80xx */ 69Dakota = 0x8001, /* IBM8001: IBM North/South Dakota */ 70Idaho = 0x8002, /* IBM8002: IBM Idaho */ 71Eagle = 0x8003, /* IBM8003: Motorola Eagle */ 72Kauai_Lanai = 0x8004, /* IBM8004: IBM Kauai/Lanai */ 73Montana_Nevada = 0x8005, /* IBM8005: IBM Montana/Nevada */ 74Union = 0x8006, /* IBM8006: IBM Union */ 75Cobra_Viper = 0x8007, /* IBM8007: IBM Cobra/Viper */ 76Grackle = 0x8008, /* IBM8008: Motorola Grackle */ 77 78/* ISA Bridge chips Bus Bridge Range: IBM81xx */ 79SIO_ZB = 0x8100, /* IBM8100: Intel 82378ZB */ 80FireCoral = 0x8101, /* IBM8101: IBM FireCoral */ 81 82/* PCI Bridge chips */ 83Python = 0x8102, /* IBM8102: IBM Python */ 84DEC21050 = 0x8103, /* IBM8103: PCI-PCI (dec 21050) */ 85IBM2782351 = 0x8106, /* IBM8106: PCI-PCI */ 86IBM2782352 = 0x8109, /* IBM8109: PCI-PCI352 */ 87 88/* PCMCIA Bridge Chips */ 89INTEL_8236SL = 0x8104, /* IBM8104: Intel 8236SL */ 90RICOH_RF5C366C = 0x8105, /* IBM8105: RICOH RF5C366C */ 91 92/* EISA Bridge Chips */ 93INTEL_82374 = 0x8108, /* IBM8108: Intel 82374/82375 */ 94 95/* MCA Bridge Chips */ 96MCACoral = 0x8107, /* IBM8107: 6xxxMx - T=1 MCA (servers) */ 97 98/* L2 Cache controller L2 Controller Range: IBM82xx */ 99Cheyenne = 0x8200, /* IBM8200: IBM Cheyenne */ 100IDT = 0x8201, /* IBM8201: IDT */ 101Sony1PB = 0x8202, /* IBM8202: Sony1PB */ 102Mamba = 0x8203, /* IBM8203: IBM Mamba */ 103Alaska = 0x8204, /* IBM8204: IBM Alaska */ 104Glance = 0x8205, /* IBM8205: IBM Glance */ 105Ocelot = 0x8206, /* IBM8206: IBM Ocelot */ 106 107/* Power management chips PM Range: IBM83xx */ 108Carrera = 0x8300, /* IBM8300: IBM Carrera */ 109Sig750 = 0x8301, /* IBM8301: Signetics 87C750 */ 110 111/* Interrupt controller chips PIC Chip range: IBM84xx */ 112MPIC_2 = 0x8400, /* IBM8400: IBM MPIC-2 */ 113 114/* Miscellaneous Planar chips MISC Chip Range: IBM8Fxx */ 115DallasRTC = 0x8F00, /* IBM8F00: Dallas 1385 compatible */ 116Dallas1585 = 0x8F01, /* IBM8F01: Dallas 1585 compatible */ 117Timer8254 = 0x8F10, /* IBM8F10: 8254-compatible timer */ 118HarddiskLt = 0x8FF0, /* IBM8FF0: Op Panel HD light */ 119MOTmk48 = 0x3040, /* MOT3040: mk48txx compatible */ 120} Chip_ID; 121 122/* small tag = 0x7n with n bytes. Type == 1 for ChipID 123 * VendorID0: 124 * bit(7) = 0 125 * bits(6:2) 1st character in compressed ASCII 126 * bits(1:0) 2nd character in compressed ASCII bits(4:3) 127 * VendorID1: 128 * bits(7:5) 2nd character in compressed ASCII bits(2:0) 129 * bits(4:0) 3rd character in compressed ASCII 130 * Name: 131 * Example: IBM8001 132 * I,B,M = 01001, 00010, 01101 133 * bytes 0,1 = 00100100,01001101 134 * = 2 4 4 D 135 * byte0 = 24 byte1 = 4D byte2 = 01 byte3 = 80 136 */ 137typedef struct _ChipIDPack { 138 unsigned char Tag; 139 unsigned char Type; 140 unsigned char VendorID0; 141 unsigned char VendorID1; 142 unsigned char Name[2]; 143} ChipIDPack; 144 145#endif /* _CHPIDPNP_H_ */ 146