1/* $NetBSD: 4xx_trap_subr.S,v 1.6 2011/01/18 01:02:53 matt Exp $ */ 2 3/* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38/* This file provides necessary handlers for 405GP CPU 39 * It should be included in locore.S after powerpc/powerpc/trap_subr.S 40 */ 41 42 .text 43 .globl _C_LABEL(pitfitwdog),_C_LABEL(pitfitwdogsize) 44 45 .align 4 46_C_LABEL(pitfitwdog): 47 sync 48 ba pitint 49 .align 4 50 sync 51 ba fitint 52 .align 4 53 sync 54 ba wdoghandler 55_C_LABEL(pitfitwdogsize) = .-_C_LABEL(pitfitwdog) 56 57pithandler: 58 rfi 59 ba . /* Protect against prefetch */ 60 61wdoghandler: 62 rfi 63 ba . /* Protect against prefetch */ 64 65#define TLBSTK 0x1000 66 .lcomm tlbstack,TLBSTK,4 67 .type tlbstack,@object 68 69 .text 70/* If an unaligned excception (0x600) and DTLB miss exception (0x1100) 71 occur at the same time, the interrupt vector offsets of the two 72 exceptions are logically OR'ed together to produce 0x1700. 73 See PPC405GP Rev D/E Errata item 51 */ 74 75 .globl _C_LABEL(errata51handler),_C_LABEL(errata51size) 76_C_LABEL(errata51handler): 77 ba 0x1100 78_C_LABEL(errata51size) = .-_C_LABEL(errata51handler) 79 80 .globl _C_LABEL(tlbdmiss4xx),_C_LABEL(tlbdm4size) 81_C_LABEL(tlbdmiss4xx): 82 ACCESS_PROLOG(CI_TLBMISSSAVE) 83 bla s4xx_miss 84_C_LABEL(tlbdm4size) = .-_C_LABEL(tlbdmiss4xx) 85 86 .globl _C_LABEL(tlbimiss4xx),_C_LABEL(tlbim4size) 87_C_LABEL(tlbimiss4xx): 88 ACCESS_PROLOG(CI_TLBMISSSAVE) 89 bla s4xx_miss 90_C_LABEL(tlbim4size) = .-_C_LABEL(tlbimiss4xx) 91 92s4xx_miss: 93 .globl _C_LABEL(pmap_tlbmiss) 94 95 /* If the kernel stack would fault, don't use it. */ 96 mfpid %r30 97 li %r31,KERNEL_PID 98 mtpid %r31 99 li %r31,-FRAMELEN 100 tlbsx. %r31,%r31,%r1 101 mtpid %r30 102 beq 1f 103 104 /* 105 * The kernel stack we want to switch to is not in the TLB. 106 * To solve this problem, we will simulate a kernel 107 * fault on the kernel stack and let the miss handler 108 * bring it in, and return from the trap handler. The 109 * processor will immediately take the original fault, 110 * which we should be able to handle with the now-valid 111 * kernel stack. 112 */ 113 114 /* Switch to tlbstack */ 115 addi %r30,%r1,-FRAMELEN 116 lis %r1,tlbstack+TLBSTK-CALLFRAMELEN@ha 117 addi %r1,%r1,tlbstack+TLBSTK-CALLFRAMELEN@l 118 stw %r30,0(%r1) 119 120 FRAME_SETUP(CI_TLBMISSSAVE) 121 122 /* Take an explicit fault at (kernelstack,pid) */ 123 lwz %r3,FRAMELEN(%r1) 124 li %r4,KERNEL_PID 125 bl _C_LABEL(pmap_tlbmiss) 126 /* 127 * We can retry the old fault or switch stacks and 128 * take it now. It's easier to retry. 129 */ 130 mr. %r3,%r3 131 beq trapexit 132 133 /* kernel stack not in the pmap? we should panic */ 134 trap 135 b trapagain 1361: 137 FRAME_SETUP(CI_TLBMISSSAVE) 138 li %r3,EXC_DTMISS 139 lwz %r4,FRAME_EXC(%r1) 140 cmpw %r3,%r4 141 lwz %r3,FRAME_DEAR(%r1) 142 beq 2f 143 lwz %r3,FRAME_SRR0(%r1) /* ITMISS case, TLB miss address in SRR0 */ 1442: 145 lwz %r4,FRAME_PID(%r1) 146 bl _C_LABEL(pmap_tlbmiss) 147 mr. %r3,%r3 148 beq trapexit 149 150 /* XXX DEBUG -- make sure we're not on tlbstack */ 151 lis %r3,tlbstack@ha 152 addi %r3,%r3,tlbstack@l 153 sub %r7,%r1,%r3 154 twllei %r7,TLBSTK 155 156 /* PTE not found, time to cause a fault */ 157 b trapagain 158