1/*	$NetBSD: scsireg.h,v 1.11 2007/03/04 06:00:26 christos Exp $	*/
2
3/*
4 * Copyright (c) 1992, 1993
5 *	The Regents of the University of California.  All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of the University nor the names of its contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * from: $Hdr: scsireg.h,v 4.300 91/06/09 06:38:12 root Rel41 $ SONY
35 *
36 *	@(#)scsireg.h	8.1 (Berkeley) 6/11/93
37 */
38
39/*
40 *	scsireg.h
41 */
42
43#ifndef __SCSIREG__
44#define __SCSIREG__ 1
45
46/*
47 *	initiator status byte bit image
48 */
49#define	INST_EP		0x80		/* End of Process */
50#define INST_WR		0x40		/* Waiting Reselection */
51#define	INST_IP		0x20		/* In Process */
52#define	INST_WAIT	0x10		/* Waiting Bus free */
53#define	INST_LB		0x8		/* Loss of BUSY */
54#define	INST_TO		0x4		/* Time Out */
55#define	INST_PRE	0x2		/* PaRameter Error */
56#define	INST_HE		0x1		/* Hard Error */
57
58#define	INSTERMASK	0x7
59
60
61/*
62 *	target status byte bit image
63 */
64#define	VENDOR		0x61
65#define	TGSTMASK	0x1e
66#define	TGST_RSVCFLCT	0x18
67#define	TGST_INTERMED	0x10
68#define	TGST_BUSY	0x8
69#define	TGST_CC		0x2
70#define	TGST_GOOD	0x0
71
72#define	TS_MAPPED_PIO	0x01		/* program I/O with map */
73#define	TS_CONTR_ON	0x02		/* contiguous transfer on */
74#define	TS_CONTR_OFF	0x04		/* contiguous transfer off */
75#define	TS_BYTE_DMA	0x08		/* DMA transfer(byte access) */
76#define	TS_LONG_DMA	0x10		/* DMA transfer(long access) */
77
78
79/*
80 *	message byte
81 */
82#define MSG_IDENT	0x80
83#define MSG_RESELEN	0x40
84#define MSG_CCOMP	0
85#define	MSG_EXTND	1
86#define MSG_SDP		2
87#define MSG_RDP		3
88#define MSG_DCNT	4
89#define MSG_IDE		5
90/*#define MSG_ABORT	6*/
91#define MSG_MREJ	7
92#define MSG_NOP		8
93#define MSG_PERROR	9
94
95
96/*
97 *	message identify byte bit image
98 */
99#define	IDT_DISCON	0x40
100#define	IDT_DRMASK	0x7
101
102
103/*
104 *	scsi command opcodes
105 */
106#define SCOP_TST	0x00
107#define SCOP_REZERO	0x01
108#define	SCOP_REWIND	0x01
109#define SCOP_RSENSE	0x03
110#define SCOP_FMT	0x04
111#define SCOP_RBLIM	0x05
112#define SCOP_SPARAM	0x06
113#define SCOP_RASBLK	0x07
114#define SCOP_READ	0x08
115#define SCOP_MOERASE	0x09
116#define SCOP_WRITE	0x0a
117#define SCOP_SEEK	0x0b
118#define	SCOP_MERASE	0x0e
119#define	SCOP_WFMARK	0x10
120#define	SCOP_SPACE	0x11
121#define SCOP_INQUIRY	0x12
122#define	SCOP_SVERIFY	0x13
123#define	SCOP_RBDATA	0x14
124#define SCOP_MSELECT	0x15
125#define	SCOP_ERASE	0x19
126#define SCOP_MSENSE	0x1a
127#define SCOP_STST	0x1b
128#define	SCOP_LOAD	0x1b
129#define SCOP_RECDIAG	0x1c
130#define SCOP_SNDDIAG	0x1d
131#define	SCOP_MEDRMV	0x1e
132#define SCOP_RCAP	0x25
133#define SCOP_EREAD	0x28
134#define SCOP_EWRITE	0x2a
135#define	SCOP_BSSRCH	0x2c
136#define	SCOP_WSSRCH	0x2d
137#define	SCOP_WRTVRFY	0x2e
138#define SCOP_VERIFY	0x2f
139#define SCOP_RDL	0x37
140#define SCOP_WBUF	0x3b
141#define SCOP_RBUF	0x3c
142#define SCOP_EJECT	0xc0
143#define SCOP_EESENSE	0xc1
144#define SCOP_READTOC	0xc1
145#define SCOP_READID	0xc2
146#define SCOP_ADP	0xc2
147#define SCOP_READQ	0xc2
148#define SCOP_BLANKS	0xc3
149#define SCOP_READHEAD	0xc3
150#define SCOP_PBSTS	0xc4
151#define SCOP_RCVDISK	0xc4
152#define SCOP_PAUSE	0xc5
153#define SCOP_PLAYTRACK	0xc6
154#define SCOP_PLAYMSF	0xc7
155#define SCOP_PLAYAUDIO	0xc8
156#define SCOP_ERASED	0xe7
157#define SCOP_RESET	0xff
158
159
160#ifdef CPU_DOUBLE
161# ifdef __mips__
162#  define	ipc_phys(x)	(void *)K0_TT0(x)
163# else
164#  define	ipc_phys(x)	(void *)((int)(x) & ~0x80000000)
165# endif
166# ifdef news3800
167#  define	splsc		spl4
168#  define	splscon		spl3
169# endif
170#endif /* CPU_DOUBLE */
171
172#ifdef CPU_SINGLE
173# define	ipc_phys(x)	(void *)(x)
174# ifdef news3400
175#  define	splsc		splbio		/* Lite2 used spl3 */
176#  define	splscon		spl2 XXX not used
177# else
178#  define	splsc		spl4
179#  define	splscon		spl3
180# endif
181#endif /* CPU_SINGLE */
182
183#define	SCSI_INTEN	1
184#define	SCSI_INTDIS	0
185
186
187/*
188 *	other definition
189 */
190#define	ON	1
191#define	OFF	0
192
193
194/*
195 *	scsi map table format
196 */
197#if defined(news3400)
198#define NSCMAP 120
199#endif
200
201#if defined(news3800)
202#define NSCMAP 129
203#endif
204
205struct sc_map {
206	volatile uint32_t	mp_offset;
207	volatile uint32_t	mp_pages;
208	volatile uint32_t	mp_addr[NSCMAP];	/* page number */
209};
210
211struct sc_chan_stat {
212	struct sc_chan_stat *wb_next;	/* wait bus channel queue */
213	struct sc_scb	*scb;		/* scsi struct address */
214	u_int		stcnt;		/* save transfer count */
215	uint8_t		*spoint;	/* save transfer point */
216	u_int		stag;		/* save tag register */
217	u_int		soffset;	/* save offset register */
218	int		chan_num;	/* channel NO. */
219	uint8_t		comflg;		/* flag for save comand pointer */
220	uint8_t		intr_flg;	/* interrupt flag. SCSI_INTEN/INTDIS */
221};
222
223struct sc_scb {
224	TAILQ_ENTRY(sc_scb) chain;
225	struct scsipi_xfer *xs;
226	int	flags;
227
228	struct sc_softc *scb_softc;
229	struct sc_map *sc_map;
230	uint8_t	*sc_cpoint;		/* pointer to buffer address */
231	u_int	sc_ctrnscnt;		/* transfer count */
232	u_int	sc_ctag;
233	u_int	sc_coffset;
234
235	uint8_t	istatus;
236	uint8_t	tstatus;
237	uint8_t	identify;
238	uint8_t	message;
239	uint8_t	msgbuf[20];
240};
241
242#define	NTARGET 8
243
244struct sc_softc {
245	device_t sc_dev;
246	struct scsipi_channel sc_channel;
247	struct scsipi_adapter sc_adapter;
248
249	TAILQ_HEAD(scb_list, sc_scb) ready_list, free_list;
250	struct sc_scb sc_scb[3 * NTARGET];
251
252	int inuse[NTARGET];
253	struct sc_map sc_map[NTARGET];
254	struct sc_chan_stat chan_stat[NTARGET];	/* SCSI channel status */
255	int sel_stat[NTARGET];			/* target select status */
256
257	int scsi_1185AQ;
258	int pad_start;
259
260	int	wbc;	/* # of channel that is waiting for scsi bus free */
261	int	wrc;	/* # of channel that is waiting for reselection */
262	struct sc_chan_stat *ip;
263			/* In progress channel. Same as ISTAT.IP */
264	int	ipc;		/* number of in progress channel. */
265	int	dma_stat;	/* OFF = DMAC is not used */
266#define SC_DMAC_RD	1
267#define SC_DMAC_WR	2
268
269	struct sc_chan_stat *wbq_actf;		/* forword active pointer */
270	struct sc_chan_stat *wbq_actl;		/* last active pointer */
271
272	uint8_t	*act_cmd_pointer;
273	uint8_t	*min_point[NTARGET];
274	int pad_cnt[NTARGET];
275	int8_t min_cnt[NTARGET];
276	uint8_t sync_tr[NTARGET];			/* sync/async flag */
277	uint8_t mout_flag[NTARGET];
278	uint8_t perr_flag[NTARGET];
279	uint8_t int_stat1;
280	uint8_t int_stat2;
281	int min_flag;
282	int lastcmd;
283};
284
285/*
286 * sel_stat values
287 */
288#define	SEL_WAIT	0
289#define	SEL_START	1
290#define	SEL_TIMEOUT	2
291#define	SEL_ARBF	3
292#define	SEL_SUCCESS	4
293#define	SEL_RSLD	5
294#define	SEL_RSL_WAIT	6
295
296/*
297 * mout_flag values
298 */
299#define MOUT_IDENTIFY	1
300#define MOUT_SYNC_TR	2
301
302
303struct scintsw {
304/*00*/	int	(*sci_inthandler)(int);	/* pointer to interrupt handler */
305/*04*/	int	sci_ctlr;		/* controller number */
306/*08*/
307};
308
309#endif /* !__SCSIREG__ */
310