1/*	$NetBSD: arpci.c,v 1.1 2011/07/07 05:06:44 matt Exp $	*/
2/*-
3 * Copyright (c) 2011 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas of 3am Software Foundry.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
32
33__KERNEL_RCSID(0, "$NetBSD: arpci.c,v 1.1 2011/07/07 05:06:44 matt Exp $");
34
35#include <sys/param.h>
36#include <sys/bus.h>
37#include <sys/device.h>
38
39#include <dev/pci/pcivar.h>
40
41#include <mips/atheros/include/arbusvar.h>
42#include <mips/atheros/include/ar9344reg.h>
43
44#define	PCI_CMD_CFG_READ	0xa
45#define	PCI_CMD_CFG_WRITE	0xb
46
47struct arpci_softc {
48	device_t sc_dev;
49	bus_dma_tag_t sc_dmat;
50	bus_space_tag_t sc_bst;
51	bus_space_handle_t sc_bsh;
52	struct mips_bus_space sc_memt;
53	struct mips_pci_chipset sc_pc;
54	bool sc_pcie;
55	u_int sc_pba_flags;
56};
57
58static void arpci_bus_mem_init(bus_space_tag_t, void *);
59
60static void
61arpci_attach_hook(device_t parent, device_t self,
62    struct pcibus_attach_args *pba)
63{
64}
65
66static int
67arpci_bus_maxdevs(void *v, int busno)
68{
69	struct arpci_softc * const sc = v;
70
71	if (busno == 0)
72		return (sc->sc_pcie ? 1 : 22);
73
74	return 32;
75}
76
77static pcitag_t
78arpci_make_tag(void *v, int bus, int dev, int func)
79{
80	if (bus == 0 && dev == 0) {
81		/*
82		 * Local access
83		 */
84		return (func << 8);
85	}
86
87	if (bus == 0 && dev < 21) {
88		/*
89		 * Type 0 can only access 21 (32 - 11) devices starting at			 * device 0 (0 is needed for inbound transactions).
90		 * AD[11:32] encodes the idsel for the transaction
91		 *	(only one bit can be set).
92		 * AD[8:11] contains function
93		 * AD[2:7] contains the register offset.
94		 * AD[0:1] must be zero.
95		 */
96		return (1 << (dev + 11)) | (func << 8);
97	}
98
99	/*
100	 * Type 1 Confugration Transaction.
101	 */
102	return (bus << 16) | (dev << 11) | (func << 8) | 1;
103}
104
105static void
106arpci_decompose_tag(void *v, pcitag_t tag, int *busp, int *devp, int *funcp)
107{
108	if (tag & 1) {
109		if (busp)
110			*busp = (tag >> 16) & 255;
111		if (devp)
112			*devp = (tag >> 11) & 31;
113	} else {
114		if (busp)
115			*busp = 0;
116		if (devp) {
117			if (tag & ~0x7ff) {
118				*devp = ffs(tag >> 11) - 1;
119			} else {
120				*devp = 0;
121			}
122		}
123	}
124	if (funcp)
125		*funcp = (tag >> 8) & 7;
126}
127
128static pcireg_t
129arpci_conf_read(void *v, pcitag_t tag, int reg)
130{
131	struct arpci_softc * const sc = v;
132	pcireg_t rv = 0xffffffff;
133
134	if ((tag & 0x00ff0001) == 1) {
135		KASSERT(((tag >> 11) & 31) > 20);
136		/*
137		 * This was a type 0 transaction for a device > 20 which
138		 * we can't support.
139		 */
140		return rv;
141	}
142
143	tag |= reg & -4;
144
145#if 0
146	bus_space_read_4(sc->sc_bst, sc->sc_bsh, AR7100_PCI_ERROR);
147	bus_space_write_4(sc->sc_bst, sc->sc_bsh, AR7100_PCI_ERROR,
148	    bus_space_read_4(sc->sc_bst, sc->sc_bsh, AR7100_PCI_ERROR) & 3);
149#endif
150
151	bus_space_handle_t addr = sc->sc_bsh;
152	if ((tag & ~0x7fe) == 0) {
153		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
154		    AR7100_PCI_LCL_CFG_CMD, AR7100_PCI_LCL_CFG_CMD_READ | tag);
155		addr += AR7100_PCI_LCL_CFG_RDATA;
156		printf("%s: tag %#lx: ", __func__, tag);
157	} else {
158		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
159		    AR7100_PCI_CFG_ADDR, tag);
160		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
161		    AR7100_PCI_CFG_CMD, PCI_CMD_CFG_READ);
162		addr += AR7100_PCI_CFG_RDATA;
163		printf("%s: AD[0:31] 0x%08lx: ", __func__, tag);
164	}
165
166	rv = kfetch_32((void *)addr, 0xffffffff);
167	printf("%#x\n", rv);
168
169	return rv;
170}
171
172static void
173arpci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data)
174{
175	struct arpci_softc * const sc = v;
176
177	if ((tag & 0x00ff0001) == 1) {
178		KASSERT(((tag >> 11) & 31) > 20);
179		/*
180		 * This was a type 0 transaction for a device > 20 which
181		 * we can't support.
182		 */
183		return;
184	}
185
186	tag |= reg & -4;
187
188	if ((tag & ~0x7fe) == 0) {
189		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
190		    AR7100_PCI_LCL_CFG_CMD, AR7100_PCI_LCL_CFG_CMD_WRITE | tag);
191		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
192		    AR7100_PCI_LCL_CFG_WDATA, data);
193	} else {
194		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
195		    AR7100_PCI_CFG_ADDR, tag);
196		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
197		    AR7100_PCI_CFG_CMD, PCI_CMD_CFG_WRITE);
198		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
199		    AR7100_PCI_CFG_WDATA, data);
200	}
201}
202
203static int
204arpci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
205{
206	return EINVAL;
207}
208
209static const char *
210arpci_intr_string(void *v, pci_intr_handle_t ih)
211{
212	return NULL;
213}
214
215static const struct evcnt *
216arpci_intr_evcnt(void *v, pci_intr_handle_t ih)
217{
218	return NULL;
219}
220
221static void *
222arpci_intr_establish(void *v, pci_intr_handle_t ih,
223	int ipl, int (*func)(void *), void *arg)
224{
225	return NULL;
226}
227
228static void
229arpci_intr_disestablish(void *v, void *cookie)
230{
231}
232
233static void
234arpci_conf_interrupt(void *v, int bus, int dev, int func, int swiz, int *ilinep)
235{
236}
237
238static void
239arpci_chipset_init(struct arpci_softc *sc)
240{
241	pci_chipset_tag_t pc = &sc->sc_pc;
242
243	pc->pc_conf_v =			sc;
244	pc->pc_attach_hook =		arpci_attach_hook;
245	pc->pc_bus_maxdevs =		arpci_bus_maxdevs;
246	pc->pc_make_tag =		arpci_make_tag;
247	pc->pc_decompose_tag =		arpci_decompose_tag;
248	pc->pc_conf_read =		arpci_conf_read;
249	pc->pc_conf_write =		arpci_conf_write;
250
251	pc->pc_intr_v =			sc;
252	pc->pc_intr_map =		arpci_intr_map;
253	pc->pc_intr_string =		arpci_intr_string;
254	pc->pc_intr_evcnt =		arpci_intr_evcnt;
255	pc->pc_intr_establish =		arpci_intr_establish;
256	pc->pc_intr_disestablish =	arpci_intr_disestablish;
257
258	pc->pc_conf_interrupt =		arpci_conf_interrupt;
259
260#ifdef __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
261	//pc->pc_pciide_compat_intr_establish = arpci_pciide_compat_intr_establish;
262#endif
263}
264
265static int
266arpci_match(device_t parent, cfdata_t cf, void *aux)
267{
268	struct arbus_attach_args * const aa = aux;
269	bus_space_handle_t bsh;
270
271        if (strcmp(aa->aa_name, cf->cf_name) != 0)
272		return 0;
273
274	if (bus_space_map(aa->aa_bst, aa->aa_addr, aa->aa_size, 0, &bsh))
275		return 0;
276
277	bus_space_unmap(aa->aa_bst, bsh, aa->aa_size);
278
279	return 1;
280}
281
282static void
283arpci_attach(device_t parent, device_t self, void *aux)
284{
285	struct arbus_attach_args * const aa = aux;
286	struct arpci_softc * const sc = device_private(self);
287
288	sc->sc_dev = self;
289	sc->sc_bst = aa->aa_bst;
290	sc->sc_dmat = aa->aa_dmat;
291	sc->sc_pcie = (strcmp(device_cfdata(self)->cf_name, "arpcie") == 0);
292
293	if (bus_space_map(aa->aa_bst, aa->aa_addr, aa->aa_size, 0,
294		    &sc->sc_bsh)) {
295		aprint_error(": failed to map registers\n");
296		return;
297	}
298
299	aprint_normal(": PCI%s bus\n", (sc->sc_pcie ? "-Express x1" : ""));
300	arpci_bus_mem_init(&sc->sc_memt, sc);
301	arpci_chipset_init(sc);
302
303	sc->sc_pba_flags |= PCI_FLAGS_MEM_OKAY;
304
305	struct pcibus_attach_args pba;
306	memset(&pba, 0, sizeof(pba));
307
308	pba.pba_flags = sc->sc_pba_flags;
309	if (pba.pba_flags & PCI_FLAGS_MEM_OKAY)
310		pba.pba_memt = &sc->sc_memt;
311	pba.pba_dmat = aa->aa_dmat;
312	pba.pba_pc = &sc->sc_pc;
313	pba.pba_bus = 0;
314
315	config_found_ia(self, "pcibus", &pba, pcibusprint);
316}
317
318CFATTACH_DECL_NEW(arpci, sizeof(struct arpci_softc),
319    arpci_match, arpci_attach, NULL, NULL);
320CFATTACH_DECL_NEW(arpcie, sizeof(struct arpci_softc),
321    arpci_match, arpci_attach, NULL, NULL);
322
323#define CHIP			arpci
324#define CHIP_LITTLE_ENDIAN	/* defined */
325#define CHIP_MEM		/* defined */
326#define CHIP_EXTENT		/* defined */
327#define	CHIP_EX_MALLOC_SAFE(v)	true
328#define CHIP_W1_BUS_START(v)	0x10000000UL
329#define CHIP_W1_BUS_END(v)	0x16ffffffUL
330#define CHIP_W1_SYS_START(v)	CHIP_W1_BUS_START(v)
331#define CHIP_W1_SYS_END(v)	CHIP_W1_BUS_END(v)
332
333#include <mips/mips/bus_space_alignstride_chipdep.c>
334