1/* $NetBSD: viareg.h,v 1.12.36.1 2005/01/17 19:29:35 skrll Exp $ */ 2 3/*- 4 * Copyright (C) 1993 Allen K. Briggs, Chris P. Caputo, 5 * Michael L. Finch, Bradley A. Grantham, and 6 * Lawrence A. Kesteloot 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the Alice Group. 20 * 4. The names of the Alice Group or any of its members may not be used 21 * to endorse or promote products derived from this software without 22 * specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE ALICE GROUP ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE ALICE GROUP BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * 35 */ 36/* 37 38 Prototype VIA control definitions 39 40 06/04/92,22:33:57 BG Let's see what I can do. 41 42*/ 43 44 45 /* VIA1 data register A */ 46#define DA1I_vSCCWrReq 0x80 47#define DA1O_vPage2 0x40 48#define DA1I_CPU_ID1 0x40 49#define DA1O_vHeadSel 0x20 50#define DA1O_vOverlay 0x10 51#define DA1O_vSync 0x08 52#define DA1O_RESERVED2 0x04 53#define DA1O_RESERVED1 0x02 54#define DA1O_RESERVED0 0x01 55 56 /* VIA1 data register B */ 57#define DB1I_Par_Err 0x80 58#define DB1O_vSndEnb 0x80 59#define DB1O_Par_Enb 0x40 60#define DB1O_AuxIntEnb 0x40 /* 0 = enabled, 1 = disabled */ 61#define DB1O_vFDesk2 0x20 62#define DB1O_vFDesk1 0x10 63#define DB1I_vFDBInt 0x08 64#define DB1O_rTCEnb 0x04 65#define DB1O_rTCCLK 0x02 66#define DB1O_rTCData 0x01 67#define DB1I_rTCData 0x01 68 69 /* VIA2 data register A */ 70#define DA2O_v2Ram1 0x80 71#define DA2O_v2Ram0 0x40 72#define DA2I_v2IRQ0 0x40 73#define DA2I_v2IRQE 0x20 74#define DA2I_v2IRQD 0x10 75#define DA2I_v2IRQC 0x08 76#define DA2I_v2IRQB 0x04 77#define DA2I_v2IRQA 0x02 78#define DA2I_v2IRQ9 0x01 79 80 /* VIA2 data register B */ 81#define DB2O_v2VBL 0x80 82#define DB2O_Par_Test 0x80 83#define DB2I_v2SNDEXT 0x40 84#define DB2I_v2TM0A 0x20 85#define DB2I_v2TM1A 0x10 86#define DB2I_vFC3 0x08 87#define DB2O_vFC3 0x08 88#define DB2O_v2PowerOff 0x04 89#define DB2O_v2BusLk 0x02 90#define DB2O_vCDis 0x01 91#define DB2O_CEnable 0x01 92 93/* 94 * VIA1 interrupts 95 */ 96#define VIA1_T1 6 97#define VIA1_T2 5 98#define VIA1_ADBCLK 4 99#define VIA1_ADBDATA 3 100#define VIA1_ADBRDY 2 101#define VIA1_VBLNK 1 102#define VIA1_ONESEC 0 103 104/* VIA1 interrupt bits */ 105#define V1IF_IRQ 0x80 106#define V1IF_T1 (1 << VIA1_T1) 107#define V1IF_T2 (1 << VIA1_T2) 108#define V1IF_ADBCLK (1 << VIA1_ADBCLK) 109#define V1IF_ADBDATA (1 << VIA1_ADBDATA) 110#define V1IF_ADBRDY (1 << VIA1_ADBRDY) 111#define V1IF_VBLNK (1 << VIA1_VBLNK) 112#define V1IF_ONESEC (1 << VIA1_ONESEC) 113 114/* 115 * VIA2 interrupts 116 */ 117#define VIA2_T1 6 118#define VIA2_T2 5 119#define VIA2_ASC 4 120#define VIA2_SCSIIRQ 3 121#define VIA2_EXPIRQ 2 122#define VIA2_SLOTINT 1 123#define VIA2_SCSIDRQ 0 124 125/* VIA2 interrupt bits */ 126#define V2IF_IRQ 0x80 127#define V2IF_T1 (1 << VIA2_T1) 128#define V2IF_T2 (1 << VIA2_T2) 129#define V2IF_ASC (1 << VIA2_ASC) 130#define V2IF_SCSIIRQ (1 << VIA2_SCSIIRQ) 131#define V2IF_EXPIRQ (1 << VIA2_EXPIRQ) 132#define V2IF_SLOTINT (1 << VIA2_SLOTINT) 133#define V2IF_SCSIDRQ (1 << VIA2_SCSIDRQ) 134 135#define VIA1_INTS (V1IF_T1 | V1IF_ADBRDY) 136#define VIA2_INTS (V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \ 137 V2IF_SCSIDRQ) 138 139#define RBV_INTS (V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \ 140 V2IF_SCSIDRQ | V1IF_ADBRDY) 141 142#define ACR_T1LATCH 0x40 143 144extern volatile unsigned char *Via1Base; 145extern volatile unsigned char *Via2Base; /* init in VIA_Initialize */ 146#define VIA1_addr Via1Base /* at PA 0x50f00000 */ 147 148#define VIA2OFF 1 /* VIA2 addr = VIA1_addr + 0x2000 */ 149#define RBVOFF 0x13 /* RBV addr = VIA1_addr + 0x26000 */ 150#define OSSOFF 0xd /* OSS addr = VIA1_addr + 0x1A000 */ 151 152#define VIA1 0 153extern int VIA2; 154 155 /* VIA interface registers */ 156#define vBufA 0x1e00 /* register A */ 157#define vBufB 0 /* register B */ 158#define vDirA 0x0600 /* data direction register */ 159#define vDirB 0x0400 /* data direction register */ 160#define vT1C 0x0800 161#define vT1CH 0x0a00 162#define vT1L 0x0c00 163#define vT1LH 0x0e00 164#define vT2C 0x1000 165#define vT2CH 0x1200 166#define vSR 0x1400 /* shift register */ 167#define vACR 0x1600 /* aux control register */ 168#define vPCR 0x1800 /* peripheral control register */ 169#define vIFR 0x1a00 /* interrupt flag register */ 170#define vIER 0x1c00 /* interrupt enable register */ 171 172 /* RBV interface registers */ 173#define rBufB 0 /* register B */ 174#define rBufA 2 /* register A */ 175#define rIFR 0x3 /* interrupt flag register (writes?) */ 176#define rIER 0x13 /* interrupt enable register */ 177#define rMonitor 0x10 /* Monitor type */ 178#define rSlotInt 0x12 /* Slot interrupt */ 179 180 /* RBV monitor type flags and masks */ 181#define RBVDepthMask 0x07 /* Depth in bits */ 182#define RBVMonitorMask 0x38 /* Type numbers */ 183#define RBVOff 0x40 /* Monitor turned off */ 184#define RBVMonIDBWP 0x08 /* 15 inch BW portrait */ 185#define RBVMonIDRGB12 0x10 /* 12 inch color */ 186#define RBVMonIDRGB15 0x28 /* 15 inch RGB */ 187#define RBVMonIDStd 0x30 /* 12 inch BW or 13 inch color */ 188#define RBVMonIDNone 0x38 /* No monitor connected */ 189 190 /* OSS registers */ 191#define OSS_IFR 0x202 192#define OSS_PENDING_IRQ (*(volatile u_short *)(Via2Base + (OSS_IFR))) 193 194#define OSS_oRCR 0x204 195#define OSS_POWEROFF 0x80 196 197#define via_reg(v, r) (*(Via1Base+(v)*0x2000+(r))) 198#define via2_reg(r) (*(Via2Base+(r))) 199 200#define vDirA_ADBState 0x30 201 202void via_init(void); 203void via_powerdown(void); 204void via_set_modem(int); 205int add_nubus_intr(int, void (*)(void *), void *); 206void enable_nubus_intr(void); 207void via1_register_irq(int, void (*)(void *), void *); 208void via2_register_irq(int, void (*)(void *), void *); 209 210extern void (*via1itab[7])(void *); 211extern void (*via2itab[7])(void *); 212