187Sohair/* $NetBSD: fpu_arith.h,v 1.4 2005/12/11 12:17:52 christos Exp $ */ 287Sohair 387Sohair/* 487Sohair * Copyright (c) 1992, 1993 587Sohair * The Regents of the University of California. All rights reserved. 687Sohair * 787Sohair * This software was developed by the Computer Systems Engineering group 887Sohair * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 987Sohair * contributed to Berkeley. 1087Sohair * 1187Sohair * All advertising materials mentioning features or use of this software 1287Sohair * must display the following acknowledgement: 1387Sohair * This product includes software developed by the University of 1487Sohair * California, Lawrence Berkeley Laboratory. 1587Sohair * 1687Sohair * Redistribution and use in source and binary forms, with or without 1787Sohair * modification, are permitted provided that the following conditions 1887Sohair * are met: 1987Sohair * 1. Redistributions of source code must retain the above copyright 2087Sohair * notice, this list of conditions and the following disclaimer. 2187Sohair * 2. Redistributions in binary form must reproduce the above copyright 2287Sohair * notice, this list of conditions and the following disclaimer in the 2387Sohair * documentation and/or other materials provided with the distribution. 2487Sohair * 3. Neither the name of the University nor the names of its contributors 2587Sohair * may be used to endorse or promote products derived from this software 2687Sohair * without specific prior written permission. 2787Sohair * 2887Sohair * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2987Sohair * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 3087Sohair * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 3187Sohair * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 3287Sohair * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 3387Sohair * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3487Sohair * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3587Sohair * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3687Sohair * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3787Sohair * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3887Sohair * SUCH DAMAGE. 3987Sohair * 4087Sohair * @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93 4187Sohair */ 4287Sohair 4387Sohair/* 4487Sohair * Extended-precision arithmetic. 4587Sohair * 4687Sohair * We hold the notion of a `carry register', which may or may not be a 4787Sohair * machine carry bit or register. On the SPARC, it is just the machine's 4887Sohair * carry bit. 4987Sohair * 5087Sohair * In the worst case, you can compute the carry from x+y as 5187Sohair * (unsigned)(x + y) < (unsigned)x 5287Sohair * and from x+y+c as 5387Sohair * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0) 5487Sohair * for example. 5587Sohair */ 5687Sohair 5787Sohair#ifndef FPE_USE_ASM 5887Sohair 5987Sohair/* set up for extended-precision arithemtic */ 6087Sohair#define FPU_DECL_CARRY quad_t fpu_carry, fpu_tmp; 6187Sohair 6287Sohair/* 6387Sohair * We have three kinds of add: 6487Sohair * add with carry: r = x + y + c 6587Sohair * add (ignoring current carry) and set carry: c'r = x + y + 0 6687Sohair * add with carry and set carry: c'r = x + y + c 6787Sohair * The macros use `C' for `use carry' and `S' for `set carry'. 6887Sohair * Note that the state of the carry is undefined after ADDC and SUBC, 6987Sohair * so if all you have for these is `add with carry and set carry', 7087Sohair * that is OK. 7187Sohair * 7287Sohair * The same goes for subtract, except that we compute x - y - c. 73 * 74 * Finally, we have a way to get the carry into a `regular' variable, 75 * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero 76 * into carry; GET_CARRY sets its argument to 0 or 1. 77 */ 78#define FPU_ADDC(r, x, y) \ 79 (r) = (x) + (y) + (!!fpu_carry) 80#define FPU_ADDS(r, x, y) \ 81 { \ 82 fpu_tmp = (quad_t)(x) + (quad_t)(y); \ 83 (r) = (u_int)fpu_tmp; \ 84 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ 85 } 86#define FPU_ADDCS(r, x, y) \ 87 { \ 88 fpu_tmp = (quad_t)(x) + (quad_t)(y) + (!!fpu_carry); \ 89 (r) = (u_int)fpu_tmp; \ 90 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ 91 } 92#define FPU_SUBC(r, x, y) \ 93 (r) = (x) - (y) - (!!fpu_carry) 94#define FPU_SUBS(r, x, y) \ 95 { \ 96 fpu_tmp = (quad_t)(x) - (quad_t)(y); \ 97 (r) = (u_int)fpu_tmp; \ 98 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ 99 } 100#define FPU_SUBCS(r, x, y) \ 101 { \ 102 fpu_tmp = (quad_t)(x) - (quad_t)(y) - (!!fpu_carry); \ 103 (r) = (u_int)fpu_tmp; \ 104 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ 105 } 106 107#define FPU_GET_CARRY(r) (r) = (!!fpu_carry) 108#define FPU_SET_CARRY(v) fpu_carry = ((v) != 0) 109 110#else 111 112/* set up for extended-precision arithemtic */ 113#define FPU_DECL_CARRY register int fpu_tmp; 114 115/* 116 * We have three kinds of add: 117 * add with carry: r = x + y + c 118 * add (ignoring current carry) and set carry: c'r = x + y + 0 119 * add with carry and set carry: c'r = x + y + c 120 * The macros use `C' for `use carry' and `S' for `set carry'. 121 * Note that the state of the carry is undefined after ADDC and SUBC, 122 * so if all you have for these is `add with carry and set carry', 123 * that is OK. 124 * 125 * The same goes for subtract, except that we compute x - y - c. 126 * 127 * Finally, we have a way to get the carry into a `regular' variable, 128 * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero 129 * into carry; GET_CARRY sets its argument to 0 or 1. 130 */ 131#define FPU_ADDC(r, x, y) \ 132 { \ 133 __asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \ 134 __asm volatile("addxl %1,%0" : "=d"(fpu_tmp) : "d"(y)); \ 135 __asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \ 136 } 137#define FPU_ADDS(r, x, y) \ 138 { \ 139 __asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \ 140 __asm volatile("addl %1,%0" : "=d"(fpu_tmp) : "g"(y)); \ 141 __asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \ 142 } 143#define FPU_ADDCS(r, x, y) FPU_ADDC(r, x, y) 144 145#define FPU_SUBC(r, x, y) \ 146 { \ 147 __asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \ 148 __asm volatile("subxl %1,%0" : "=d"(fpu_tmp) : "d"(y)); \ 149 __asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \ 150 } 151#define FPU_SUBS(r, x, y) \ 152 { \ 153 __asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \ 154 __asm volatile("subl %1,%0" : "=d"(fpu_tmp) : "g"(y)); \ 155 __asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \ 156 } 157#define FPU_SUBCS(r, x, y) FPU_SUBC(r, x, y) 158 159#define FPU_GET_CARRY(r) \ 160 { \ 161 __asm volatile("moveq #0,%0" : "=d"(r)); \ 162 __asm volatile("addxl %0,%0" : "+d"(r)); \ 163 } 164#define FPU_SET_CARRY(v) \ 165 { \ 166 __asm volatile("moveq #0,%0" : "=d"(fpu_tmp)); \ 167 __asm volatile("subl %1,%0" : "=d"(fpu_tmp) : "g"(v)); \ 168 } 169 170#endif /* FPE_USE_ASM */ 171