1/*	$NetBSD$	*/
2
3/*-
4 * Copyright (c) 2005 NONAKA Kimihiro
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/types.h>
30
31#include <lib/libsa/stand.h>
32
33#include <sh3/tmureg.h>
34
35#include "boot.h"
36
37#ifndef	TICK_CH
38#define	TICK_CH	0
39#endif
40#if TICK_CH == 0
41#define	TSTR	SH4_TSTR
42#define	TCOR	SH4_TCOR0
43#define	TCNT	SH4_TCNT0
44#define	TCR	SH4_TCR0
45#define	TSTR_CH	TSTR_STR0
46#elif TICK_CH == 1
47#define	TSTR	SH4_TSTR
48#define	TCOR	SH4_TCOR1
49#define	TCNT	SH4_TCNT1
50#define	TCR	SH4_TCR1
51#define	TSTR_CH	TSTR_STR1
52#elif TICK_CH == 2
53#define	TSTR	SH4_TSTR
54#define	TCOR	SH4_TCOR2
55#define	TCNT	SH4_TCNT2
56#define	TCR	SH4_TCR2
57#define	TSTR_CH	TSTR_STR2
58#elif TICK_CH == 3
59#define	TSTR	SH4_TSTR2
60#define	TCOR	SH4_TCOR3
61#define	TCNT	SH4_TCNT3
62#define	TCR	SH4_TCR3
63#define	TSTR_CH	SH4_TSTR2_STR3
64#elif TICK_CH == 4
65#define	TSTR	SH4_TSTR2
66#define	TCOR	SH4_TCOR4
67#define	TCNT	SH4_TCNT4
68#define	TCR	SH4_TCR4
69#define	TSTR_CH	SH4_TSTR2_STR4
70#else
71#error	TICK_CH != [01234]
72#endif
73
74#ifndef	TICK_PRESC
75#define	TICK_PRESC	1024
76#endif
77#if TICK_PRESC == 4
78#define	TCR_TPSC	TCR_TPSC_P4
79#elif TICK_PRESC == 16
80#define	TCR_TPSC	TCR_TPSC_P16
81#elif TICK_PRESC == 64
82#define	TCR_TPSC	TCR_TPSC_P64
83#elif TICK_PRESC == 256
84#define	TCR_TPSC	TCR_TPSC_P256
85#elif TICK_PRESC == 1024
86#define	TCR_TPSC	SH4_TCR_TPSC_P1024
87#else
88#error	TICK_PRESC != 4, 16, 64, 256, 1024
89#endif
90
91#define	TICKS_PER_SEC	(PCLOCK / TICK_PRESC)
92#define	MS_PER_TICK	(1000000 / TICKS_PER_SEC)
93
94int
95tick_init(void)
96{
97
98	_reg_bclr_1(TSTR, TSTR_CH);
99	_reg_write_2(TCR, TCR_TPSC);
100	_reg_write_4(TCOR, 0xffffffff);
101	_reg_write_4(TCNT, 0xffffffff);
102	_reg_bset_1(TSTR, TSTR_CH);
103
104	return 0;
105}
106
107void
108tick_stop(void)
109{
110
111	_reg_bclr_1(TSTR, TSTR_CH);
112}
113
114uint32_t
115gettick(void)
116{
117
118	return ~(_reg_read_4(TCNT));
119}
120
121void
122delay(int ms)
123{
124	uint32_t base, now;
125
126	base = gettick();
127	for (;;) {
128		now = gettick();
129		if (((now - base) / MS_PER_TICK) > ms) {
130			break;
131		}
132	}
133}
134