1/* $NetBSD: gcscpcib_pci.c,v 1.1 2011/08/27 12:47:49 bouyer Exp $ */
2/* $OpenBSD: gcscpcib.c,v 1.6 2007/11/17 17:02:47 mbalmer Exp $	*/
3
4/*
5 * Copyright (c) 2008 Yojiro UO <yuo@nui.org>
6 * Copyright (c) 2007 Marc Balmer <mbalmer@openbsd.org>
7 * Copyright (c) 2007 Michael Shalayeff
8 * All rights reserved.
9 *
10 * Permission to use, copy, modify, and distribute this software for any
11 * purpose with or without fee is hereby granted, provided that the above
12 * copyright notice and this permission notice appear in all copies.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18 * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
19 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
20 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 */
22
23/*
24 * AMD CS5535/CS5536 series LPC bridge also containing timer, watchdog and GPIO.
25 * machine-dependent attachement.
26 */
27#include <sys/cdefs.h>
28__KERNEL_RCSID(0, "$NetBSD: gcscpcib_pci.c,v 1.1 2011/08/27 12:47:49 bouyer Exp $");
29
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/device.h>
34#include <sys/gpio.h>
35#include <sys/timetc.h>
36#include <sys/wdog.h>
37
38#include <sys/bus.h>
39
40#include <dev/pci/pcireg.h>
41#include <dev/pci/pcivar.h>
42#include <dev/pci/pcidevs.h>
43
44#include <dev/gpio/gpiovar.h>
45#include <dev/sysmon/sysmonvar.h>
46#include <dev/ic/gcscpcibreg.h>
47#include <dev/ic/gcscpcibvar.h>
48
49#include <machine/cpufunc.h>
50#include <x86/pci/pcibvar.h>
51
52struct gcscpcib_pci_softc {
53        /* we call pcibattach() which assumes softc starts like this: */
54	struct pcib_softc       sc_pcib;
55	/* MI gcscpcib datas */
56	struct gcscpcib_softc	sc_gcscpcib;
57};
58
59static int      gcscpcib_pci_match(device_t, cfdata_t, void *);
60static void     gcscpcib_pci_attach(device_t, device_t, void *);
61
62CFATTACH_DECL_NEW(gcscpcib_pci, sizeof(struct gcscpcib_pci_softc),
63        gcscpcib_pci_match, gcscpcib_pci_attach, NULL, NULL);
64
65
66static int
67gcscpcib_pci_match(device_t parent, cfdata_t match, void *aux)
68{
69	struct pci_attach_args *pa = aux;
70
71	if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE ||
72	    PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
73		return 0;
74
75	switch (PCI_PRODUCT(pa->pa_id)) {
76	case PCI_PRODUCT_NS_CS5535_ISA:
77	case PCI_PRODUCT_AMD_CS5536_PCIB:
78		return 2;	/* supersede pcib(4) */
79	}
80
81	return 0;
82}
83
84static void
85gcscpcib_pci_attach(device_t parent, device_t self, void *aux)
86{
87	struct gcscpcib_pci_softc *sc = device_private(self);
88	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
89
90	sc->sc_pcib.sc_pc = pa->pa_pc;
91	sc->sc_pcib.sc_tag = pa->pa_tag;
92	/* Attach the PCI-ISA bridge at first */
93	pcibattach(parent, self, aux);
94	/* then attach gcscpcib itself */
95	gcscpcib_attach(self, &sc->sc_gcscpcib, pa->pa_iot, 0);
96}
97
98uint64_t
99gcsc_rdmsr(uint msr)
100{
101	return rdmsr(msr);
102}
103
104void
105gcsc_wrmsr(uint msr, uint64_t v)
106{
107	wrmsr(msr, v);
108}
109