1/*	$NetBSD: interrupt.c,v 1.3 2011/03/10 17:22:51 tsutsui Exp $	*/
2
3/*-
4 * Copyright (c) 2010 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code was written by Alessandro Forin and Neil Pittman
8 * at Microsoft Research and contributed to The NetBSD Foundation
9 * by Microsoft Corporation.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.3 2011/03/10 17:22:51 tsutsui Exp $");
35
36#include <sys/param.h>
37#include <sys/device.h>
38#include <sys/proc.h>
39
40#include <uvm/uvm_extern.h>
41
42#include <mips/psl.h>
43
44#include <machine/locore.h>
45#include <machine/autoconf.h>
46#include <machine/sysconf.h>
47#include <machine/intr.h>
48#include <machine/emipsreg.h>
49
50struct intrhand		 intrtab[MAX_DEV_NCOOKIES];
51
52struct evcnt emips_clock_evcnt =
53    EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "clock", "intr");
54struct evcnt emips_fpu_evcnt =
55    EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "fpu", "intr");
56struct evcnt emips_memerr_evcnt =
57    EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "memerr", "intr");
58
59static const char * const intrnames[MAX_DEV_NCOOKIES] = {
60	"int-0", "int-1", "int-2", "int-3", "int-4",
61	"int-5", "int-6", "int-7", "int-8", "int-9",
62	"int-10", "int-11", "int-12", "int-13", "int-14",
63	"int-15", "int-16", "int-17", "int-18", "int-19",
64	"int-20", "int-21`", "int-22", "int-23", "int-24",
65	"int-25", "int-26", "int-27", "int-28", "int-29",
66	"int-30", "int-31"
67};
68
69void
70intr_init(void)
71{
72	int i;
73
74	for (i = 0; i < MAX_DEV_NCOOKIES; i++) {
75		evcnt_attach_dynamic(&intrtab[i].ih_count,
76		    EVCNT_TYPE_INTR, NULL, "emips", intrnames[i]);
77	}
78
79	/* I am trying to make this standard so its here. Bah. */
80	struct tlbmask tlb;
81
82	/* This is ugly but efficient. Sigh. */
83#define TheAic ((struct _Aic *)INTERRUPT_CONTROLLER_DEFAULT_ADDRESS)
84
85	tlb.tlb_hi = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS;
86	tlb.tlb_lo0 = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02;
87	tlb_write_indexed(4, &tlb);
88
89	tlb.tlb_hi = TIMER_DEFAULT_ADDRESS;
90	tlb.tlb_lo0 = TIMER_DEFAULT_ADDRESS | 0xf02;
91	tlb_write_indexed(5, &tlb);
92}
93
94/*
95 * emips uses one line for all I/O interrupts (0x8000).
96 */
97void
98cpu_intr(int ppl, uint32_t status, vaddr_t pc)
99{
100	uint32_t ipending;
101	int ipl;
102
103	curcpu()->ci_data.cpu_nintr++;
104
105	while (ppl < (ipl = splintr(&ipending))) {
106		splx(ipl);
107		/* device interrupts */
108		if (ipending & MIPS_INT_MASK_5) {
109			(*platform.iointr)(status, pc, ipending);
110		}
111		(void)splhigh();
112	}
113}
114
115/*
116 * Interrupt dispatcher for standard AIC-style interrupt controller
117 */
118void
119emips_aic_intr(uint32_t status, vaddr_t pc, uint32_t ipending)
120{
121	struct clockframe cf;
122
123	cf.pc = pc;
124	cf.sr = status;
125	cf.intr = (curcpu()->ci_idepth > 1);
126
127	ipending = TheAic->IrqStatus;
128
129	while (ipending) {
130		/* Take one (most likely, the only one) */
131		int index = ffs(ipending) - 1;
132		ipending &= ~(1 << index);
133
134		intrtab[index].ih_count.ev_count++;
135		(*intrtab[index].ih_func)(intrtab[index].ih_arg, &cf);
136	}
137}
138
139
140void
141emips_intr_establish(struct device *dev, void *cookie, int level,
142	int (*handler) (void *, void *), void *arg)
143{
144	int index = (int) cookie;
145
146	/*
147	 * First disable that interrupt source, in case it was enabled.
148	 * This prevents us from getting very confused with ISRs and arguments.
149	 */
150	TheAic->IrqEnableClear = 1 << index;
151
152	/* Second, the argument & isr.  */
153	intrtab[index].ih_func = handler;
154	intrtab[index].ih_arg = arg;
155
156	/* Third, enable and done.  */
157	TheAic->IrqEnable = 1 << index;
158}
159