1/* $NetBSD: pxa2x0_intr.h,v 1.11 2008/04/27 18:58:45 matt Exp $ */ 2 3/* Derived from i80321_intr.h */ 4 5/* 6 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 7 * All rights reserved. 8 * 9 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed for the NetBSD Project by 22 * Wasabi Systems, Inc. 23 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 24 * or promote products derived from this software without specific prior 25 * written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40#ifndef _PXA2X0_INTR_H_ 41#define _PXA2X0_INTR_H_ 42 43#define ARM_IRQ_HANDLER _C_LABEL(pxa2x0_irq_handler) 44 45#ifndef _LOCORE 46 47#include <arm/cpu.h> 48#include <arm/armreg.h> 49#include <arm/cpufunc.h> 50#include <machine/intr.h> 51 52#include <arm/xscale/pxa2x0reg.h> 53 54vaddr_t pxaic_base; /* Shared with pxa2x0_irq.S */ 55#define read_icu(offset) (*(volatile uint32_t *)(pxaic_base + (offset))) 56#define write_icu(offset,value) \ 57 (*(volatile uint32_t *)(pxaic_base + (offset)) = (value)) 58 59extern volatile int intr_mask; 60extern int pxa2x0_imask[]; 61 62#ifdef __PROG32 63 64/* 65 * Cotulla's integrated ICU doesn't have IRQ0..7, so 66 * we map software interrupts to bit 0..3 67 */ 68static inline void 69pxa2x0_setipl(int new) 70{ 71 set_curcpl(new); 72 intr_mask = pxa2x0_imask[new]; 73 write_icu(SAIPIC_MR, intr_mask); 74} 75 76 77static inline void 78pxa2x0_splx(int new) 79{ 80 int psw; 81 82 psw = disable_interrupts(I32_bit); 83 pxa2x0_setipl(new); 84 restore_interrupts(psw); 85 86#ifdef __HAVE_FAST_SOFTINTS 87 cpu_dosoftints(); 88#endif 89} 90 91 92static inline int 93pxa2x0_splraise(int ipl) 94{ 95 int old, psw; 96 97 old = curcpl(); 98 if (ipl > old) { 99 psw = disable_interrupts(I32_bit); 100 pxa2x0_setipl(ipl); 101 restore_interrupts(psw); 102 } 103 104 return old; 105} 106 107static inline int 108pxa2x0_spllower(int ipl) 109{ 110 int old = curcpl(); 111 int psw = disable_interrupts(I32_bit); 112 113 pxa2x0_splx(ipl); 114 restore_interrupts(psw); 115 return old; 116} 117 118/* 119 * An useful function for interrupt handlers. 120 * XXX: This shouldn't be here. 121 */ 122static inline int 123find_first_bit(uint32_t bits) 124{ 125 /* 126 * Since CLZ is available only on ARMv5, this isn't portable 127 * to all ARM CPUs. This file is for PXA2[15]0 processor. 128 */ 129 return 31 - __builtin_clz(bits); 130} 131 132#endif /* __PROG32 */ 133 134int _splraise(int); 135int _spllower(int); 136void splx(int); 137void _setsoftintr(int); 138 139#if !defined(EVBARM_SPL_NOINLINE) 140 141#define splx(new) pxa2x0_splx(new) 142#define _spllower(ipl) pxa2x0_spllower(ipl) 143#define _splraise(ipl) pxa2x0_splraise(ipl) 144#define _setsoftintr(si) pxa2x0_setsoftintr(si) 145 146#endif /* !EVBARM_SPL_NOINTR */ 147 148/* 149 * This function *MUST* be called very early on in a port's 150 * initarm() function, before ANY spl*() functions are called. 151 * 152 * The parameter is the virtual address of the PXA2x0's Interrupt 153 * Controller registers. 154 */ 155void pxa2x0_intr_bootstrap(vaddr_t); 156 157void pxa2x0_irq_handler(void *); 158void *pxa2x0_intr_establish(int irqno, int level, 159 int (*func)(void *), void *cookie); 160void pxa2x0_intr_disestablish(void *cookie); 161void pxa2x0_update_intr_masks(int irqno, int level); 162 163#endif /* ! _LOCORE */ 164 165#endif /* _PXA2X0_INTR_H_ */ 166