1/*	$NetBSD$	*/
2
3/*
4 * Copyright (c) 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed for the NetBSD Project by
20 *	Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 *    or promote products derived from this software without specific prior
23 *    written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#include "assym.h"
39#include "opt_perfctrs.h"
40
41#include <machine/asm.h>
42#include <machine/cpu.h>
43#include <machine/frame.h>
44
45#include <arm/xscale/i80200reg.h>
46
47/*
48 * irq_entry:
49 *
50 *	Main entry point for the IRQ vector on i80200 CPUs.  Calls
51 *	board-specific external interrupt dispatch routine.
52 */
53
54	.text
55	.align	0
56
57.Lintr_dispatch:
58	.word	_C_LABEL(i80200_extirq_dispatch)
59
60#if defined(PERFCTRS)
61.Lpmc_dispatch:
62	.word	_C_LABEL(xscale_pmc_dispatch)
63#endif
64
65LOCK_CAS_CHECK_LOCALS
66
67AST_ALIGNMENT_FAULT_LOCALS
68
69ASENTRY_NP(irq_entry)
70	sub	lr, lr, #0x00000004	/* Adjust the lr */
71
72	PUSHFRAMEINSVC			/* Push an interrupt frame */
73	ENABLE_ALIGNMENT_FAULTS
74
75	/*
76	 * Note that we have entered the IRQ handler.  We are
77	 * in SVC mode so we cannot use the processor mode to
78	 * determine if we are in an IRQ.  Instead, we will
79	 * count each time the interrupt handler is nested.
80	 */
81	ldr	r1, [r4, #CI_INTR_DEPTH]
82	add	r1, r1, #1
83	str	r1, [r4, #CI_INTR_DEPTH]
84
85	/*
86	 * Get the interrupt status into a callee-save register.
87	 */
88	mrc	p13, 0, r5, c4, c0, 0
89
90#if defined(PERFCTRS)
91	/*
92	 * Check for PMU interrupts.
93	 * If we have one, call the routine to handle it.
94	 */
95	tst	r5, #(INTSRC_PI)
96	beq	.Lpmc_intr_return
97	mov	r1, r5
98	mov	r0, sp
99	mov	lr, pc
100	ldr	pc, .Lpmc_dispatch
101.Lpmc_intr_return:
102#endif
103
104	/*
105	 * XXX - any need to handle BMU interrupts?
106	 */
107
108	/*
109	 * Check for external IRQs.  If we have one, call the
110	 * external IRQ dispatcher.  The argument is a pointer
111	 * to the stack frame.  This function will be called with
112	 * interrupts disabled, and will return with interrupts
113	 * disabled.
114	 */
115	tst	r5, #(INTSRC_II)
116	beq	.Lextirq_return		/* no external IRQ pending */
117	ldr	r1, .Lintr_dispatch
118	mov	r0, sp
119	mov	lr, pc
120	ldr	pc, [r1]
121.Lextirq_return:
122
123	/* Decremement the nest count. */
124	ldr	r1, [r4, #CI_INTR_DEPTH]
125	sub	r1, r1, #1
126	str	r1, [r4, #CI_INTR_DEPTH]
127
128	LOCK_CAS_CHECK
129
130	DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
131	PULLFRAMEFROMSVCANDEXIT
132	movs	pc, lr			/* Exit */
133