1/* $NetBSD */
2
3/* derived from:
4   NetBSD: pxa2x0_a4x_space.c,v 1.4 2006/07/28 08:15:29 simonb Exp */
5
6/*
7 * Copyright (c) 2002, 2010, 2011 Genetec Corporation.  All rights reserved.
8 * Written by Hiroyuki Bessho for Genetec Corporation.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32/*
33 * Bus space tag for 8/16-bit devices on 16-bit bus.
34 * all registers are located at the address of multiple of 2.
35 */
36
37#include <sys/cdefs.h>
38__KERNEL_RCSID(0, "$NetBSD: mpcore_a2x_space.c,v 1.1 2011/03/10 07:47:15 bsh Exp $");
39
40#include <sys/param.h>
41#include <sys/systm.h>
42
43#include <uvm/uvm_extern.h>
44
45#include <sys/bus.h>
46
47/* Prototypes for all the bus_space structure functions */
48bs_protos(mpcore);
49bs_protos(a2x);
50bs_protos(generic);
51bs_protos(generic_armv4);
52bs_protos(bs_notimpl);
53
54struct bus_space mpcore_a2x_bs_tag = {
55	/* cookie */
56	(void *) 0,
57
58	/* mapping/unmapping */
59	mpcore_bs_map,
60	mpcore_bs_unmap,
61	mpcore_bs_subregion,
62
63	/* allocation/deallocation */
64	mpcore_bs_alloc,	/* not implemented */
65	mpcore_bs_free,		/* not implemented */
66
67	/* get kernel virtual address */
68	mpcore_bs_vaddr,
69
70	/* mmap */
71	bs_notimpl_bs_mmap,
72
73	/* barrier */
74	mpcore_bs_barrier,
75
76	/* read (single) */
77	a2x_bs_r_1,
78	a2x_bs_r_2,
79	a2x_bs_r_4,
80	bs_notimpl_bs_r_8,
81
82	/* read multiple */
83	a2x_bs_rm_1,
84	a2x_bs_rm_2,
85	bs_notimpl_bs_rm_4,
86	bs_notimpl_bs_rm_8,
87
88	/* read region */
89	bs_notimpl_bs_rr_1,
90	bs_notimpl_bs_rr_2,
91	bs_notimpl_bs_rr_4,
92	bs_notimpl_bs_rr_8,
93
94	/* write (single) */
95	a2x_bs_w_1,
96	a2x_bs_w_2,
97	a2x_bs_w_4,
98	bs_notimpl_bs_w_8,
99
100	/* write multiple */
101	a2x_bs_wm_1,
102	a2x_bs_wm_2,
103	bs_notimpl_bs_wm_4,
104	bs_notimpl_bs_wm_8,
105
106	/* write region */
107	bs_notimpl_bs_wr_1,
108	bs_notimpl_bs_wr_2,
109	bs_notimpl_bs_wr_4,
110	bs_notimpl_bs_wr_8,
111
112	/* set multiple */
113	bs_notimpl_bs_sm_1,
114	bs_notimpl_bs_sm_2,
115	bs_notimpl_bs_sm_4,
116	bs_notimpl_bs_sm_8,
117
118	/* set region */
119	bs_notimpl_bs_sr_1,
120	bs_notimpl_bs_sr_2,
121	bs_notimpl_bs_sr_4,
122	bs_notimpl_bs_sr_8,
123
124	/* copy */
125	bs_notimpl_bs_c_1,
126	bs_notimpl_bs_c_2,
127	bs_notimpl_bs_c_4,
128	bs_notimpl_bs_c_8,
129};
130