1/* $NetBSD: locore.S,v 1.24 2008/08/07 04:18:21 matt Exp $ */ 2 3/* 4 * Copyright (C) 1994-1997 Mark Brinicombe 5 * Copyright (C) 1994 Brini 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Brini. 19 * 4. The name of Brini may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34#include "assym.h" 35#include <sys/syscall.h> 36#include <sys/errno.h> 37#include <machine/asm.h> 38#include <machine/cpu.h> 39#include <machine/frame.h> 40#include <machine/param.h> 41 42/* What size should this really be ? It is only used by init_arm() */ 43#define INIT_ARM_STACK_SIZE 2048 44 45 RCSID("$NetBSD: locore.S,v 1.24 2008/08/07 04:18:21 matt Exp $") 46 47/* 48 * This is for kvm_mkdb, and should be the address of the beginning 49 * of the kernel text segment (not necessarily the same as kernbase). 50 */ 51 52 .text 53 .align 0 54 55ENTRY_NP(kernel_text) 56 57ASENTRY_NP(start) 58 adr r1, .Lstart 59 ldmia r1, {r1, r2, sp} /* Set initial stack and */ 60 sub r2, r2, r1 /* get zero init data */ 61 62#ifdef PROCESS_ID_IS_CURCPU 63 ldr r3, .Lcpu_info_store 64 mcr p15, 0, r3, c13, c0, 4 65#endif 66 67 mov r3, #0 68.L1: 69 str r3, [r1], #0x0004 /* Zero the bss */ 70 subs r2, r2, #4 71 bgt .L1 72 73 mov fp, #0x00000000 /* trace back starts here */ 74 bl _C_LABEL(initarm) /* Off we go */ 75 76 /* init arm will return the new stack pointer. */ 77 mov sp, r0 78 79 mov fp, #0x00000000 /* trace back starts here */ 80 mov ip, sp 81 stmfd sp!, {fp, ip, lr, pc} 82 sub fp, ip, #4 83 84 bl _C_LABEL(main) /* call main()! */ 85 86 adr r0, .Lmainreturned 87 b _C_LABEL(panic) 88 /* NOTREACHED */ 89 90#ifdef PROCESS_ID_IS_CURCPU 91.Lcpu_info_store: 92 .word _C_LABEL(cpu_info_store) 93#endif 94 95.Lstart: 96 .word _edata 97 .word _end 98 .word svcstk + INIT_ARM_STACK_SIZE 99 100.Lmainreturned: 101 .asciz "main() returned" 102 .align 0 103 104 .bss 105svcstk: 106 .space INIT_ARM_STACK_SIZE 107 108 .text 109 .align 0 110 111#ifndef OFW 112 /* OFW based systems will used OF_boot() */ 113 114.Lcpufuncs: 115 .word _C_LABEL(cpufuncs) 116 117ENTRY_NP(cpu_reset) 118 mrs r2, cpsr 119 bic r2, r2, #(PSR_MODE) 120 orr r2, r2, #(PSR_SVC32_MODE) 121 orr r2, r2, #(IF32_bits) 122 msr cpsr_c, r2 123 124 ldr r4, .Lcpu_reset_address 125 ldr r4, [r4] 126 127 ldr r0, .Lcpufuncs 128 mov lr, pc 129 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 130 131 /* 132 * Load the cpu_reset_needs_v4_MMU_disable flag to determine if it's 133 * necessary. 134 */ 135 136 ldr r1, .Lcpu_reset_needs_v4_MMU_disable 137 ldr r1, [r1] 138 cmp r1, #0 139 mov r2, #0 140 141 /* 142 * MMU & IDC off, 32 bit program & data space 143 * Hurl ourselves into the ROM 144 */ 145 mov r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE) 146 mcr 15, 0, r0, c1, c0, 0 147 mcrne 15, 0, r2, c8, c7, 0 /* nail I+D TLB on ARMv4 and greater */ 148 mov pc, r4 149 150 /* 151 * _cpu_reset_address contains the address to branch to, to complete 152 * the CPU reset after turning the MMU off 153 * This variable is provided by the hardware specific code 154 */ 155.Lcpu_reset_address: 156 .word _C_LABEL(cpu_reset_address) 157 158 /* 159 * cpu_reset_needs_v4_MMU_disable contains a flag that signals if the 160 * v4 MMU disable instruction needs executing... it is an illegal instruction 161 * on f.e. ARM6/7 that locks up the computer in an endless illegal 162 * instruction / data-abort / reset loop. 163 */ 164.Lcpu_reset_needs_v4_MMU_disable: 165 .word _C_LABEL(cpu_reset_needs_v4_MMU_disable) 166 167#endif /* OFW */ 168 169/* 170 * setjump + longjmp 171 */ 172ENTRY(setjmp) 173 stmia r0, {r4-r14} 174 mov r0, #0x00000000 175 mov pc, lr 176 177ENTRY(longjmp) 178 ldmia r0, {r4-r14} 179 mov r0, #0x00000001 180 mov pc, lr 181 182 .data 183 .global _C_LABEL(esym) 184_C_LABEL(esym): .word _C_LABEL(end) 185 186ENTRY_NP(abort) 187 b _C_LABEL(abort) 188 189/* 190 * Part of doing a system dump, we need to save a switchframe onto the 191 * stack, then save the rest of the registers into the dumppcb. 192 */ 193ENTRY(dumpsys) 194 /* push registers onto stack */ 195 mov ip, sp 196 stmfd sp!, {r4-r7, ip, lr} 197 198 /* fill in dumppcb */ 199 ldr r0, .Ldumppcb 200 201#ifndef __XSCALE__ 202 add r2, r0, #(PCB_R8) 203 stmia r2, {r8-r13} 204#else 205 strd r8, [r0, #(PCB_R8)] 206 strd r10, [r0, #(PCB_R10)] 207 strd r12, [r0, #(PCB_R12)] 208#endif 209 210 bl _C_LABEL(dodumpsys) 211 212 /* unwind the stack */ 213 ldmfd sp, {r4-r7, sp, pc} 214 215.Ldumppcb: 216 .word _C_LABEL(dumppcb) 217 218/* End of locore.S */ 219