1/* Convert RTL to assembler code and output it, for GNU compiler. 2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 4 Free Software Foundation, Inc. 5 6This file is part of GCC. 7 8GCC is free software; you can redistribute it and/or modify it under 9the terms of the GNU General Public License as published by the Free 10Software Foundation; either version 2, or (at your option) any later 11version. 12 13GCC is distributed in the hope that it will be useful, but WITHOUT ANY 14WARRANTY; without even the implied warranty of MERCHANTABILITY or 15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16for more details. 17 18You should have received a copy of the GNU General Public License 19along with GCC; see the file COPYING. If not, write to the Free 20Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 2102110-1301, USA. */ 22 23/* This is the final pass of the compiler. 24 It looks at the rtl code for a function and outputs assembler code. 25 26 Call `final_start_function' to output the assembler code for function entry, 27 `final' to output assembler code for some RTL code, 28 `final_end_function' to output assembler code for function exit. 29 If a function is compiled in several pieces, each piece is 30 output separately with `final'. 31 32 Some optimizations are also done at this level. 33 Move instructions that were made unnecessary by good register allocation 34 are detected and omitted from the output. (Though most of these 35 are removed by the last jump pass.) 36 37 Instructions to set the condition codes are omitted when it can be 38 seen that the condition codes already had the desired values. 39 40 In some cases it is sufficient if the inherited condition codes 41 have related values, but this may require the following insn 42 (the one that tests the condition codes) to be modified. 43 44 The code for the function prologue and epilogue are generated 45 directly in assembler by the target functions function_prologue and 46 function_epilogue. Those instructions never exist as rtl. */ 47 48#include "config.h" 49#include "system.h" 50#include "coretypes.h" 51#include "tm.h" 52 53#include "tree.h" 54#include "rtl.h" 55#include "tm_p.h" 56#include "regs.h" 57#include "insn-config.h" 58#include "insn-attr.h" 59#include "recog.h" 60#include "conditions.h" 61#include "flags.h" 62#include "real.h" 63#include "hard-reg-set.h" 64#include "output.h" 65#include "except.h" 66#include "function.h" 67#include "toplev.h" 68#include "reload.h" 69#include "intl.h" 70#include "basic-block.h" 71#include "target.h" 72#include "debug.h" 73#include "expr.h" 74#include "cfglayout.h" 75#include "tree-pass.h" 76#include "timevar.h" 77#include "cgraph.h" 78#include "coverage.h" 79 80#ifdef XCOFF_DEBUGGING_INFO 81#include "xcoffout.h" /* Needed for external data 82 declarations for e.g. AIX 4.x. */ 83#endif 84 85#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) 86#include "dwarf2out.h" 87#endif 88 89#ifdef DBX_DEBUGGING_INFO 90#include "dbxout.h" 91#endif 92 93#ifdef SDB_DEBUGGING_INFO 94#include "sdbout.h" 95#endif 96 97/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a 98 null default for it to save conditionalization later. */ 99#ifndef CC_STATUS_INIT 100#define CC_STATUS_INIT 101#endif 102 103/* How to start an assembler comment. */ 104#ifndef ASM_COMMENT_START 105#define ASM_COMMENT_START ";#" 106#endif 107 108/* Is the given character a logical line separator for the assembler? */ 109#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR 110#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';') 111#endif 112 113#ifndef JUMP_TABLES_IN_TEXT_SECTION 114#define JUMP_TABLES_IN_TEXT_SECTION 0 115#endif 116 117#if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP) 118#define HAVE_READONLY_DATA_SECTION 1 119#else 120#define HAVE_READONLY_DATA_SECTION 0 121#endif 122 123/* Bitflags used by final_scan_insn. */ 124#define SEEN_BB 1 125#define SEEN_NOTE 2 126#define SEEN_EMITTED 4 127 128/* Last insn processed by final_scan_insn. */ 129static rtx debug_insn; 130rtx current_output_insn; 131 132/* Line number of last NOTE. */ 133static int last_linenum; 134 135/* Highest line number in current block. */ 136static int high_block_linenum; 137 138/* Likewise for function. */ 139static int high_function_linenum; 140 141/* Filename of last NOTE. */ 142static const char *last_filename; 143 144/* Whether to force emission of a line note before the next insn. */ 145static bool force_source_line = false; 146 147extern int length_unit_log; /* This is defined in insn-attrtab.c. */ 148 149/* Nonzero while outputting an `asm' with operands. 150 This means that inconsistencies are the user's fault, so don't die. 151 The precise value is the insn being output, to pass to error_for_asm. */ 152rtx this_is_asm_operands; 153 154/* Number of operands of this insn, for an `asm' with operands. */ 155static unsigned int insn_noperands; 156 157/* Compare optimization flag. */ 158 159static rtx last_ignored_compare = 0; 160 161/* Assign a unique number to each insn that is output. 162 This can be used to generate unique local labels. */ 163 164static int insn_counter = 0; 165 166#ifdef HAVE_cc0 167/* This variable contains machine-dependent flags (defined in tm.h) 168 set and examined by output routines 169 that describe how to interpret the condition codes properly. */ 170 171CC_STATUS cc_status; 172 173/* During output of an insn, this contains a copy of cc_status 174 from before the insn. */ 175 176CC_STATUS cc_prev_status; 177#endif 178 179/* Indexed by hardware reg number, is 1 if that register is ever 180 used in the current function. 181 182 In life_analysis, or in stupid_life_analysis, this is set 183 up to record the hard regs used explicitly. Reload adds 184 in the hard regs used for holding pseudo regs. Final uses 185 it to generate the code in the function prologue and epilogue 186 to save and restore registers as needed. */ 187 188char regs_ever_live[FIRST_PSEUDO_REGISTER]; 189 190/* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm. 191 Unlike regs_ever_live, elements of this array corresponding to 192 eliminable regs like the frame pointer are set if an asm sets them. */ 193 194char regs_asm_clobbered[FIRST_PSEUDO_REGISTER]; 195 196/* Nonzero means current function must be given a frame pointer. 197 Initialized in function.c to 0. Set only in reload1.c as per 198 the needs of the function. */ 199 200int frame_pointer_needed; 201 202/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ 203 204static int block_depth; 205 206/* Nonzero if have enabled APP processing of our assembler output. */ 207 208static int app_on; 209 210/* If we are outputting an insn sequence, this contains the sequence rtx. 211 Zero otherwise. */ 212 213rtx final_sequence; 214 215#ifdef ASSEMBLER_DIALECT 216 217/* Number of the assembler dialect to use, starting at 0. */ 218static int dialect_number; 219#endif 220 221#ifdef HAVE_conditional_execution 222/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ 223rtx current_insn_predicate; 224#endif 225 226#ifdef HAVE_ATTR_length 227static int asm_insn_count (rtx); 228#endif 229static void profile_function (FILE *); 230static void profile_after_prologue (FILE *); 231static bool notice_source_line (rtx); 232static rtx walk_alter_subreg (rtx *); 233static void output_asm_name (void); 234static void output_alternate_entry_point (FILE *, rtx); 235static tree get_mem_expr_from_op (rtx, int *); 236static void output_asm_operand_names (rtx *, int *, int); 237static void output_operand (rtx, int); 238#ifdef LEAF_REGISTERS 239static void leaf_renumber_regs (rtx); 240#endif 241#ifdef HAVE_cc0 242static int alter_cond (rtx); 243#endif 244#ifndef ADDR_VEC_ALIGN 245static int final_addr_vec_align (rtx); 246#endif 247#ifdef HAVE_ATTR_length 248static int align_fuzz (rtx, rtx, int, unsigned); 249#endif 250 251/* Initialize data in final at the beginning of a compilation. */ 252 253void 254init_final (const char *filename ATTRIBUTE_UNUSED) 255{ 256 app_on = 0; 257 final_sequence = 0; 258 259#ifdef ASSEMBLER_DIALECT 260 dialect_number = ASSEMBLER_DIALECT; 261#endif 262} 263 264/* Default target function prologue and epilogue assembler output. 265 266 If not overridden for epilogue code, then the function body itself 267 contains return instructions wherever needed. */ 268void 269default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, 270 HOST_WIDE_INT size ATTRIBUTE_UNUSED) 271{ 272} 273 274/* Default target hook that outputs nothing to a stream. */ 275void 276no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) 277{ 278} 279 280/* Enable APP processing of subsequent output. 281 Used before the output from an `asm' statement. */ 282 283void 284app_enable (void) 285{ 286 if (! app_on) 287 { 288 fputs (ASM_APP_ON, asm_out_file); 289 app_on = 1; 290 } 291} 292 293/* Disable APP processing of subsequent output. 294 Called from varasm.c before most kinds of output. */ 295 296void 297app_disable (void) 298{ 299 if (app_on) 300 { 301 fputs (ASM_APP_OFF, asm_out_file); 302 app_on = 0; 303 } 304} 305 306/* Return the number of slots filled in the current 307 delayed branch sequence (we don't count the insn needing the 308 delay slot). Zero if not in a delayed branch sequence. */ 309 310#ifdef DELAY_SLOTS 311int 312dbr_sequence_length (void) 313{ 314 if (final_sequence != 0) 315 return XVECLEN (final_sequence, 0) - 1; 316 else 317 return 0; 318} 319#endif 320 321/* The next two pages contain routines used to compute the length of an insn 322 and to shorten branches. */ 323 324/* Arrays for insn lengths, and addresses. The latter is referenced by 325 `insn_current_length'. */ 326 327static int *insn_lengths; 328 329varray_type insn_addresses_; 330 331/* Max uid for which the above arrays are valid. */ 332static int insn_lengths_max_uid; 333 334/* Address of insn being processed. Used by `insn_current_length'. */ 335int insn_current_address; 336 337/* Address of insn being processed in previous iteration. */ 338int insn_last_address; 339 340/* known invariant alignment of insn being processed. */ 341int insn_current_align; 342 343/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] 344 gives the next following alignment insn that increases the known 345 alignment, or NULL_RTX if there is no such insn. 346 For any alignment obtained this way, we can again index uid_align with 347 its uid to obtain the next following align that in turn increases the 348 alignment, till we reach NULL_RTX; the sequence obtained this way 349 for each insn we'll call the alignment chain of this insn in the following 350 comments. */ 351 352struct label_alignment 353{ 354 short alignment; 355 short max_skip; 356}; 357 358static rtx *uid_align; 359static int *uid_shuid; 360static struct label_alignment *label_align; 361 362/* Indicate that branch shortening hasn't yet been done. */ 363 364void 365init_insn_lengths (void) 366{ 367 if (uid_shuid) 368 { 369 free (uid_shuid); 370 uid_shuid = 0; 371 } 372 if (insn_lengths) 373 { 374 free (insn_lengths); 375 insn_lengths = 0; 376 insn_lengths_max_uid = 0; 377 } 378#ifdef HAVE_ATTR_length 379 INSN_ADDRESSES_FREE (); 380#endif 381 if (uid_align) 382 { 383 free (uid_align); 384 uid_align = 0; 385 } 386} 387 388/* Obtain the current length of an insn. If branch shortening has been done, 389 get its actual length. Otherwise, use FALLBACK_FN to calcualte the 390 length. */ 391static inline int 392get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED, 393 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED) 394{ 395#ifdef HAVE_ATTR_length 396 rtx body; 397 int i; 398 int length = 0; 399 400 if (insn_lengths_max_uid > INSN_UID (insn)) 401 return insn_lengths[INSN_UID (insn)]; 402 else 403 switch (GET_CODE (insn)) 404 { 405 case NOTE: 406 case BARRIER: 407 case CODE_LABEL: 408 return 0; 409 410 case CALL_INSN: 411 length = fallback_fn (insn); 412 break; 413 414 case JUMP_INSN: 415 body = PATTERN (insn); 416 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 417 { 418 /* Alignment is machine-dependent and should be handled by 419 ADDR_VEC_ALIGN. */ 420 } 421 else 422 length = fallback_fn (insn); 423 break; 424 425 case INSN: 426 body = PATTERN (insn); 427 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) 428 return 0; 429 430 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 431 length = asm_insn_count (body) * fallback_fn (insn); 432 else if (GET_CODE (body) == SEQUENCE) 433 for (i = 0; i < XVECLEN (body, 0); i++) 434 length += get_attr_length (XVECEXP (body, 0, i)); 435 else 436 length = fallback_fn (insn); 437 break; 438 439 default: 440 break; 441 } 442 443#ifdef ADJUST_INSN_LENGTH 444 ADJUST_INSN_LENGTH (insn, length); 445#endif 446 return length; 447#else /* not HAVE_ATTR_length */ 448 return 0; 449#define insn_default_length 0 450#define insn_min_length 0 451#endif /* not HAVE_ATTR_length */ 452} 453 454/* Obtain the current length of an insn. If branch shortening has been done, 455 get its actual length. Otherwise, get its maximum length. */ 456int 457get_attr_length (rtx insn) 458{ 459 return get_attr_length_1 (insn, insn_default_length); 460} 461 462/* Obtain the current length of an insn. If branch shortening has been done, 463 get its actual length. Otherwise, get its minimum length. */ 464int 465get_attr_min_length (rtx insn) 466{ 467 return get_attr_length_1 (insn, insn_min_length); 468} 469 470/* Code to handle alignment inside shorten_branches. */ 471 472/* Here is an explanation how the algorithm in align_fuzz can give 473 proper results: 474 475 Call a sequence of instructions beginning with alignment point X 476 and continuing until the next alignment point `block X'. When `X' 477 is used in an expression, it means the alignment value of the 478 alignment point. 479 480 Call the distance between the start of the first insn of block X, and 481 the end of the last insn of block X `IX', for the `inner size of X'. 482 This is clearly the sum of the instruction lengths. 483 484 Likewise with the next alignment-delimited block following X, which we 485 shall call block Y. 486 487 Call the distance between the start of the first insn of block X, and 488 the start of the first insn of block Y `OX', for the `outer size of X'. 489 490 The estimated padding is then OX - IX. 491 492 OX can be safely estimated as 493 494 if (X >= Y) 495 OX = round_up(IX, Y) 496 else 497 OX = round_up(IX, X) + Y - X 498 499 Clearly est(IX) >= real(IX), because that only depends on the 500 instruction lengths, and those being overestimated is a given. 501 502 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so 503 we needn't worry about that when thinking about OX. 504 505 When X >= Y, the alignment provided by Y adds no uncertainty factor 506 for branch ranges starting before X, so we can just round what we have. 507 But when X < Y, we don't know anything about the, so to speak, 508 `middle bits', so we have to assume the worst when aligning up from an 509 address mod X to one mod Y, which is Y - X. */ 510 511#ifndef LABEL_ALIGN 512#define LABEL_ALIGN(LABEL) align_labels_log 513#endif 514 515#ifndef LABEL_ALIGN_MAX_SKIP 516#define LABEL_ALIGN_MAX_SKIP align_labels_max_skip 517#endif 518 519#ifndef LOOP_ALIGN 520#define LOOP_ALIGN(LABEL) align_loops_log 521#endif 522 523#ifndef LOOP_ALIGN_MAX_SKIP 524#define LOOP_ALIGN_MAX_SKIP align_loops_max_skip 525#endif 526 527#ifndef LABEL_ALIGN_AFTER_BARRIER 528#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 529#endif 530 531#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 532#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0 533#endif 534 535#ifndef JUMP_ALIGN 536#define JUMP_ALIGN(LABEL) align_jumps_log 537#endif 538 539#ifndef JUMP_ALIGN_MAX_SKIP 540#define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip 541#endif 542 543#ifndef ADDR_VEC_ALIGN 544static int 545final_addr_vec_align (rtx addr_vec) 546{ 547 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); 548 549 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) 550 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; 551 return exact_log2 (align); 552 553} 554 555#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) 556#endif 557 558#ifndef INSN_LENGTH_ALIGNMENT 559#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log 560#endif 561 562#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) 563 564static int min_labelno, max_labelno; 565 566#define LABEL_TO_ALIGNMENT(LABEL) \ 567 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) 568 569#define LABEL_TO_MAX_SKIP(LABEL) \ 570 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) 571 572/* For the benefit of port specific code do this also as a function. */ 573 574int 575label_to_alignment (rtx label) 576{ 577 return LABEL_TO_ALIGNMENT (label); 578} 579 580#ifdef HAVE_ATTR_length 581/* The differences in addresses 582 between a branch and its target might grow or shrink depending on 583 the alignment the start insn of the range (the branch for a forward 584 branch or the label for a backward branch) starts out on; if these 585 differences are used naively, they can even oscillate infinitely. 586 We therefore want to compute a 'worst case' address difference that 587 is independent of the alignment the start insn of the range end 588 up on, and that is at least as large as the actual difference. 589 The function align_fuzz calculates the amount we have to add to the 590 naively computed difference, by traversing the part of the alignment 591 chain of the start insn of the range that is in front of the end insn 592 of the range, and considering for each alignment the maximum amount 593 that it might contribute to a size increase. 594 595 For casesi tables, we also want to know worst case minimum amounts of 596 address difference, in case a machine description wants to introduce 597 some common offset that is added to all offsets in a table. 598 For this purpose, align_fuzz with a growth argument of 0 computes the 599 appropriate adjustment. */ 600 601/* Compute the maximum delta by which the difference of the addresses of 602 START and END might grow / shrink due to a different address for start 603 which changes the size of alignment insns between START and END. 604 KNOWN_ALIGN_LOG is the alignment known for START. 605 GROWTH should be ~0 if the objective is to compute potential code size 606 increase, and 0 if the objective is to compute potential shrink. 607 The return value is undefined for any other value of GROWTH. */ 608 609static int 610align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) 611{ 612 int uid = INSN_UID (start); 613 rtx align_label; 614 int known_align = 1 << known_align_log; 615 int end_shuid = INSN_SHUID (end); 616 int fuzz = 0; 617 618 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) 619 { 620 int align_addr, new_align; 621 622 uid = INSN_UID (align_label); 623 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; 624 if (uid_shuid[uid] > end_shuid) 625 break; 626 known_align_log = LABEL_TO_ALIGNMENT (align_label); 627 new_align = 1 << known_align_log; 628 if (new_align < known_align) 629 continue; 630 fuzz += (-align_addr ^ growth) & (new_align - known_align); 631 known_align = new_align; 632 } 633 return fuzz; 634} 635 636/* Compute a worst-case reference address of a branch so that it 637 can be safely used in the presence of aligned labels. Since the 638 size of the branch itself is unknown, the size of the branch is 639 not included in the range. I.e. for a forward branch, the reference 640 address is the end address of the branch as known from the previous 641 branch shortening pass, minus a value to account for possible size 642 increase due to alignment. For a backward branch, it is the start 643 address of the branch as known from the current pass, plus a value 644 to account for possible size increase due to alignment. 645 NB.: Therefore, the maximum offset allowed for backward branches needs 646 to exclude the branch size. */ 647 648int 649insn_current_reference_address (rtx branch) 650{ 651 rtx dest, seq; 652 int seq_uid; 653 654 if (! INSN_ADDRESSES_SET_P ()) 655 return 0; 656 657 seq = NEXT_INSN (PREV_INSN (branch)); 658 seq_uid = INSN_UID (seq); 659 if (!JUMP_P (branch)) 660 /* This can happen for example on the PA; the objective is to know the 661 offset to address something in front of the start of the function. 662 Thus, we can treat it like a backward branch. 663 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than 664 any alignment we'd encounter, so we skip the call to align_fuzz. */ 665 return insn_current_address; 666 dest = JUMP_LABEL (branch); 667 668 /* BRANCH has no proper alignment chain set, so use SEQ. 669 BRANCH also has no INSN_SHUID. */ 670 if (INSN_SHUID (seq) < INSN_SHUID (dest)) 671 { 672 /* Forward branch. */ 673 return (insn_last_address + insn_lengths[seq_uid] 674 - align_fuzz (seq, dest, length_unit_log, ~0)); 675 } 676 else 677 { 678 /* Backward branch. */ 679 return (insn_current_address 680 + align_fuzz (dest, seq, length_unit_log, ~0)); 681 } 682} 683#endif /* HAVE_ATTR_length */ 684 685void 686compute_alignments (void) 687{ 688 int log, max_skip, max_log; 689 basic_block bb; 690 691 if (label_align) 692 { 693 free (label_align); 694 label_align = 0; 695 } 696 697 max_labelno = max_label_num (); 698 min_labelno = get_first_label_num (); 699 label_align = xcalloc (max_labelno - min_labelno + 1, 700 sizeof (struct label_alignment)); 701 702 /* If not optimizing or optimizing for size, don't assign any alignments. */ 703 if (! optimize || optimize_size) 704 return; 705 706 FOR_EACH_BB (bb) 707 { 708 rtx label = BB_HEAD (bb); 709 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; 710 edge e; 711 edge_iterator ei; 712 713 if (!LABEL_P (label) 714 || probably_never_executed_bb_p (bb)) 715 continue; 716 max_log = LABEL_ALIGN (label); 717 max_skip = LABEL_ALIGN_MAX_SKIP; 718 719 FOR_EACH_EDGE (e, ei, bb->preds) 720 { 721 if (e->flags & EDGE_FALLTHRU) 722 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); 723 else 724 branch_frequency += EDGE_FREQUENCY (e); 725 } 726 727 /* There are two purposes to align block with no fallthru incoming edge: 728 1) to avoid fetch stalls when branch destination is near cache boundary 729 2) to improve cache efficiency in case the previous block is not executed 730 (so it does not need to be in the cache). 731 732 We to catch first case, we align frequently executed blocks. 733 To catch the second, we align blocks that are executed more frequently 734 than the predecessor and the predecessor is likely to not be executed 735 when function is called. */ 736 737 if (!has_fallthru 738 && (branch_frequency > BB_FREQ_MAX / 10 739 || (bb->frequency > bb->prev_bb->frequency * 10 740 && (bb->prev_bb->frequency 741 <= ENTRY_BLOCK_PTR->frequency / 2)))) 742 { 743 log = JUMP_ALIGN (label); 744 if (max_log < log) 745 { 746 max_log = log; 747 max_skip = JUMP_ALIGN_MAX_SKIP; 748 } 749 } 750 /* In case block is frequent and reached mostly by non-fallthru edge, 751 align it. It is most likely a first block of loop. */ 752 if (has_fallthru 753 && maybe_hot_bb_p (bb) 754 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10 755 && branch_frequency > fallthru_frequency * 2) 756 { 757 log = LOOP_ALIGN (label); 758 if (max_log < log) 759 { 760 max_log = log; 761 max_skip = LOOP_ALIGN_MAX_SKIP; 762 } 763 } 764 LABEL_TO_ALIGNMENT (label) = max_log; 765 LABEL_TO_MAX_SKIP (label) = max_skip; 766 } 767} 768 769struct tree_opt_pass pass_compute_alignments = 770{ 771 NULL, /* name */ 772 NULL, /* gate */ 773 compute_alignments, /* execute */ 774 NULL, /* sub */ 775 NULL, /* next */ 776 0, /* static_pass_number */ 777 0, /* tv_id */ 778 0, /* properties_required */ 779 0, /* properties_provided */ 780 0, /* properties_destroyed */ 781 0, /* todo_flags_start */ 782 0, /* todo_flags_finish */ 783 0 /* letter */ 784}; 785 786 787/* Make a pass over all insns and compute their actual lengths by shortening 788 any branches of variable length if possible. */ 789 790/* shorten_branches might be called multiple times: for example, the SH 791 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. 792 In order to do this, it needs proper length information, which it obtains 793 by calling shorten_branches. This cannot be collapsed with 794 shorten_branches itself into a single pass unless we also want to integrate 795 reorg.c, since the branch splitting exposes new instructions with delay 796 slots. */ 797 798void 799shorten_branches (rtx first ATTRIBUTE_UNUSED) 800{ 801 rtx insn; 802 int max_uid; 803 int i; 804 int max_log; 805 int max_skip; 806#ifdef HAVE_ATTR_length 807#define MAX_CODE_ALIGN 16 808 rtx seq; 809 int something_changed = 1; 810 char *varying_length; 811 rtx body; 812 int uid; 813 rtx align_tab[MAX_CODE_ALIGN]; 814 815#endif 816 817 /* Compute maximum UID and allocate label_align / uid_shuid. */ 818 max_uid = get_max_uid (); 819 820 /* Free uid_shuid before reallocating it. */ 821 free (uid_shuid); 822 823 uid_shuid = xmalloc (max_uid * sizeof *uid_shuid); 824 825 if (max_labelno != max_label_num ()) 826 { 827 int old = max_labelno; 828 int n_labels; 829 int n_old_labels; 830 831 max_labelno = max_label_num (); 832 833 n_labels = max_labelno - min_labelno + 1; 834 n_old_labels = old - min_labelno + 1; 835 836 label_align = xrealloc (label_align, 837 n_labels * sizeof (struct label_alignment)); 838 839 /* Range of labels grows monotonically in the function. Failing here 840 means that the initialization of array got lost. */ 841 gcc_assert (n_old_labels <= n_labels); 842 843 memset (label_align + n_old_labels, 0, 844 (n_labels - n_old_labels) * sizeof (struct label_alignment)); 845 } 846 847 /* Initialize label_align and set up uid_shuid to be strictly 848 monotonically rising with insn order. */ 849 /* We use max_log here to keep track of the maximum alignment we want to 850 impose on the next CODE_LABEL (or the current one if we are processing 851 the CODE_LABEL itself). */ 852 853 max_log = 0; 854 max_skip = 0; 855 856 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) 857 { 858 int log; 859 860 INSN_SHUID (insn) = i++; 861 if (INSN_P (insn)) 862 { 863 /* reorg might make the first insn of a loop being run once only, 864 and delete the label in front of it. Then we want to apply 865 the loop alignment to the new label created by reorg, which 866 is separated by the former loop start insn from the 867 NOTE_INSN_LOOP_BEG. */ 868 } 869 else if (LABEL_P (insn)) 870 { 871 rtx next; 872 873 /* Merge in alignments computed by compute_alignments. */ 874 log = LABEL_TO_ALIGNMENT (insn); 875 if (max_log < log) 876 { 877 max_log = log; 878 max_skip = LABEL_TO_MAX_SKIP (insn); 879 } 880 881 log = LABEL_ALIGN (insn); 882 if (max_log < log) 883 { 884 max_log = log; 885 max_skip = LABEL_ALIGN_MAX_SKIP; 886 } 887 next = next_nonnote_insn (insn); 888 /* ADDR_VECs only take room if read-only data goes into the text 889 section. */ 890 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) 891 if (next && JUMP_P (next)) 892 { 893 rtx nextbody = PATTERN (next); 894 if (GET_CODE (nextbody) == ADDR_VEC 895 || GET_CODE (nextbody) == ADDR_DIFF_VEC) 896 { 897 log = ADDR_VEC_ALIGN (next); 898 if (max_log < log) 899 { 900 max_log = log; 901 max_skip = LABEL_ALIGN_MAX_SKIP; 902 } 903 } 904 } 905 LABEL_TO_ALIGNMENT (insn) = max_log; 906 LABEL_TO_MAX_SKIP (insn) = max_skip; 907 max_log = 0; 908 max_skip = 0; 909 } 910 else if (BARRIER_P (insn)) 911 { 912 rtx label; 913 914 for (label = insn; label && ! INSN_P (label); 915 label = NEXT_INSN (label)) 916 if (LABEL_P (label)) 917 { 918 log = LABEL_ALIGN_AFTER_BARRIER (insn); 919 if (max_log < log) 920 { 921 max_log = log; 922 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; 923 } 924 break; 925 } 926 } 927 } 928#ifdef HAVE_ATTR_length 929 930 /* Allocate the rest of the arrays. */ 931 insn_lengths = xmalloc (max_uid * sizeof (*insn_lengths)); 932 insn_lengths_max_uid = max_uid; 933 /* Syntax errors can lead to labels being outside of the main insn stream. 934 Initialize insn_addresses, so that we get reproducible results. */ 935 INSN_ADDRESSES_ALLOC (max_uid); 936 937 varying_length = xcalloc (max_uid, sizeof (char)); 938 939 /* Initialize uid_align. We scan instructions 940 from end to start, and keep in align_tab[n] the last seen insn 941 that does an alignment of at least n+1, i.e. the successor 942 in the alignment chain for an insn that does / has a known 943 alignment of n. */ 944 uid_align = xcalloc (max_uid, sizeof *uid_align); 945 946 for (i = MAX_CODE_ALIGN; --i >= 0;) 947 align_tab[i] = NULL_RTX; 948 seq = get_last_insn (); 949 for (; seq; seq = PREV_INSN (seq)) 950 { 951 int uid = INSN_UID (seq); 952 int log; 953 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); 954 uid_align[uid] = align_tab[0]; 955 if (log) 956 { 957 /* Found an alignment label. */ 958 uid_align[uid] = align_tab[log]; 959 for (i = log - 1; i >= 0; i--) 960 align_tab[i] = seq; 961 } 962 } 963#ifdef CASE_VECTOR_SHORTEN_MODE 964 if (optimize) 965 { 966 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum 967 label fields. */ 968 969 int min_shuid = INSN_SHUID (get_insns ()) - 1; 970 int max_shuid = INSN_SHUID (get_last_insn ()) + 1; 971 int rel; 972 973 for (insn = first; insn != 0; insn = NEXT_INSN (insn)) 974 { 975 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; 976 int len, i, min, max, insn_shuid; 977 int min_align; 978 addr_diff_vec_flags flags; 979 980 if (!JUMP_P (insn) 981 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) 982 continue; 983 pat = PATTERN (insn); 984 len = XVECLEN (pat, 1); 985 gcc_assert (len > 0); 986 min_align = MAX_CODE_ALIGN; 987 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) 988 { 989 rtx lab = XEXP (XVECEXP (pat, 1, i), 0); 990 int shuid = INSN_SHUID (lab); 991 if (shuid < min) 992 { 993 min = shuid; 994 min_lab = lab; 995 } 996 if (shuid > max) 997 { 998 max = shuid; 999 max_lab = lab; 1000 } 1001 if (min_align > LABEL_TO_ALIGNMENT (lab)) 1002 min_align = LABEL_TO_ALIGNMENT (lab); 1003 } 1004 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); 1005 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); 1006 insn_shuid = INSN_SHUID (insn); 1007 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); 1008 memset (&flags, 0, sizeof (flags)); 1009 flags.min_align = min_align; 1010 flags.base_after_vec = rel > insn_shuid; 1011 flags.min_after_vec = min > insn_shuid; 1012 flags.max_after_vec = max > insn_shuid; 1013 flags.min_after_base = min > rel; 1014 flags.max_after_base = max > rel; 1015 ADDR_DIFF_VEC_FLAGS (pat) = flags; 1016 } 1017 } 1018#endif /* CASE_VECTOR_SHORTEN_MODE */ 1019 1020 /* Compute initial lengths, addresses, and varying flags for each insn. */ 1021 for (insn_current_address = 0, insn = first; 1022 insn != 0; 1023 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) 1024 { 1025 uid = INSN_UID (insn); 1026 1027 insn_lengths[uid] = 0; 1028 1029 if (LABEL_P (insn)) 1030 { 1031 int log = LABEL_TO_ALIGNMENT (insn); 1032 if (log) 1033 { 1034 int align = 1 << log; 1035 int new_address = (insn_current_address + align - 1) & -align; 1036 insn_lengths[uid] = new_address - insn_current_address; 1037 } 1038 } 1039 1040 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; 1041 1042 if (NOTE_P (insn) || BARRIER_P (insn) 1043 || LABEL_P (insn)) 1044 continue; 1045 if (INSN_DELETED_P (insn)) 1046 continue; 1047 1048 body = PATTERN (insn); 1049 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 1050 { 1051 /* This only takes room if read-only data goes into the text 1052 section. */ 1053 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) 1054 insn_lengths[uid] = (XVECLEN (body, 1055 GET_CODE (body) == ADDR_DIFF_VEC) 1056 * GET_MODE_SIZE (GET_MODE (body))); 1057 /* Alignment is handled by ADDR_VEC_ALIGN. */ 1058 } 1059 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 1060 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); 1061 else if (GET_CODE (body) == SEQUENCE) 1062 { 1063 int i; 1064 int const_delay_slots; 1065#ifdef DELAY_SLOTS 1066 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); 1067#else 1068 const_delay_slots = 0; 1069#endif 1070 /* Inside a delay slot sequence, we do not do any branch shortening 1071 if the shortening could change the number of delay slots 1072 of the branch. */ 1073 for (i = 0; i < XVECLEN (body, 0); i++) 1074 { 1075 rtx inner_insn = XVECEXP (body, 0, i); 1076 int inner_uid = INSN_UID (inner_insn); 1077 int inner_length; 1078 1079 if (GET_CODE (body) == ASM_INPUT 1080 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) 1081 inner_length = (asm_insn_count (PATTERN (inner_insn)) 1082 * insn_default_length (inner_insn)); 1083 else 1084 inner_length = insn_default_length (inner_insn); 1085 1086 insn_lengths[inner_uid] = inner_length; 1087 if (const_delay_slots) 1088 { 1089 if ((varying_length[inner_uid] 1090 = insn_variable_length_p (inner_insn)) != 0) 1091 varying_length[uid] = 1; 1092 INSN_ADDRESSES (inner_uid) = (insn_current_address 1093 + insn_lengths[uid]); 1094 } 1095 else 1096 varying_length[inner_uid] = 0; 1097 insn_lengths[uid] += inner_length; 1098 } 1099 } 1100 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) 1101 { 1102 insn_lengths[uid] = insn_default_length (insn); 1103 varying_length[uid] = insn_variable_length_p (insn); 1104 } 1105 1106 /* If needed, do any adjustment. */ 1107#ifdef ADJUST_INSN_LENGTH 1108 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); 1109 if (insn_lengths[uid] < 0) 1110 fatal_insn ("negative insn length", insn); 1111#endif 1112 } 1113 1114 /* Now loop over all the insns finding varying length insns. For each, 1115 get the current insn length. If it has changed, reflect the change. 1116 When nothing changes for a full pass, we are done. */ 1117 1118 while (something_changed) 1119 { 1120 something_changed = 0; 1121 insn_current_align = MAX_CODE_ALIGN - 1; 1122 for (insn_current_address = 0, insn = first; 1123 insn != 0; 1124 insn = NEXT_INSN (insn)) 1125 { 1126 int new_length; 1127#ifdef ADJUST_INSN_LENGTH 1128 int tmp_length; 1129#endif 1130 int length_align; 1131 1132 uid = INSN_UID (insn); 1133 1134 if (LABEL_P (insn)) 1135 { 1136 int log = LABEL_TO_ALIGNMENT (insn); 1137 if (log > insn_current_align) 1138 { 1139 int align = 1 << log; 1140 int new_address= (insn_current_address + align - 1) & -align; 1141 insn_lengths[uid] = new_address - insn_current_address; 1142 insn_current_align = log; 1143 insn_current_address = new_address; 1144 } 1145 else 1146 insn_lengths[uid] = 0; 1147 INSN_ADDRESSES (uid) = insn_current_address; 1148 continue; 1149 } 1150 1151 length_align = INSN_LENGTH_ALIGNMENT (insn); 1152 if (length_align < insn_current_align) 1153 insn_current_align = length_align; 1154 1155 insn_last_address = INSN_ADDRESSES (uid); 1156 INSN_ADDRESSES (uid) = insn_current_address; 1157 1158#ifdef CASE_VECTOR_SHORTEN_MODE 1159 if (optimize && JUMP_P (insn) 1160 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) 1161 { 1162 rtx body = PATTERN (insn); 1163 int old_length = insn_lengths[uid]; 1164 rtx rel_lab = XEXP (XEXP (body, 0), 0); 1165 rtx min_lab = XEXP (XEXP (body, 2), 0); 1166 rtx max_lab = XEXP (XEXP (body, 3), 0); 1167 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); 1168 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); 1169 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); 1170 rtx prev; 1171 int rel_align = 0; 1172 addr_diff_vec_flags flags; 1173 1174 /* Avoid automatic aggregate initialization. */ 1175 flags = ADDR_DIFF_VEC_FLAGS (body); 1176 1177 /* Try to find a known alignment for rel_lab. */ 1178 for (prev = rel_lab; 1179 prev 1180 && ! insn_lengths[INSN_UID (prev)] 1181 && ! (varying_length[INSN_UID (prev)] & 1); 1182 prev = PREV_INSN (prev)) 1183 if (varying_length[INSN_UID (prev)] & 2) 1184 { 1185 rel_align = LABEL_TO_ALIGNMENT (prev); 1186 break; 1187 } 1188 1189 /* See the comment on addr_diff_vec_flags in rtl.h for the 1190 meaning of the flags values. base: REL_LAB vec: INSN */ 1191 /* Anything after INSN has still addresses from the last 1192 pass; adjust these so that they reflect our current 1193 estimate for this pass. */ 1194 if (flags.base_after_vec) 1195 rel_addr += insn_current_address - insn_last_address; 1196 if (flags.min_after_vec) 1197 min_addr += insn_current_address - insn_last_address; 1198 if (flags.max_after_vec) 1199 max_addr += insn_current_address - insn_last_address; 1200 /* We want to know the worst case, i.e. lowest possible value 1201 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, 1202 its offset is positive, and we have to be wary of code shrink; 1203 otherwise, it is negative, and we have to be vary of code 1204 size increase. */ 1205 if (flags.min_after_base) 1206 { 1207 /* If INSN is between REL_LAB and MIN_LAB, the size 1208 changes we are about to make can change the alignment 1209 within the observed offset, therefore we have to break 1210 it up into two parts that are independent. */ 1211 if (! flags.base_after_vec && flags.min_after_vec) 1212 { 1213 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); 1214 min_addr -= align_fuzz (insn, min_lab, 0, 0); 1215 } 1216 else 1217 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); 1218 } 1219 else 1220 { 1221 if (flags.base_after_vec && ! flags.min_after_vec) 1222 { 1223 min_addr -= align_fuzz (min_lab, insn, 0, ~0); 1224 min_addr -= align_fuzz (insn, rel_lab, 0, ~0); 1225 } 1226 else 1227 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); 1228 } 1229 /* Likewise, determine the highest lowest possible value 1230 for the offset of MAX_LAB. */ 1231 if (flags.max_after_base) 1232 { 1233 if (! flags.base_after_vec && flags.max_after_vec) 1234 { 1235 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); 1236 max_addr += align_fuzz (insn, max_lab, 0, ~0); 1237 } 1238 else 1239 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); 1240 } 1241 else 1242 { 1243 if (flags.base_after_vec && ! flags.max_after_vec) 1244 { 1245 max_addr += align_fuzz (max_lab, insn, 0, 0); 1246 max_addr += align_fuzz (insn, rel_lab, 0, 0); 1247 } 1248 else 1249 max_addr += align_fuzz (max_lab, rel_lab, 0, 0); 1250 } 1251 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, 1252 max_addr - rel_addr, 1253 body)); 1254 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) 1255 { 1256 insn_lengths[uid] 1257 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); 1258 insn_current_address += insn_lengths[uid]; 1259 if (insn_lengths[uid] != old_length) 1260 something_changed = 1; 1261 } 1262 1263 continue; 1264 } 1265#endif /* CASE_VECTOR_SHORTEN_MODE */ 1266 1267 if (! (varying_length[uid])) 1268 { 1269 if (NONJUMP_INSN_P (insn) 1270 && GET_CODE (PATTERN (insn)) == SEQUENCE) 1271 { 1272 int i; 1273 1274 body = PATTERN (insn); 1275 for (i = 0; i < XVECLEN (body, 0); i++) 1276 { 1277 rtx inner_insn = XVECEXP (body, 0, i); 1278 int inner_uid = INSN_UID (inner_insn); 1279 1280 INSN_ADDRESSES (inner_uid) = insn_current_address; 1281 1282 insn_current_address += insn_lengths[inner_uid]; 1283 } 1284 } 1285 else 1286 insn_current_address += insn_lengths[uid]; 1287 1288 continue; 1289 } 1290 1291 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) 1292 { 1293 int i; 1294 1295 body = PATTERN (insn); 1296 new_length = 0; 1297 for (i = 0; i < XVECLEN (body, 0); i++) 1298 { 1299 rtx inner_insn = XVECEXP (body, 0, i); 1300 int inner_uid = INSN_UID (inner_insn); 1301 int inner_length; 1302 1303 INSN_ADDRESSES (inner_uid) = insn_current_address; 1304 1305 /* insn_current_length returns 0 for insns with a 1306 non-varying length. */ 1307 if (! varying_length[inner_uid]) 1308 inner_length = insn_lengths[inner_uid]; 1309 else 1310 inner_length = insn_current_length (inner_insn); 1311 1312 if (inner_length != insn_lengths[inner_uid]) 1313 { 1314 insn_lengths[inner_uid] = inner_length; 1315 something_changed = 1; 1316 } 1317 insn_current_address += insn_lengths[inner_uid]; 1318 new_length += inner_length; 1319 } 1320 } 1321 else 1322 { 1323 new_length = insn_current_length (insn); 1324 insn_current_address += new_length; 1325 } 1326 1327#ifdef ADJUST_INSN_LENGTH 1328 /* If needed, do any adjustment. */ 1329 tmp_length = new_length; 1330 ADJUST_INSN_LENGTH (insn, new_length); 1331 insn_current_address += (new_length - tmp_length); 1332#endif 1333 1334 if (new_length != insn_lengths[uid]) 1335 { 1336 insn_lengths[uid] = new_length; 1337 something_changed = 1; 1338 } 1339 } 1340 /* For a non-optimizing compile, do only a single pass. */ 1341 if (!optimize) 1342 break; 1343 } 1344 1345 free (varying_length); 1346 1347#endif /* HAVE_ATTR_length */ 1348} 1349 1350#ifdef HAVE_ATTR_length 1351/* Given the body of an INSN known to be generated by an ASM statement, return 1352 the number of machine instructions likely to be generated for this insn. 1353 This is used to compute its length. */ 1354 1355static int 1356asm_insn_count (rtx body) 1357{ 1358 const char *template; 1359 int count = 1; 1360 1361 if (GET_CODE (body) == ASM_INPUT) 1362 template = XSTR (body, 0); 1363 else 1364 template = decode_asm_operands (body, NULL, NULL, NULL, NULL); 1365 1366 for (; *template; template++) 1367 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n') 1368 count++; 1369 1370 return count; 1371} 1372#endif 1373 1374/* Output assembler code for the start of a function, 1375 and initialize some of the variables in this file 1376 for the new function. The label for the function and associated 1377 assembler pseudo-ops have already been output in `assemble_start_function'. 1378 1379 FIRST is the first insn of the rtl for the function being compiled. 1380 FILE is the file to write assembler code to. 1381 OPTIMIZE is nonzero if we should eliminate redundant 1382 test and compare insns. */ 1383 1384void 1385final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file, 1386 int optimize ATTRIBUTE_UNUSED) 1387{ 1388 block_depth = 0; 1389 1390 this_is_asm_operands = 0; 1391 1392 last_filename = locator_file (prologue_locator); 1393 last_linenum = locator_line (prologue_locator); 1394 1395 high_block_linenum = high_function_linenum = last_linenum; 1396 1397 (*debug_hooks->begin_prologue) (last_linenum, last_filename); 1398 1399#if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO) 1400 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) 1401 dwarf2out_begin_prologue (0, NULL); 1402#endif 1403 1404#ifdef LEAF_REG_REMAP 1405 if (current_function_uses_only_leaf_regs) 1406 leaf_renumber_regs (first); 1407#endif 1408 1409 /* The Sun386i and perhaps other machines don't work right 1410 if the profiling code comes after the prologue. */ 1411#ifdef PROFILE_BEFORE_PROLOGUE 1412 if (current_function_profile) 1413 profile_function (file); 1414#endif /* PROFILE_BEFORE_PROLOGUE */ 1415 1416#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) 1417 if (dwarf2out_do_frame ()) 1418 dwarf2out_frame_debug (NULL_RTX, false); 1419#endif 1420 1421 /* If debugging, assign block numbers to all of the blocks in this 1422 function. */ 1423 if (write_symbols) 1424 { 1425 remove_unnecessary_notes (); 1426 reemit_insn_block_notes (); 1427 number_blocks (current_function_decl); 1428 /* We never actually put out begin/end notes for the top-level 1429 block in the function. But, conceptually, that block is 1430 always needed. */ 1431 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; 1432 } 1433 1434 /* First output the function prologue: code to set up the stack frame. */ 1435 targetm.asm_out.function_prologue (file, get_frame_size ()); 1436 1437 /* If the machine represents the prologue as RTL, the profiling code must 1438 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ 1439#ifdef HAVE_prologue 1440 if (! HAVE_prologue) 1441#endif 1442 profile_after_prologue (file); 1443} 1444 1445static void 1446profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) 1447{ 1448#ifndef PROFILE_BEFORE_PROLOGUE 1449 if (current_function_profile) 1450 profile_function (file); 1451#endif /* not PROFILE_BEFORE_PROLOGUE */ 1452} 1453 1454static void 1455profile_function (FILE *file ATTRIBUTE_UNUSED) 1456{ 1457#ifndef NO_PROFILE_COUNTERS 1458# define NO_PROFILE_COUNTERS 0 1459#endif 1460#if defined(ASM_OUTPUT_REG_PUSH) 1461 int sval = current_function_returns_struct; 1462 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1); 1463#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM) 1464 int cxt = cfun->static_chain_decl != NULL; 1465#endif 1466#endif /* ASM_OUTPUT_REG_PUSH */ 1467 1468 if (! NO_PROFILE_COUNTERS) 1469 { 1470 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); 1471 data_section (); 1472 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); 1473 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); 1474 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); 1475 } 1476 1477 current_function_section (current_function_decl); 1478 1479#if defined(ASM_OUTPUT_REG_PUSH) 1480 if (sval && svrtx != NULL_RTX && REG_P (svrtx)) 1481 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx)); 1482#endif 1483 1484#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1485 if (cxt) 1486 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM); 1487#else 1488#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1489 if (cxt) 1490 { 1491 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM); 1492 } 1493#endif 1494#endif 1495 1496 FUNCTION_PROFILER (file, current_function_funcdef_no); 1497 1498#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1499 if (cxt) 1500 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM); 1501#else 1502#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1503 if (cxt) 1504 { 1505 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM); 1506 } 1507#endif 1508#endif 1509 1510#if defined(ASM_OUTPUT_REG_PUSH) 1511 if (sval && svrtx != NULL_RTX && REG_P (svrtx)) 1512 ASM_OUTPUT_REG_POP (file, REGNO (svrtx)); 1513#endif 1514} 1515 1516/* Output assembler code for the end of a function. 1517 For clarity, args are same as those of `final_start_function' 1518 even though not all of them are needed. */ 1519 1520void 1521final_end_function (void) 1522{ 1523 app_disable (); 1524 1525 (*debug_hooks->end_function) (high_function_linenum); 1526 1527 /* Finally, output the function epilogue: 1528 code to restore the stack frame and return to the caller. */ 1529 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); 1530 1531 /* And debug output. */ 1532 (*debug_hooks->end_epilogue) (last_linenum, last_filename); 1533 1534#if defined (DWARF2_UNWIND_INFO) 1535 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG 1536 && dwarf2out_do_frame ()) 1537 dwarf2out_end_epilogue (last_linenum, last_filename); 1538#endif 1539} 1540 1541/* Output assembler code for some insns: all or part of a function. 1542 For description of args, see `final_start_function', above. */ 1543 1544void 1545final (rtx first, FILE *file, int optimize) 1546{ 1547 rtx insn; 1548 int max_uid = 0; 1549 int seen = 0; 1550 1551 last_ignored_compare = 0; 1552 1553#ifdef SDB_DEBUGGING_INFO 1554 /* When producing SDB debugging info, delete troublesome line number 1555 notes from inlined functions in other files as well as duplicate 1556 line number notes. */ 1557 if (write_symbols == SDB_DEBUG) 1558 { 1559 rtx last = 0; 1560 for (insn = first; insn; insn = NEXT_INSN (insn)) 1561 if (NOTE_P (insn) && NOTE_LINE_NUMBER (insn) > 0) 1562 { 1563 if (last != 0 1564#ifdef USE_MAPPED_LOCATION 1565 && NOTE_SOURCE_LOCATION (insn) == NOTE_SOURCE_LOCATION (last) 1566#else 1567 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last) 1568 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last) 1569#endif 1570 ) 1571 { 1572 delete_insn (insn); /* Use delete_note. */ 1573 continue; 1574 } 1575 last = insn; 1576 } 1577 } 1578#endif 1579 1580 for (insn = first; insn; insn = NEXT_INSN (insn)) 1581 { 1582 if (INSN_UID (insn) > max_uid) /* Find largest UID. */ 1583 max_uid = INSN_UID (insn); 1584#ifdef HAVE_cc0 1585 /* If CC tracking across branches is enabled, record the insn which 1586 jumps to each branch only reached from one place. */ 1587 if (optimize && JUMP_P (insn)) 1588 { 1589 rtx lab = JUMP_LABEL (insn); 1590 if (lab && LABEL_NUSES (lab) == 1) 1591 { 1592 LABEL_REFS (lab) = insn; 1593 } 1594 } 1595#endif 1596 } 1597 1598 init_recog (); 1599 1600 CC_STATUS_INIT; 1601 1602 /* Output the insns. */ 1603 for (insn = NEXT_INSN (first); insn;) 1604 { 1605#ifdef HAVE_ATTR_length 1606 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) 1607 { 1608 /* This can be triggered by bugs elsewhere in the compiler if 1609 new insns are created after init_insn_lengths is called. */ 1610 gcc_assert (NOTE_P (insn)); 1611 insn_current_address = -1; 1612 } 1613 else 1614 insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); 1615#endif /* HAVE_ATTR_length */ 1616 1617 insn = final_scan_insn (insn, file, optimize, 0, &seen); 1618 } 1619} 1620 1621const char * 1622get_insn_template (int code, rtx insn) 1623{ 1624 switch (insn_data[code].output_format) 1625 { 1626 case INSN_OUTPUT_FORMAT_SINGLE: 1627 return insn_data[code].output.single; 1628 case INSN_OUTPUT_FORMAT_MULTI: 1629 return insn_data[code].output.multi[which_alternative]; 1630 case INSN_OUTPUT_FORMAT_FUNCTION: 1631 gcc_assert (insn); 1632 return (*insn_data[code].output.function) (recog_data.operand, insn); 1633 1634 default: 1635 gcc_unreachable (); 1636 } 1637} 1638 1639/* Emit the appropriate declaration for an alternate-entry-point 1640 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with 1641 LABEL_KIND != LABEL_NORMAL. 1642 1643 The case fall-through in this function is intentional. */ 1644static void 1645output_alternate_entry_point (FILE *file, rtx insn) 1646{ 1647 const char *name = LABEL_NAME (insn); 1648 1649 switch (LABEL_KIND (insn)) 1650 { 1651 case LABEL_WEAK_ENTRY: 1652#ifdef ASM_WEAKEN_LABEL 1653 ASM_WEAKEN_LABEL (file, name); 1654#endif 1655 case LABEL_GLOBAL_ENTRY: 1656 targetm.asm_out.globalize_label (file, name); 1657 case LABEL_STATIC_ENTRY: 1658#ifdef ASM_OUTPUT_TYPE_DIRECTIVE 1659 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); 1660#endif 1661 ASM_OUTPUT_LABEL (file, name); 1662 break; 1663 1664 case LABEL_NORMAL: 1665 default: 1666 gcc_unreachable (); 1667 } 1668} 1669 1670/* The final scan for one insn, INSN. 1671 Args are same as in `final', except that INSN 1672 is the insn being scanned. 1673 Value returned is the next insn to be scanned. 1674 1675 NOPEEPHOLES is the flag to disallow peephole processing (currently 1676 used for within delayed branch sequence output). 1677 1678 SEEN is used to track the end of the prologue, for emitting 1679 debug information. We force the emission of a line note after 1680 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or 1681 at the beginning of the second basic block, whichever comes 1682 first. */ 1683 1684rtx 1685final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, 1686 int nopeepholes ATTRIBUTE_UNUSED, int *seen) 1687{ 1688#ifdef HAVE_cc0 1689 rtx set; 1690#endif 1691 rtx next; 1692 1693 insn_counter++; 1694 1695 /* Ignore deleted insns. These can occur when we split insns (due to a 1696 template of "#") while not optimizing. */ 1697 if (INSN_DELETED_P (insn)) 1698 return NEXT_INSN (insn); 1699 1700 switch (GET_CODE (insn)) 1701 { 1702 case NOTE: 1703 switch (NOTE_LINE_NUMBER (insn)) 1704 { 1705 case NOTE_INSN_DELETED: 1706 case NOTE_INSN_LOOP_BEG: 1707 case NOTE_INSN_LOOP_END: 1708 case NOTE_INSN_FUNCTION_END: 1709 case NOTE_INSN_REPEATED_LINE_NUMBER: 1710 case NOTE_INSN_EXPECTED_VALUE: 1711 break; 1712 1713 case NOTE_INSN_SWITCH_TEXT_SECTIONS: 1714 1715 /* The presence of this note indicates that this basic block 1716 belongs in the "cold" section of the .o file. If we are 1717 not already writing to the cold section we need to change 1718 to it. */ 1719 1720 if (last_text_section == in_text) 1721 { 1722 (*debug_hooks->switch_text_section) (); 1723#if defined (DWARF2_UNWIND_INFO) 1724 if (write_symbols != DWARF2_DEBUG 1725 && write_symbols != VMS_AND_DWARF2_DEBUG 1726 && dwarf2out_do_frame ()) 1727 dwarf2out_switch_text_section (); 1728#endif 1729 unlikely_text_section (); 1730 } 1731 else 1732 { 1733 (*debug_hooks->switch_text_section) (); 1734#if defined (DWARF2_UNWIND_INFO) 1735 if (write_symbols != DWARF2_DEBUG 1736 && write_symbols != VMS_AND_DWARF2_DEBUG 1737 && dwarf2out_do_frame ()) 1738 dwarf2out_switch_text_section (); 1739#endif 1740 text_section (); 1741 } 1742 break; 1743 1744 case NOTE_INSN_BASIC_BLOCK: 1745 1746#ifdef TARGET_UNWIND_INFO 1747 targetm.asm_out.unwind_emit (asm_out_file, insn); 1748#endif 1749 1750 if (flag_debug_asm) 1751 fprintf (asm_out_file, "\t%s basic block %d\n", 1752 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); 1753 1754 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB) 1755 { 1756 *seen |= SEEN_EMITTED; 1757 force_source_line = true; 1758 } 1759 else 1760 *seen |= SEEN_BB; 1761 1762 break; 1763 1764 case NOTE_INSN_EH_REGION_BEG: 1765 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", 1766 NOTE_EH_HANDLER (insn)); 1767 break; 1768 1769 case NOTE_INSN_EH_REGION_END: 1770 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", 1771 NOTE_EH_HANDLER (insn)); 1772 break; 1773 1774 case NOTE_INSN_PROLOGUE_END: 1775 targetm.asm_out.function_end_prologue (file); 1776 profile_after_prologue (file); 1777 1778 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) 1779 { 1780 *seen |= SEEN_EMITTED; 1781 force_source_line = true; 1782 } 1783 else 1784 *seen |= SEEN_NOTE; 1785 1786 break; 1787 1788 case NOTE_INSN_EPILOGUE_BEG: 1789 targetm.asm_out.function_begin_epilogue (file); 1790 break; 1791 1792 case NOTE_INSN_FUNCTION_BEG: 1793 app_disable (); 1794 (*debug_hooks->end_prologue) (last_linenum, last_filename); 1795 1796 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) 1797 { 1798 *seen |= SEEN_EMITTED; 1799 force_source_line = true; 1800 } 1801 else 1802 *seen |= SEEN_NOTE; 1803 1804 break; 1805 1806 case NOTE_INSN_BLOCK_BEG: 1807 if (debug_info_level == DINFO_LEVEL_NORMAL 1808 || debug_info_level == DINFO_LEVEL_VERBOSE 1809 || write_symbols == DWARF2_DEBUG 1810 || write_symbols == VMS_AND_DWARF2_DEBUG 1811 || write_symbols == VMS_DEBUG) 1812 { 1813 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 1814 1815 app_disable (); 1816 ++block_depth; 1817 high_block_linenum = last_linenum; 1818 1819 /* Output debugging info about the symbol-block beginning. */ 1820 (*debug_hooks->begin_block) (last_linenum, n); 1821 1822 /* Mark this block as output. */ 1823 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; 1824 } 1825 break; 1826 1827 case NOTE_INSN_BLOCK_END: 1828 if (debug_info_level == DINFO_LEVEL_NORMAL 1829 || debug_info_level == DINFO_LEVEL_VERBOSE 1830 || write_symbols == DWARF2_DEBUG 1831 || write_symbols == VMS_AND_DWARF2_DEBUG 1832 || write_symbols == VMS_DEBUG) 1833 { 1834 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 1835 1836 app_disable (); 1837 1838 /* End of a symbol-block. */ 1839 --block_depth; 1840 gcc_assert (block_depth >= 0); 1841 1842 (*debug_hooks->end_block) (high_block_linenum, n); 1843 } 1844 break; 1845 1846 case NOTE_INSN_DELETED_LABEL: 1847 /* Emit the label. We may have deleted the CODE_LABEL because 1848 the label could be proved to be unreachable, though still 1849 referenced (in the form of having its address taken. */ 1850 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); 1851 break; 1852 1853 case NOTE_INSN_VAR_LOCATION: 1854 (*debug_hooks->var_location) (insn); 1855 break; 1856 1857 case 0: 1858 break; 1859 1860 default: 1861 gcc_assert (NOTE_LINE_NUMBER (insn) > 0); 1862 break; 1863 } 1864 break; 1865 1866 case BARRIER: 1867#if defined (DWARF2_UNWIND_INFO) 1868 if (dwarf2out_do_frame ()) 1869 dwarf2out_frame_debug (insn, false); 1870#endif 1871 break; 1872 1873 case CODE_LABEL: 1874 /* The target port might emit labels in the output function for 1875 some insn, e.g. sh.c output_branchy_insn. */ 1876 if (CODE_LABEL_NUMBER (insn) <= max_labelno) 1877 { 1878 int align = LABEL_TO_ALIGNMENT (insn); 1879#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 1880 int max_skip = LABEL_TO_MAX_SKIP (insn); 1881#endif 1882 1883 if (align && NEXT_INSN (insn)) 1884 { 1885#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 1886 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); 1887#else 1888#ifdef ASM_OUTPUT_ALIGN_WITH_NOP 1889 ASM_OUTPUT_ALIGN_WITH_NOP (file, align); 1890#else 1891 ASM_OUTPUT_ALIGN (file, align); 1892#endif 1893#endif 1894 } 1895 } 1896#ifdef HAVE_cc0 1897 CC_STATUS_INIT; 1898 /* If this label is reached from only one place, set the condition 1899 codes from the instruction just before the branch. */ 1900 1901 /* Disabled because some insns set cc_status in the C output code 1902 and NOTICE_UPDATE_CC alone can set incorrect status. */ 1903 if (0 /* optimize && LABEL_NUSES (insn) == 1*/) 1904 { 1905 rtx jump = LABEL_REFS (insn); 1906 rtx barrier = prev_nonnote_insn (insn); 1907 rtx prev; 1908 /* If the LABEL_REFS field of this label has been set to point 1909 at a branch, the predecessor of the branch is a regular 1910 insn, and that branch is the only way to reach this label, 1911 set the condition codes based on the branch and its 1912 predecessor. */ 1913 if (barrier && BARRIER_P (barrier) 1914 && jump && JUMP_P (jump) 1915 && (prev = prev_nonnote_insn (jump)) 1916 && NONJUMP_INSN_P (prev)) 1917 { 1918 NOTICE_UPDATE_CC (PATTERN (prev), prev); 1919 NOTICE_UPDATE_CC (PATTERN (jump), jump); 1920 } 1921 } 1922#endif 1923 1924 if (LABEL_NAME (insn)) 1925 (*debug_hooks->label) (insn); 1926 1927 if (app_on) 1928 { 1929 fputs (ASM_APP_OFF, file); 1930 app_on = 0; 1931 } 1932 1933 next = next_nonnote_insn (insn); 1934 if (next != 0 && JUMP_P (next)) 1935 { 1936 rtx nextbody = PATTERN (next); 1937 1938 /* If this label is followed by a jump-table, 1939 make sure we put the label in the read-only section. Also 1940 possibly write the label and jump table together. */ 1941 1942 if (GET_CODE (nextbody) == ADDR_VEC 1943 || GET_CODE (nextbody) == ADDR_DIFF_VEC) 1944 { 1945#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 1946 /* In this case, the case vector is being moved by the 1947 target, so don't output the label at all. Leave that 1948 to the back end macros. */ 1949#else 1950 if (! JUMP_TABLES_IN_TEXT_SECTION) 1951 { 1952 int log_align; 1953 1954 targetm.asm_out.function_rodata_section (current_function_decl); 1955 1956#ifdef ADDR_VEC_ALIGN 1957 log_align = ADDR_VEC_ALIGN (next); 1958#else 1959 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); 1960#endif 1961 ASM_OUTPUT_ALIGN (file, log_align); 1962 } 1963 else 1964 current_function_section (current_function_decl); 1965 1966#ifdef ASM_OUTPUT_CASE_LABEL 1967 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), 1968 next); 1969#else 1970 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); 1971#endif 1972#endif 1973 break; 1974 } 1975 } 1976 if (LABEL_ALT_ENTRY_P (insn)) 1977 output_alternate_entry_point (file, insn); 1978 else 1979 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); 1980 break; 1981 1982 default: 1983 { 1984 rtx body = PATTERN (insn); 1985 int insn_code_number; 1986 const char *template; 1987 1988 /* An INSN, JUMP_INSN or CALL_INSN. 1989 First check for special kinds that recog doesn't recognize. */ 1990 1991 if (GET_CODE (body) == USE /* These are just declarations. */ 1992 || GET_CODE (body) == CLOBBER) 1993 break; 1994 1995#ifdef HAVE_cc0 1996 { 1997 /* If there is a REG_CC_SETTER note on this insn, it means that 1998 the setting of the condition code was done in the delay slot 1999 of the insn that branched here. So recover the cc status 2000 from the insn that set it. */ 2001 2002 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); 2003 if (note) 2004 { 2005 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); 2006 cc_prev_status = cc_status; 2007 } 2008 } 2009#endif 2010 2011 /* Detect insns that are really jump-tables 2012 and output them as such. */ 2013 2014 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 2015 { 2016#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) 2017 int vlen, idx; 2018#endif 2019 2020 if (! JUMP_TABLES_IN_TEXT_SECTION) 2021 targetm.asm_out.function_rodata_section (current_function_decl); 2022 else 2023 current_function_section (current_function_decl); 2024 2025 if (app_on) 2026 { 2027 fputs (ASM_APP_OFF, file); 2028 app_on = 0; 2029 } 2030 2031#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 2032 if (GET_CODE (body) == ADDR_VEC) 2033 { 2034#ifdef ASM_OUTPUT_ADDR_VEC 2035 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); 2036#else 2037 gcc_unreachable (); 2038#endif 2039 } 2040 else 2041 { 2042#ifdef ASM_OUTPUT_ADDR_DIFF_VEC 2043 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); 2044#else 2045 gcc_unreachable (); 2046#endif 2047 } 2048#else 2049 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); 2050 for (idx = 0; idx < vlen; idx++) 2051 { 2052 if (GET_CODE (body) == ADDR_VEC) 2053 { 2054#ifdef ASM_OUTPUT_ADDR_VEC_ELT 2055 ASM_OUTPUT_ADDR_VEC_ELT 2056 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); 2057#else 2058 gcc_unreachable (); 2059#endif 2060 } 2061 else 2062 { 2063#ifdef ASM_OUTPUT_ADDR_DIFF_ELT 2064 ASM_OUTPUT_ADDR_DIFF_ELT 2065 (file, 2066 body, 2067 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), 2068 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); 2069#else 2070 gcc_unreachable (); 2071#endif 2072 } 2073 } 2074#ifdef ASM_OUTPUT_CASE_END 2075 ASM_OUTPUT_CASE_END (file, 2076 CODE_LABEL_NUMBER (PREV_INSN (insn)), 2077 insn); 2078#endif 2079#endif 2080 2081 current_function_section (current_function_decl); 2082 2083 break; 2084 } 2085 /* Output this line note if it is the first or the last line 2086 note in a row. */ 2087 if (notice_source_line (insn)) 2088 { 2089 (*debug_hooks->source_line) (last_linenum, last_filename); 2090 } 2091 2092 if (GET_CODE (body) == ASM_INPUT) 2093 { 2094 const char *string = XSTR (body, 0); 2095 2096 /* There's no telling what that did to the condition codes. */ 2097 CC_STATUS_INIT; 2098 2099 if (string[0]) 2100 { 2101 if (! app_on) 2102 { 2103 fputs (ASM_APP_ON, file); 2104 app_on = 1; 2105 } 2106 fprintf (asm_out_file, "\t%s\n", string); 2107 } 2108 break; 2109 } 2110 2111 /* Detect `asm' construct with operands. */ 2112 if (asm_noperands (body) >= 0) 2113 { 2114 unsigned int noperands = asm_noperands (body); 2115 rtx *ops = alloca (noperands * sizeof (rtx)); 2116 const char *string; 2117 2118 /* There's no telling what that did to the condition codes. */ 2119 CC_STATUS_INIT; 2120 2121 /* Get out the operand values. */ 2122 string = decode_asm_operands (body, ops, NULL, NULL, NULL); 2123 /* Inhibit dieing on what would otherwise be compiler bugs. */ 2124 insn_noperands = noperands; 2125 this_is_asm_operands = insn; 2126 2127#ifdef FINAL_PRESCAN_INSN 2128 FINAL_PRESCAN_INSN (insn, ops, insn_noperands); 2129#endif 2130 2131 /* Output the insn using them. */ 2132 if (string[0]) 2133 { 2134 if (! app_on) 2135 { 2136 fputs (ASM_APP_ON, file); 2137 app_on = 1; 2138 } 2139 output_asm_insn (string, ops); 2140 } 2141 2142 this_is_asm_operands = 0; 2143 break; 2144 } 2145 2146 if (app_on) 2147 { 2148 fputs (ASM_APP_OFF, file); 2149 app_on = 0; 2150 } 2151 2152 if (GET_CODE (body) == SEQUENCE) 2153 { 2154 /* A delayed-branch sequence */ 2155 int i; 2156 2157 final_sequence = body; 2158 2159 /* Record the delay slots' frame information before the branch. 2160 This is needed for delayed calls: see execute_cfa_program(). */ 2161#if defined (DWARF2_UNWIND_INFO) 2162 if (dwarf2out_do_frame ()) 2163 for (i = 1; i < XVECLEN (body, 0); i++) 2164 dwarf2out_frame_debug (XVECEXP (body, 0, i), false); 2165#endif 2166 2167 /* The first insn in this SEQUENCE might be a JUMP_INSN that will 2168 force the restoration of a comparison that was previously 2169 thought unnecessary. If that happens, cancel this sequence 2170 and cause that insn to be restored. */ 2171 2172 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen); 2173 if (next != XVECEXP (body, 0, 1)) 2174 { 2175 final_sequence = 0; 2176 return next; 2177 } 2178 2179 for (i = 1; i < XVECLEN (body, 0); i++) 2180 { 2181 rtx insn = XVECEXP (body, 0, i); 2182 rtx next = NEXT_INSN (insn); 2183 /* We loop in case any instruction in a delay slot gets 2184 split. */ 2185 do 2186 insn = final_scan_insn (insn, file, 0, 1, seen); 2187 while (insn != next); 2188 } 2189#ifdef DBR_OUTPUT_SEQEND 2190 DBR_OUTPUT_SEQEND (file); 2191#endif 2192 final_sequence = 0; 2193 2194 /* If the insn requiring the delay slot was a CALL_INSN, the 2195 insns in the delay slot are actually executed before the 2196 called function. Hence we don't preserve any CC-setting 2197 actions in these insns and the CC must be marked as being 2198 clobbered by the function. */ 2199 if (CALL_P (XVECEXP (body, 0, 0))) 2200 { 2201 CC_STATUS_INIT; 2202 } 2203 break; 2204 } 2205 2206 /* We have a real machine instruction as rtl. */ 2207 2208 body = PATTERN (insn); 2209 2210#ifdef HAVE_cc0 2211 set = single_set (insn); 2212 2213 /* Check for redundant test and compare instructions 2214 (when the condition codes are already set up as desired). 2215 This is done only when optimizing; if not optimizing, 2216 it should be possible for the user to alter a variable 2217 with the debugger in between statements 2218 and the next statement should reexamine the variable 2219 to compute the condition codes. */ 2220 2221 if (optimize) 2222 { 2223 if (set 2224 && GET_CODE (SET_DEST (set)) == CC0 2225 && insn != last_ignored_compare) 2226 { 2227 if (GET_CODE (SET_SRC (set)) == SUBREG) 2228 SET_SRC (set) = alter_subreg (&SET_SRC (set)); 2229 else if (GET_CODE (SET_SRC (set)) == COMPARE) 2230 { 2231 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) 2232 XEXP (SET_SRC (set), 0) 2233 = alter_subreg (&XEXP (SET_SRC (set), 0)); 2234 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) 2235 XEXP (SET_SRC (set), 1) 2236 = alter_subreg (&XEXP (SET_SRC (set), 1)); 2237 } 2238 if ((cc_status.value1 != 0 2239 && rtx_equal_p (SET_SRC (set), cc_status.value1)) 2240 || (cc_status.value2 != 0 2241 && rtx_equal_p (SET_SRC (set), cc_status.value2))) 2242 { 2243 /* Don't delete insn if it has an addressing side-effect. */ 2244 if (! FIND_REG_INC_NOTE (insn, NULL_RTX) 2245 /* or if anything in it is volatile. */ 2246 && ! volatile_refs_p (PATTERN (insn))) 2247 { 2248 /* We don't really delete the insn; just ignore it. */ 2249 last_ignored_compare = insn; 2250 break; 2251 } 2252 } 2253 } 2254 } 2255#endif 2256 2257#ifdef HAVE_cc0 2258 /* If this is a conditional branch, maybe modify it 2259 if the cc's are in a nonstandard state 2260 so that it accomplishes the same thing that it would 2261 do straightforwardly if the cc's were set up normally. */ 2262 2263 if (cc_status.flags != 0 2264 && JUMP_P (insn) 2265 && GET_CODE (body) == SET 2266 && SET_DEST (body) == pc_rtx 2267 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE 2268 && COMPARISON_P (XEXP (SET_SRC (body), 0)) 2269 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) 2270 { 2271 /* This function may alter the contents of its argument 2272 and clear some of the cc_status.flags bits. 2273 It may also return 1 meaning condition now always true 2274 or -1 meaning condition now always false 2275 or 2 meaning condition nontrivial but altered. */ 2276 int result = alter_cond (XEXP (SET_SRC (body), 0)); 2277 /* If condition now has fixed value, replace the IF_THEN_ELSE 2278 with its then-operand or its else-operand. */ 2279 if (result == 1) 2280 SET_SRC (body) = XEXP (SET_SRC (body), 1); 2281 if (result == -1) 2282 SET_SRC (body) = XEXP (SET_SRC (body), 2); 2283 2284 /* The jump is now either unconditional or a no-op. 2285 If it has become a no-op, don't try to output it. 2286 (It would not be recognized.) */ 2287 if (SET_SRC (body) == pc_rtx) 2288 { 2289 delete_insn (insn); 2290 break; 2291 } 2292 else if (GET_CODE (SET_SRC (body)) == RETURN) 2293 /* Replace (set (pc) (return)) with (return). */ 2294 PATTERN (insn) = body = SET_SRC (body); 2295 2296 /* Rerecognize the instruction if it has changed. */ 2297 if (result != 0) 2298 INSN_CODE (insn) = -1; 2299 } 2300 2301 /* Make same adjustments to instructions that examine the 2302 condition codes without jumping and instructions that 2303 handle conditional moves (if this machine has either one). */ 2304 2305 if (cc_status.flags != 0 2306 && set != 0) 2307 { 2308 rtx cond_rtx, then_rtx, else_rtx; 2309 2310 if (!JUMP_P (insn) 2311 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) 2312 { 2313 cond_rtx = XEXP (SET_SRC (set), 0); 2314 then_rtx = XEXP (SET_SRC (set), 1); 2315 else_rtx = XEXP (SET_SRC (set), 2); 2316 } 2317 else 2318 { 2319 cond_rtx = SET_SRC (set); 2320 then_rtx = const_true_rtx; 2321 else_rtx = const0_rtx; 2322 } 2323 2324 switch (GET_CODE (cond_rtx)) 2325 { 2326 case GTU: 2327 case GT: 2328 case LTU: 2329 case LT: 2330 case GEU: 2331 case GE: 2332 case LEU: 2333 case LE: 2334 case EQ: 2335 case NE: 2336 { 2337 int result; 2338 if (XEXP (cond_rtx, 0) != cc0_rtx) 2339 break; 2340 result = alter_cond (cond_rtx); 2341 if (result == 1) 2342 validate_change (insn, &SET_SRC (set), then_rtx, 0); 2343 else if (result == -1) 2344 validate_change (insn, &SET_SRC (set), else_rtx, 0); 2345 else if (result == 2) 2346 INSN_CODE (insn) = -1; 2347 if (SET_DEST (set) == SET_SRC (set)) 2348 delete_insn (insn); 2349 } 2350 break; 2351 2352 default: 2353 break; 2354 } 2355 } 2356 2357#endif 2358 2359#ifdef HAVE_peephole 2360 /* Do machine-specific peephole optimizations if desired. */ 2361 2362 if (optimize && !flag_no_peephole && !nopeepholes) 2363 { 2364 rtx next = peephole (insn); 2365 /* When peepholing, if there were notes within the peephole, 2366 emit them before the peephole. */ 2367 if (next != 0 && next != NEXT_INSN (insn)) 2368 { 2369 rtx note, prev = PREV_INSN (insn); 2370 2371 for (note = NEXT_INSN (insn); note != next; 2372 note = NEXT_INSN (note)) 2373 final_scan_insn (note, file, optimize, nopeepholes, seen); 2374 2375 /* Put the notes in the proper position for a later 2376 rescan. For example, the SH target can do this 2377 when generating a far jump in a delayed branch 2378 sequence. */ 2379 note = NEXT_INSN (insn); 2380 PREV_INSN (note) = prev; 2381 NEXT_INSN (prev) = note; 2382 NEXT_INSN (PREV_INSN (next)) = insn; 2383 PREV_INSN (insn) = PREV_INSN (next); 2384 NEXT_INSN (insn) = next; 2385 PREV_INSN (next) = insn; 2386 } 2387 2388 /* PEEPHOLE might have changed this. */ 2389 body = PATTERN (insn); 2390 } 2391#endif 2392 2393 /* Try to recognize the instruction. 2394 If successful, verify that the operands satisfy the 2395 constraints for the instruction. Crash if they don't, 2396 since `reload' should have changed them so that they do. */ 2397 2398 insn_code_number = recog_memoized (insn); 2399 cleanup_subreg_operands (insn); 2400 2401 /* Dump the insn in the assembly for debugging. */ 2402 if (flag_dump_rtl_in_asm) 2403 { 2404 print_rtx_head = ASM_COMMENT_START; 2405 print_rtl_single (asm_out_file, insn); 2406 print_rtx_head = ""; 2407 } 2408 2409 if (! constrain_operands_cached (1)) 2410 fatal_insn_not_found (insn); 2411 2412 /* Some target machines need to prescan each insn before 2413 it is output. */ 2414 2415#ifdef FINAL_PRESCAN_INSN 2416 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); 2417#endif 2418 2419#ifdef HAVE_conditional_execution 2420 if (GET_CODE (PATTERN (insn)) == COND_EXEC) 2421 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); 2422 else 2423 current_insn_predicate = NULL_RTX; 2424#endif 2425 2426#ifdef HAVE_cc0 2427 cc_prev_status = cc_status; 2428 2429 /* Update `cc_status' for this instruction. 2430 The instruction's output routine may change it further. 2431 If the output routine for a jump insn needs to depend 2432 on the cc status, it should look at cc_prev_status. */ 2433 2434 NOTICE_UPDATE_CC (body, insn); 2435#endif 2436 2437 current_output_insn = debug_insn = insn; 2438 2439#if defined (DWARF2_UNWIND_INFO) 2440 if (CALL_P (insn) && dwarf2out_do_frame ()) 2441 dwarf2out_frame_debug (insn, false); 2442#endif 2443 2444 /* Find the proper template for this insn. */ 2445 template = get_insn_template (insn_code_number, insn); 2446 2447 /* If the C code returns 0, it means that it is a jump insn 2448 which follows a deleted test insn, and that test insn 2449 needs to be reinserted. */ 2450 if (template == 0) 2451 { 2452 rtx prev; 2453 2454 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); 2455 2456 /* We have already processed the notes between the setter and 2457 the user. Make sure we don't process them again, this is 2458 particularly important if one of the notes is a block 2459 scope note or an EH note. */ 2460 for (prev = insn; 2461 prev != last_ignored_compare; 2462 prev = PREV_INSN (prev)) 2463 { 2464 if (NOTE_P (prev)) 2465 delete_insn (prev); /* Use delete_note. */ 2466 } 2467 2468 return prev; 2469 } 2470 2471 /* If the template is the string "#", it means that this insn must 2472 be split. */ 2473 if (template[0] == '#' && template[1] == '\0') 2474 { 2475 rtx new = try_split (body, insn, 0); 2476 2477 /* If we didn't split the insn, go away. */ 2478 if (new == insn && PATTERN (new) == body) 2479 fatal_insn ("could not split insn", insn); 2480 2481#ifdef HAVE_ATTR_length 2482 /* This instruction should have been split in shorten_branches, 2483 to ensure that we would have valid length info for the 2484 splitees. */ 2485 gcc_unreachable (); 2486#endif 2487 2488 return new; 2489 } 2490 2491#ifdef TARGET_UNWIND_INFO 2492 /* ??? This will put the directives in the wrong place if 2493 get_insn_template outputs assembly directly. However calling it 2494 before get_insn_template breaks if the insns is split. */ 2495 targetm.asm_out.unwind_emit (asm_out_file, insn); 2496#endif 2497 2498 /* Output assembler code from the template. */ 2499 output_asm_insn (template, recog_data.operand); 2500 2501 /* If necessary, report the effect that the instruction has on 2502 the unwind info. We've already done this for delay slots 2503 and call instructions. */ 2504#if defined (DWARF2_UNWIND_INFO) 2505 if (final_sequence == 0 2506#if !defined (HAVE_prologue) 2507 && !ACCUMULATE_OUTGOING_ARGS 2508#endif 2509 && dwarf2out_do_frame ()) 2510 dwarf2out_frame_debug (insn, true); 2511#endif 2512 2513 current_output_insn = debug_insn = 0; 2514 } 2515 } 2516 return NEXT_INSN (insn); 2517} 2518 2519/* Return whether a source line note needs to be emitted before INSN. */ 2520 2521static bool 2522notice_source_line (rtx insn) 2523{ 2524 const char *filename = insn_file (insn); 2525 int linenum = insn_line (insn); 2526 2527 if (filename 2528 && (force_source_line 2529 || filename != last_filename 2530 || last_linenum != linenum)) 2531 { 2532 force_source_line = false; 2533 last_filename = filename; 2534 last_linenum = linenum; 2535 high_block_linenum = MAX (last_linenum, high_block_linenum); 2536 high_function_linenum = MAX (last_linenum, high_function_linenum); 2537 return true; 2538 } 2539 return false; 2540} 2541 2542/* For each operand in INSN, simplify (subreg (reg)) so that it refers 2543 directly to the desired hard register. */ 2544 2545void 2546cleanup_subreg_operands (rtx insn) 2547{ 2548 int i; 2549 extract_insn_cached (insn); 2550 for (i = 0; i < recog_data.n_operands; i++) 2551 { 2552 /* The following test cannot use recog_data.operand when testing 2553 for a SUBREG: the underlying object might have been changed 2554 already if we are inside a match_operator expression that 2555 matches the else clause. Instead we test the underlying 2556 expression directly. */ 2557 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) 2558 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]); 2559 else if (GET_CODE (recog_data.operand[i]) == PLUS 2560 || GET_CODE (recog_data.operand[i]) == MULT 2561 || MEM_P (recog_data.operand[i])) 2562 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]); 2563 } 2564 2565 for (i = 0; i < recog_data.n_dups; i++) 2566 { 2567 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) 2568 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]); 2569 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS 2570 || GET_CODE (*recog_data.dup_loc[i]) == MULT 2571 || MEM_P (*recog_data.dup_loc[i])) 2572 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]); 2573 } 2574} 2575 2576/* If X is a SUBREG, replace it with a REG or a MEM, 2577 based on the thing it is a subreg of. */ 2578 2579rtx 2580alter_subreg (rtx *xp) 2581{ 2582 rtx x = *xp; 2583 rtx y = SUBREG_REG (x); 2584 2585 /* simplify_subreg does not remove subreg from volatile references. 2586 We are required to. */ 2587 if (MEM_P (y)) 2588 { 2589 int offset = SUBREG_BYTE (x); 2590 2591 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE 2592 contains 0 instead of the proper offset. See simplify_subreg. */ 2593 if (offset == 0 2594 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) 2595 { 2596 int difference = GET_MODE_SIZE (GET_MODE (y)) 2597 - GET_MODE_SIZE (GET_MODE (x)); 2598 if (WORDS_BIG_ENDIAN) 2599 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; 2600 if (BYTES_BIG_ENDIAN) 2601 offset += difference % UNITS_PER_WORD; 2602 } 2603 2604 *xp = adjust_address (y, GET_MODE (x), offset); 2605 } 2606 else 2607 { 2608 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y), 2609 SUBREG_BYTE (x)); 2610 2611 if (new != 0) 2612 *xp = new; 2613 else if (REG_P (y)) 2614 { 2615 /* Simplify_subreg can't handle some REG cases, but we have to. */ 2616 unsigned int regno = subreg_regno (x); 2617 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x)); 2618 } 2619 } 2620 2621 return *xp; 2622} 2623 2624/* Do alter_subreg on all the SUBREGs contained in X. */ 2625 2626static rtx 2627walk_alter_subreg (rtx *xp) 2628{ 2629 rtx x = *xp; 2630 switch (GET_CODE (x)) 2631 { 2632 case PLUS: 2633 case MULT: 2634 case AND: 2635 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); 2636 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1)); 2637 break; 2638 2639 case MEM: 2640 case ZERO_EXTEND: 2641 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); 2642 break; 2643 2644 case SUBREG: 2645 return alter_subreg (xp); 2646 2647 default: 2648 break; 2649 } 2650 2651 return *xp; 2652} 2653 2654#ifdef HAVE_cc0 2655 2656/* Given BODY, the body of a jump instruction, alter the jump condition 2657 as required by the bits that are set in cc_status.flags. 2658 Not all of the bits there can be handled at this level in all cases. 2659 2660 The value is normally 0. 2661 1 means that the condition has become always true. 2662 -1 means that the condition has become always false. 2663 2 means that COND has been altered. */ 2664 2665static int 2666alter_cond (rtx cond) 2667{ 2668 int value = 0; 2669 2670 if (cc_status.flags & CC_REVERSED) 2671 { 2672 value = 2; 2673 PUT_CODE (cond, swap_condition (GET_CODE (cond))); 2674 } 2675 2676 if (cc_status.flags & CC_INVERTED) 2677 { 2678 value = 2; 2679 PUT_CODE (cond, reverse_condition (GET_CODE (cond))); 2680 } 2681 2682 if (cc_status.flags & CC_NOT_POSITIVE) 2683 switch (GET_CODE (cond)) 2684 { 2685 case LE: 2686 case LEU: 2687 case GEU: 2688 /* Jump becomes unconditional. */ 2689 return 1; 2690 2691 case GT: 2692 case GTU: 2693 case LTU: 2694 /* Jump becomes no-op. */ 2695 return -1; 2696 2697 case GE: 2698 PUT_CODE (cond, EQ); 2699 value = 2; 2700 break; 2701 2702 case LT: 2703 PUT_CODE (cond, NE); 2704 value = 2; 2705 break; 2706 2707 default: 2708 break; 2709 } 2710 2711 if (cc_status.flags & CC_NOT_NEGATIVE) 2712 switch (GET_CODE (cond)) 2713 { 2714 case GE: 2715 case GEU: 2716 /* Jump becomes unconditional. */ 2717 return 1; 2718 2719 case LT: 2720 case LTU: 2721 /* Jump becomes no-op. */ 2722 return -1; 2723 2724 case LE: 2725 case LEU: 2726 PUT_CODE (cond, EQ); 2727 value = 2; 2728 break; 2729 2730 case GT: 2731 case GTU: 2732 PUT_CODE (cond, NE); 2733 value = 2; 2734 break; 2735 2736 default: 2737 break; 2738 } 2739 2740 if (cc_status.flags & CC_NO_OVERFLOW) 2741 switch (GET_CODE (cond)) 2742 { 2743 case GEU: 2744 /* Jump becomes unconditional. */ 2745 return 1; 2746 2747 case LEU: 2748 PUT_CODE (cond, EQ); 2749 value = 2; 2750 break; 2751 2752 case GTU: 2753 PUT_CODE (cond, NE); 2754 value = 2; 2755 break; 2756 2757 case LTU: 2758 /* Jump becomes no-op. */ 2759 return -1; 2760 2761 default: 2762 break; 2763 } 2764 2765 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) 2766 switch (GET_CODE (cond)) 2767 { 2768 default: 2769 gcc_unreachable (); 2770 2771 case NE: 2772 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); 2773 value = 2; 2774 break; 2775 2776 case EQ: 2777 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); 2778 value = 2; 2779 break; 2780 } 2781 2782 if (cc_status.flags & CC_NOT_SIGNED) 2783 /* The flags are valid if signed condition operators are converted 2784 to unsigned. */ 2785 switch (GET_CODE (cond)) 2786 { 2787 case LE: 2788 PUT_CODE (cond, LEU); 2789 value = 2; 2790 break; 2791 2792 case LT: 2793 PUT_CODE (cond, LTU); 2794 value = 2; 2795 break; 2796 2797 case GT: 2798 PUT_CODE (cond, GTU); 2799 value = 2; 2800 break; 2801 2802 case GE: 2803 PUT_CODE (cond, GEU); 2804 value = 2; 2805 break; 2806 2807 default: 2808 break; 2809 } 2810 2811 return value; 2812} 2813#endif 2814 2815/* Report inconsistency between the assembler template and the operands. 2816 In an `asm', it's the user's fault; otherwise, the compiler's fault. */ 2817 2818void 2819output_operand_lossage (const char *cmsgid, ...) 2820{ 2821 char *fmt_string; 2822 char *new_message; 2823 const char *pfx_str; 2824 va_list ap; 2825 2826 va_start (ap, cmsgid); 2827 2828 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; 2829 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); 2830 vasprintf (&new_message, fmt_string, ap); 2831 2832 if (this_is_asm_operands) 2833 error_for_asm (this_is_asm_operands, "%s", new_message); 2834 else 2835 internal_error ("%s", new_message); 2836 2837 free (fmt_string); 2838 free (new_message); 2839 va_end (ap); 2840} 2841 2842/* Output of assembler code from a template, and its subroutines. */ 2843 2844/* Annotate the assembly with a comment describing the pattern and 2845 alternative used. */ 2846 2847static void 2848output_asm_name (void) 2849{ 2850 if (debug_insn) 2851 { 2852 int num = INSN_CODE (debug_insn); 2853 fprintf (asm_out_file, "\t%s %d\t%s", 2854 ASM_COMMENT_START, INSN_UID (debug_insn), 2855 insn_data[num].name); 2856 if (insn_data[num].n_alternatives > 1) 2857 fprintf (asm_out_file, "/%d", which_alternative + 1); 2858#ifdef HAVE_ATTR_length 2859 fprintf (asm_out_file, "\t[length = %d]", 2860 get_attr_length (debug_insn)); 2861#endif 2862 /* Clear this so only the first assembler insn 2863 of any rtl insn will get the special comment for -dp. */ 2864 debug_insn = 0; 2865 } 2866} 2867 2868/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it 2869 or its address, return that expr . Set *PADDRESSP to 1 if the expr 2870 corresponds to the address of the object and 0 if to the object. */ 2871 2872static tree 2873get_mem_expr_from_op (rtx op, int *paddressp) 2874{ 2875 tree expr; 2876 int inner_addressp; 2877 2878 *paddressp = 0; 2879 2880 if (REG_P (op)) 2881 return REG_EXPR (op); 2882 else if (!MEM_P (op)) 2883 return 0; 2884 2885 if (MEM_EXPR (op) != 0) 2886 return MEM_EXPR (op); 2887 2888 /* Otherwise we have an address, so indicate it and look at the address. */ 2889 *paddressp = 1; 2890 op = XEXP (op, 0); 2891 2892 /* First check if we have a decl for the address, then look at the right side 2893 if it is a PLUS. Otherwise, strip off arithmetic and keep looking. 2894 But don't allow the address to itself be indirect. */ 2895 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) 2896 return expr; 2897 else if (GET_CODE (op) == PLUS 2898 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) 2899 return expr; 2900 2901 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY 2902 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) 2903 op = XEXP (op, 0); 2904 2905 expr = get_mem_expr_from_op (op, &inner_addressp); 2906 return inner_addressp ? 0 : expr; 2907} 2908 2909/* Output operand names for assembler instructions. OPERANDS is the 2910 operand vector, OPORDER is the order to write the operands, and NOPS 2911 is the number of operands to write. */ 2912 2913static void 2914output_asm_operand_names (rtx *operands, int *oporder, int nops) 2915{ 2916 int wrote = 0; 2917 int i; 2918 2919 for (i = 0; i < nops; i++) 2920 { 2921 int addressp; 2922 rtx op = operands[oporder[i]]; 2923 tree expr = get_mem_expr_from_op (op, &addressp); 2924 2925 fprintf (asm_out_file, "%c%s", 2926 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); 2927 wrote = 1; 2928 if (expr) 2929 { 2930 fprintf (asm_out_file, "%s", 2931 addressp ? "*" : ""); 2932 print_mem_expr (asm_out_file, expr); 2933 wrote = 1; 2934 } 2935 else if (REG_P (op) && ORIGINAL_REGNO (op) 2936 && ORIGINAL_REGNO (op) != REGNO (op)) 2937 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); 2938 } 2939} 2940 2941/* Output text from TEMPLATE to the assembler output file, 2942 obeying %-directions to substitute operands taken from 2943 the vector OPERANDS. 2944 2945 %N (for N a digit) means print operand N in usual manner. 2946 %lN means require operand N to be a CODE_LABEL or LABEL_REF 2947 and print the label name with no punctuation. 2948 %cN means require operand N to be a constant 2949 and print the constant expression with no punctuation. 2950 %aN means expect operand N to be a memory address 2951 (not a memory reference!) and print a reference 2952 to that address. 2953 %nN means expect operand N to be a constant 2954 and print a constant expression for minus the value 2955 of the operand, with no other punctuation. */ 2956 2957void 2958output_asm_insn (const char *template, rtx *operands) 2959{ 2960 const char *p; 2961 int c; 2962#ifdef ASSEMBLER_DIALECT 2963 int dialect = 0; 2964#endif 2965 int oporder[MAX_RECOG_OPERANDS]; 2966 char opoutput[MAX_RECOG_OPERANDS]; 2967 int ops = 0; 2968 2969 /* An insn may return a null string template 2970 in a case where no assembler code is needed. */ 2971 if (*template == 0) 2972 return; 2973 2974 memset (opoutput, 0, sizeof opoutput); 2975 p = template; 2976 putc ('\t', asm_out_file); 2977 2978#ifdef ASM_OUTPUT_OPCODE 2979 ASM_OUTPUT_OPCODE (asm_out_file, p); 2980#endif 2981 2982 while ((c = *p++)) 2983 switch (c) 2984 { 2985 case '\n': 2986 if (flag_verbose_asm) 2987 output_asm_operand_names (operands, oporder, ops); 2988 if (flag_print_asm_name) 2989 output_asm_name (); 2990 2991 ops = 0; 2992 memset (opoutput, 0, sizeof opoutput); 2993 2994 putc (c, asm_out_file); 2995#ifdef ASM_OUTPUT_OPCODE 2996 while ((c = *p) == '\t') 2997 { 2998 putc (c, asm_out_file); 2999 p++; 3000 } 3001 ASM_OUTPUT_OPCODE (asm_out_file, p); 3002#endif 3003 break; 3004 3005#ifdef ASSEMBLER_DIALECT 3006 case '{': 3007 { 3008 int i; 3009 3010 if (dialect) 3011 output_operand_lossage ("nested assembly dialect alternatives"); 3012 else 3013 dialect = 1; 3014 3015 /* If we want the first dialect, do nothing. Otherwise, skip 3016 DIALECT_NUMBER of strings ending with '|'. */ 3017 for (i = 0; i < dialect_number; i++) 3018 { 3019 while (*p && *p != '}' && *p++ != '|') 3020 ; 3021 if (*p == '}') 3022 break; 3023 if (*p == '|') 3024 p++; 3025 } 3026 3027 if (*p == '\0') 3028 output_operand_lossage ("unterminated assembly dialect alternative"); 3029 } 3030 break; 3031 3032 case '|': 3033 if (dialect) 3034 { 3035 /* Skip to close brace. */ 3036 do 3037 { 3038 if (*p == '\0') 3039 { 3040 output_operand_lossage ("unterminated assembly dialect alternative"); 3041 break; 3042 } 3043 } 3044 while (*p++ != '}'); 3045 dialect = 0; 3046 } 3047 else 3048 putc (c, asm_out_file); 3049 break; 3050 3051 case '}': 3052 if (! dialect) 3053 putc (c, asm_out_file); 3054 dialect = 0; 3055 break; 3056#endif 3057 3058 case '%': 3059 /* %% outputs a single %. */ 3060 if (*p == '%') 3061 { 3062 p++; 3063 putc (c, asm_out_file); 3064 } 3065 /* %= outputs a number which is unique to each insn in the entire 3066 compilation. This is useful for making local labels that are 3067 referred to more than once in a given insn. */ 3068 else if (*p == '=') 3069 { 3070 p++; 3071 fprintf (asm_out_file, "%d", insn_counter); 3072 } 3073 /* % followed by a letter and some digits 3074 outputs an operand in a special way depending on the letter. 3075 Letters `acln' are implemented directly. 3076 Other letters are passed to `output_operand' so that 3077 the PRINT_OPERAND macro can define them. */ 3078 else if (ISALPHA (*p)) 3079 { 3080 int letter = *p++; 3081 unsigned long opnum; 3082 char *endptr; 3083 3084 opnum = strtoul (p, &endptr, 10); 3085 3086 if (endptr == p) 3087 output_operand_lossage ("operand number missing " 3088 "after %%-letter"); 3089 else if (this_is_asm_operands && opnum >= insn_noperands) 3090 output_operand_lossage ("operand number out of range"); 3091 else if (letter == 'l') 3092 output_asm_label (operands[opnum]); 3093 else if (letter == 'a') 3094 output_address (operands[opnum]); 3095 else if (letter == 'c') 3096 { 3097 if (CONSTANT_ADDRESS_P (operands[opnum])) 3098 output_addr_const (asm_out_file, operands[opnum]); 3099 else 3100 output_operand (operands[opnum], 'c'); 3101 } 3102 else if (letter == 'n') 3103 { 3104 if (GET_CODE (operands[opnum]) == CONST_INT) 3105 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, 3106 - INTVAL (operands[opnum])); 3107 else 3108 { 3109 putc ('-', asm_out_file); 3110 output_addr_const (asm_out_file, operands[opnum]); 3111 } 3112 } 3113 else 3114 output_operand (operands[opnum], letter); 3115 3116 if (!opoutput[opnum]) 3117 oporder[ops++] = opnum; 3118 opoutput[opnum] = 1; 3119 3120 p = endptr; 3121 c = *p; 3122 } 3123 /* % followed by a digit outputs an operand the default way. */ 3124 else if (ISDIGIT (*p)) 3125 { 3126 unsigned long opnum; 3127 char *endptr; 3128 3129 opnum = strtoul (p, &endptr, 10); 3130 if (this_is_asm_operands && opnum >= insn_noperands) 3131 output_operand_lossage ("operand number out of range"); 3132 else 3133 output_operand (operands[opnum], 0); 3134 3135 if (!opoutput[opnum]) 3136 oporder[ops++] = opnum; 3137 opoutput[opnum] = 1; 3138 3139 p = endptr; 3140 c = *p; 3141 } 3142 /* % followed by punctuation: output something for that 3143 punctuation character alone, with no operand. 3144 The PRINT_OPERAND macro decides what is actually done. */ 3145#ifdef PRINT_OPERAND_PUNCT_VALID_P 3146 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) 3147 output_operand (NULL_RTX, *p++); 3148#endif 3149 else 3150 output_operand_lossage ("invalid %%-code"); 3151 break; 3152 3153 default: 3154 putc (c, asm_out_file); 3155 } 3156 3157 /* Write out the variable names for operands, if we know them. */ 3158 if (flag_verbose_asm) 3159 output_asm_operand_names (operands, oporder, ops); 3160 if (flag_print_asm_name) 3161 output_asm_name (); 3162 3163 putc ('\n', asm_out_file); 3164} 3165 3166/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ 3167 3168void 3169output_asm_label (rtx x) 3170{ 3171 char buf[256]; 3172 3173 if (GET_CODE (x) == LABEL_REF) 3174 x = XEXP (x, 0); 3175 if (LABEL_P (x) 3176 || (NOTE_P (x) 3177 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL)) 3178 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 3179 else 3180 output_operand_lossage ("'%%l' operand isn't a label"); 3181 3182 assemble_name (asm_out_file, buf); 3183} 3184 3185/* Print operand X using machine-dependent assembler syntax. 3186 The macro PRINT_OPERAND is defined just to control this function. 3187 CODE is a non-digit that preceded the operand-number in the % spec, 3188 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char 3189 between the % and the digits. 3190 When CODE is a non-letter, X is 0. 3191 3192 The meanings of the letters are machine-dependent and controlled 3193 by PRINT_OPERAND. */ 3194 3195static void 3196output_operand (rtx x, int code ATTRIBUTE_UNUSED) 3197{ 3198 if (x && GET_CODE (x) == SUBREG) 3199 x = alter_subreg (&x); 3200 3201 /* X must not be a pseudo reg. */ 3202 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); 3203 3204 PRINT_OPERAND (asm_out_file, x, code); 3205} 3206 3207/* Print a memory reference operand for address X 3208 using machine-dependent assembler syntax. 3209 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ 3210 3211void 3212output_address (rtx x) 3213{ 3214 walk_alter_subreg (&x); 3215 PRINT_OPERAND_ADDRESS (asm_out_file, x); 3216} 3217 3218/* Print an integer constant expression in assembler syntax. 3219 Addition and subtraction are the only arithmetic 3220 that may appear in these expressions. */ 3221 3222void 3223output_addr_const (FILE *file, rtx x) 3224{ 3225 char buf[256]; 3226 3227 restart: 3228 switch (GET_CODE (x)) 3229 { 3230 case PC: 3231 putc ('.', file); 3232 break; 3233 3234 case SYMBOL_REF: 3235 if (SYMBOL_REF_DECL (x)) 3236 mark_decl_referenced (SYMBOL_REF_DECL (x)); 3237#ifdef ASM_OUTPUT_SYMBOL_REF 3238 ASM_OUTPUT_SYMBOL_REF (file, x); 3239#else 3240 assemble_name (file, XSTR (x, 0)); 3241#endif 3242 break; 3243 3244 case LABEL_REF: 3245 x = XEXP (x, 0); 3246 /* Fall through. */ 3247 case CODE_LABEL: 3248 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 3249#ifdef ASM_OUTPUT_LABEL_REF 3250 ASM_OUTPUT_LABEL_REF (file, buf); 3251#else 3252 assemble_name (file, buf); 3253#endif 3254 break; 3255 3256 case CONST_INT: 3257 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); 3258 break; 3259 3260 case CONST: 3261 /* This used to output parentheses around the expression, 3262 but that does not work on the 386 (either ATT or BSD assembler). */ 3263 output_addr_const (file, XEXP (x, 0)); 3264 break; 3265 3266 case CONST_DOUBLE: 3267 if (GET_MODE (x) == VOIDmode) 3268 { 3269 /* We can use %d if the number is one word and positive. */ 3270 if (CONST_DOUBLE_HIGH (x)) 3271 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, 3272 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x)); 3273 else if (CONST_DOUBLE_LOW (x) < 0) 3274 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x)); 3275 else 3276 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); 3277 } 3278 else 3279 /* We can't handle floating point constants; 3280 PRINT_OPERAND must handle them. */ 3281 output_operand_lossage ("floating constant misused"); 3282 break; 3283 3284 case PLUS: 3285 /* Some assemblers need integer constants to appear last (eg masm). */ 3286 if (GET_CODE (XEXP (x, 0)) == CONST_INT) 3287 { 3288 output_addr_const (file, XEXP (x, 1)); 3289 if (INTVAL (XEXP (x, 0)) >= 0) 3290 fprintf (file, "+"); 3291 output_addr_const (file, XEXP (x, 0)); 3292 } 3293 else 3294 { 3295 output_addr_const (file, XEXP (x, 0)); 3296 if (GET_CODE (XEXP (x, 1)) != CONST_INT 3297 || INTVAL (XEXP (x, 1)) >= 0) 3298 fprintf (file, "+"); 3299 output_addr_const (file, XEXP (x, 1)); 3300 } 3301 break; 3302 3303 case MINUS: 3304 /* Avoid outputting things like x-x or x+5-x, 3305 since some assemblers can't handle that. */ 3306 x = simplify_subtraction (x); 3307 if (GET_CODE (x) != MINUS) 3308 goto restart; 3309 3310 output_addr_const (file, XEXP (x, 0)); 3311 fprintf (file, "-"); 3312 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0) 3313 || GET_CODE (XEXP (x, 1)) == PC 3314 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) 3315 output_addr_const (file, XEXP (x, 1)); 3316 else 3317 { 3318 fputs (targetm.asm_out.open_paren, file); 3319 output_addr_const (file, XEXP (x, 1)); 3320 fputs (targetm.asm_out.close_paren, file); 3321 } 3322 break; 3323 3324 case ZERO_EXTEND: 3325 case SIGN_EXTEND: 3326 case SUBREG: 3327 output_addr_const (file, XEXP (x, 0)); 3328 break; 3329 3330 default: 3331#ifdef OUTPUT_ADDR_CONST_EXTRA 3332 OUTPUT_ADDR_CONST_EXTRA (file, x, fail); 3333 break; 3334 3335 fail: 3336#endif 3337 output_operand_lossage ("invalid expression as operand"); 3338 } 3339} 3340 3341/* A poor man's fprintf, with the added features of %I, %R, %L, and %U. 3342 %R prints the value of REGISTER_PREFIX. 3343 %L prints the value of LOCAL_LABEL_PREFIX. 3344 %U prints the value of USER_LABEL_PREFIX. 3345 %I prints the value of IMMEDIATE_PREFIX. 3346 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. 3347 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. 3348 3349 We handle alternate assembler dialects here, just like output_asm_insn. */ 3350 3351void 3352asm_fprintf (FILE *file, const char *p, ...) 3353{ 3354 char buf[10]; 3355 char *q, c; 3356 va_list argptr; 3357 3358 va_start (argptr, p); 3359 3360 buf[0] = '%'; 3361 3362 while ((c = *p++)) 3363 switch (c) 3364 { 3365#ifdef ASSEMBLER_DIALECT 3366 case '{': 3367 { 3368 int i; 3369 3370 /* If we want the first dialect, do nothing. Otherwise, skip 3371 DIALECT_NUMBER of strings ending with '|'. */ 3372 for (i = 0; i < dialect_number; i++) 3373 { 3374 while (*p && *p++ != '|') 3375 ; 3376 3377 if (*p == '|') 3378 p++; 3379 } 3380 } 3381 break; 3382 3383 case '|': 3384 /* Skip to close brace. */ 3385 while (*p && *p++ != '}') 3386 ; 3387 break; 3388 3389 case '}': 3390 break; 3391#endif 3392 3393 case '%': 3394 c = *p++; 3395 q = &buf[1]; 3396 while (strchr ("-+ #0", c)) 3397 { 3398 *q++ = c; 3399 c = *p++; 3400 } 3401 while (ISDIGIT (c) || c == '.') 3402 { 3403 *q++ = c; 3404 c = *p++; 3405 } 3406 switch (c) 3407 { 3408 case '%': 3409 putc ('%', file); 3410 break; 3411 3412 case 'd': case 'i': case 'u': 3413 case 'x': case 'X': case 'o': 3414 case 'c': 3415 *q++ = c; 3416 *q = 0; 3417 fprintf (file, buf, va_arg (argptr, int)); 3418 break; 3419 3420 case 'w': 3421 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and 3422 'o' cases, but we do not check for those cases. It 3423 means that the value is a HOST_WIDE_INT, which may be 3424 either `long' or `long long'. */ 3425 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); 3426 q += strlen (HOST_WIDE_INT_PRINT); 3427 *q++ = *p++; 3428 *q = 0; 3429 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); 3430 break; 3431 3432 case 'l': 3433 *q++ = c; 3434#ifdef HAVE_LONG_LONG 3435 if (*p == 'l') 3436 { 3437 *q++ = *p++; 3438 *q++ = *p++; 3439 *q = 0; 3440 fprintf (file, buf, va_arg (argptr, long long)); 3441 } 3442 else 3443#endif 3444 { 3445 *q++ = *p++; 3446 *q = 0; 3447 fprintf (file, buf, va_arg (argptr, long)); 3448 } 3449 3450 break; 3451 3452 case 's': 3453 *q++ = c; 3454 *q = 0; 3455 fprintf (file, buf, va_arg (argptr, char *)); 3456 break; 3457 3458 case 'O': 3459#ifdef ASM_OUTPUT_OPCODE 3460 ASM_OUTPUT_OPCODE (asm_out_file, p); 3461#endif 3462 break; 3463 3464 case 'R': 3465#ifdef REGISTER_PREFIX 3466 fprintf (file, "%s", REGISTER_PREFIX); 3467#endif 3468 break; 3469 3470 case 'I': 3471#ifdef IMMEDIATE_PREFIX 3472 fprintf (file, "%s", IMMEDIATE_PREFIX); 3473#endif 3474 break; 3475 3476 case 'L': 3477#ifdef LOCAL_LABEL_PREFIX 3478 fprintf (file, "%s", LOCAL_LABEL_PREFIX); 3479#endif 3480 break; 3481 3482 case 'U': 3483 fputs (user_label_prefix, file); 3484 break; 3485 3486#ifdef ASM_FPRINTF_EXTENSIONS 3487 /* Uppercase letters are reserved for general use by asm_fprintf 3488 and so are not available to target specific code. In order to 3489 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, 3490 they are defined here. As they get turned into real extensions 3491 to asm_fprintf they should be removed from this list. */ 3492 case 'A': case 'B': case 'C': case 'D': case 'E': 3493 case 'F': case 'G': case 'H': case 'J': case 'K': 3494 case 'M': case 'N': case 'P': case 'Q': case 'S': 3495 case 'T': case 'V': case 'W': case 'Y': case 'Z': 3496 break; 3497 3498 ASM_FPRINTF_EXTENSIONS (file, argptr, p) 3499#endif 3500 default: 3501 gcc_unreachable (); 3502 } 3503 break; 3504 3505 default: 3506 putc (c, file); 3507 } 3508 va_end (argptr); 3509} 3510 3511/* Split up a CONST_DOUBLE or integer constant rtx 3512 into two rtx's for single words, 3513 storing in *FIRST the word that comes first in memory in the target 3514 and in *SECOND the other. */ 3515 3516void 3517split_double (rtx value, rtx *first, rtx *second) 3518{ 3519 if (GET_CODE (value) == CONST_INT) 3520 { 3521 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) 3522 { 3523 /* In this case the CONST_INT holds both target words. 3524 Extract the bits from it into two word-sized pieces. 3525 Sign extend each half to HOST_WIDE_INT. */ 3526 unsigned HOST_WIDE_INT low, high; 3527 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; 3528 3529 /* Set sign_bit to the most significant bit of a word. */ 3530 sign_bit = 1; 3531 sign_bit <<= BITS_PER_WORD - 1; 3532 3533 /* Set mask so that all bits of the word are set. We could 3534 have used 1 << BITS_PER_WORD instead of basing the 3535 calculation on sign_bit. However, on machines where 3536 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a 3537 compiler warning, even though the code would never be 3538 executed. */ 3539 mask = sign_bit << 1; 3540 mask--; 3541 3542 /* Set sign_extend as any remaining bits. */ 3543 sign_extend = ~mask; 3544 3545 /* Pick the lower word and sign-extend it. */ 3546 low = INTVAL (value); 3547 low &= mask; 3548 if (low & sign_bit) 3549 low |= sign_extend; 3550 3551 /* Pick the higher word, shifted to the least significant 3552 bits, and sign-extend it. */ 3553 high = INTVAL (value); 3554 high >>= BITS_PER_WORD - 1; 3555 high >>= 1; 3556 high &= mask; 3557 if (high & sign_bit) 3558 high |= sign_extend; 3559 3560 /* Store the words in the target machine order. */ 3561 if (WORDS_BIG_ENDIAN) 3562 { 3563 *first = GEN_INT (high); 3564 *second = GEN_INT (low); 3565 } 3566 else 3567 { 3568 *first = GEN_INT (low); 3569 *second = GEN_INT (high); 3570 } 3571 } 3572 else 3573 { 3574 /* The rule for using CONST_INT for a wider mode 3575 is that we regard the value as signed. 3576 So sign-extend it. */ 3577 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); 3578 if (WORDS_BIG_ENDIAN) 3579 { 3580 *first = high; 3581 *second = value; 3582 } 3583 else 3584 { 3585 *first = value; 3586 *second = high; 3587 } 3588 } 3589 } 3590 else if (GET_CODE (value) != CONST_DOUBLE) 3591 { 3592 if (WORDS_BIG_ENDIAN) 3593 { 3594 *first = const0_rtx; 3595 *second = value; 3596 } 3597 else 3598 { 3599 *first = value; 3600 *second = const0_rtx; 3601 } 3602 } 3603 else if (GET_MODE (value) == VOIDmode 3604 /* This is the old way we did CONST_DOUBLE integers. */ 3605 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) 3606 { 3607 /* In an integer, the words are defined as most and least significant. 3608 So order them by the target's convention. */ 3609 if (WORDS_BIG_ENDIAN) 3610 { 3611 *first = GEN_INT (CONST_DOUBLE_HIGH (value)); 3612 *second = GEN_INT (CONST_DOUBLE_LOW (value)); 3613 } 3614 else 3615 { 3616 *first = GEN_INT (CONST_DOUBLE_LOW (value)); 3617 *second = GEN_INT (CONST_DOUBLE_HIGH (value)); 3618 } 3619 } 3620 else 3621 { 3622 REAL_VALUE_TYPE r; 3623 long l[2]; 3624 REAL_VALUE_FROM_CONST_DOUBLE (r, value); 3625 3626 /* Note, this converts the REAL_VALUE_TYPE to the target's 3627 format, splits up the floating point double and outputs 3628 exactly 32 bits of it into each of l[0] and l[1] -- 3629 not necessarily BITS_PER_WORD bits. */ 3630 REAL_VALUE_TO_TARGET_DOUBLE (r, l); 3631 3632 /* If 32 bits is an entire word for the target, but not for the host, 3633 then sign-extend on the host so that the number will look the same 3634 way on the host that it would on the target. See for instance 3635 simplify_unary_operation. The #if is needed to avoid compiler 3636 warnings. */ 3637 3638#if HOST_BITS_PER_LONG > 32 3639 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) 3640 { 3641 if (l[0] & ((long) 1 << 31)) 3642 l[0] |= ((long) (-1) << 32); 3643 if (l[1] & ((long) 1 << 31)) 3644 l[1] |= ((long) (-1) << 32); 3645 } 3646#endif 3647 3648 *first = GEN_INT (l[0]); 3649 *second = GEN_INT (l[1]); 3650 } 3651} 3652 3653/* Return nonzero if this function has no function calls. */ 3654 3655int 3656leaf_function_p (void) 3657{ 3658 rtx insn; 3659 rtx link; 3660 3661 if (current_function_profile || profile_arc_flag) 3662 return 0; 3663 3664 for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) 3665 { 3666 if (CALL_P (insn) 3667 && ! SIBLING_CALL_P (insn)) 3668 return 0; 3669 if (NONJUMP_INSN_P (insn) 3670 && GET_CODE (PATTERN (insn)) == SEQUENCE 3671 && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) 3672 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) 3673 return 0; 3674 } 3675 for (link = current_function_epilogue_delay_list; 3676 link; 3677 link = XEXP (link, 1)) 3678 { 3679 insn = XEXP (link, 0); 3680 3681 if (CALL_P (insn) 3682 && ! SIBLING_CALL_P (insn)) 3683 return 0; 3684 if (NONJUMP_INSN_P (insn) 3685 && GET_CODE (PATTERN (insn)) == SEQUENCE 3686 && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) 3687 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) 3688 return 0; 3689 } 3690 3691 return 1; 3692} 3693 3694/* Return 1 if branch is a forward branch. 3695 Uses insn_shuid array, so it works only in the final pass. May be used by 3696 output templates to customary add branch prediction hints. 3697 */ 3698int 3699final_forward_branch_p (rtx insn) 3700{ 3701 int insn_id, label_id; 3702 3703 gcc_assert (uid_shuid); 3704 insn_id = INSN_SHUID (insn); 3705 label_id = INSN_SHUID (JUMP_LABEL (insn)); 3706 /* We've hit some insns that does not have id information available. */ 3707 gcc_assert (insn_id && label_id); 3708 return insn_id < label_id; 3709} 3710 3711/* On some machines, a function with no call insns 3712 can run faster if it doesn't create its own register window. 3713 When output, the leaf function should use only the "output" 3714 registers. Ordinarily, the function would be compiled to use 3715 the "input" registers to find its arguments; it is a candidate 3716 for leaf treatment if it uses only the "input" registers. 3717 Leaf function treatment means renumbering so the function 3718 uses the "output" registers instead. */ 3719 3720#ifdef LEAF_REGISTERS 3721 3722/* Return 1 if this function uses only the registers that can be 3723 safely renumbered. */ 3724 3725int 3726only_leaf_regs_used (void) 3727{ 3728 int i; 3729 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; 3730 3731 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 3732 if ((regs_ever_live[i] || global_regs[i]) 3733 && ! permitted_reg_in_leaf_functions[i]) 3734 return 0; 3735 3736 if (current_function_uses_pic_offset_table 3737 && pic_offset_table_rtx != 0 3738 && REG_P (pic_offset_table_rtx) 3739 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) 3740 return 0; 3741 3742 return 1; 3743} 3744 3745/* Scan all instructions and renumber all registers into those 3746 available in leaf functions. */ 3747 3748static void 3749leaf_renumber_regs (rtx first) 3750{ 3751 rtx insn; 3752 3753 /* Renumber only the actual patterns. 3754 The reg-notes can contain frame pointer refs, 3755 and renumbering them could crash, and should not be needed. */ 3756 for (insn = first; insn; insn = NEXT_INSN (insn)) 3757 if (INSN_P (insn)) 3758 leaf_renumber_regs_insn (PATTERN (insn)); 3759 for (insn = current_function_epilogue_delay_list; 3760 insn; 3761 insn = XEXP (insn, 1)) 3762 if (INSN_P (XEXP (insn, 0))) 3763 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); 3764} 3765 3766/* Scan IN_RTX and its subexpressions, and renumber all regs into those 3767 available in leaf functions. */ 3768 3769void 3770leaf_renumber_regs_insn (rtx in_rtx) 3771{ 3772 int i, j; 3773 const char *format_ptr; 3774 3775 if (in_rtx == 0) 3776 return; 3777 3778 /* Renumber all input-registers into output-registers. 3779 renumbered_regs would be 1 for an output-register; 3780 they */ 3781 3782 if (REG_P (in_rtx)) 3783 { 3784 int newreg; 3785 3786 /* Don't renumber the same reg twice. */ 3787 if (in_rtx->used) 3788 return; 3789 3790 newreg = REGNO (in_rtx); 3791 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg 3792 to reach here as part of a REG_NOTE. */ 3793 if (newreg >= FIRST_PSEUDO_REGISTER) 3794 { 3795 in_rtx->used = 1; 3796 return; 3797 } 3798 newreg = LEAF_REG_REMAP (newreg); 3799 gcc_assert (newreg >= 0); 3800 regs_ever_live[REGNO (in_rtx)] = 0; 3801 regs_ever_live[newreg] = 1; 3802 REGNO (in_rtx) = newreg; 3803 in_rtx->used = 1; 3804 } 3805 3806 if (INSN_P (in_rtx)) 3807 { 3808 /* Inside a SEQUENCE, we find insns. 3809 Renumber just the patterns of these insns, 3810 just as we do for the top-level insns. */ 3811 leaf_renumber_regs_insn (PATTERN (in_rtx)); 3812 return; 3813 } 3814 3815 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); 3816 3817 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) 3818 switch (*format_ptr++) 3819 { 3820 case 'e': 3821 leaf_renumber_regs_insn (XEXP (in_rtx, i)); 3822 break; 3823 3824 case 'E': 3825 if (NULL != XVEC (in_rtx, i)) 3826 { 3827 for (j = 0; j < XVECLEN (in_rtx, i); j++) 3828 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); 3829 } 3830 break; 3831 3832 case 'S': 3833 case 's': 3834 case '0': 3835 case 'i': 3836 case 'w': 3837 case 'n': 3838 case 'u': 3839 break; 3840 3841 default: 3842 gcc_unreachable (); 3843 } 3844} 3845#endif 3846 3847 3848/* When -gused is used, emit debug info for only used symbols. But in 3849 addition to the standard intercepted debug_hooks there are some direct 3850 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params. 3851 Those routines may also be called from a higher level intercepted routine. So 3852 to prevent recording data for an inner call to one of these for an intercept, 3853 we maintain an intercept nesting counter (debug_nesting). We only save the 3854 intercepted arguments if the nesting is 1. */ 3855int debug_nesting = 0; 3856 3857static tree *symbol_queue; 3858int symbol_queue_index = 0; 3859static int symbol_queue_size = 0; 3860 3861/* Generate the symbols for any queued up type symbols we encountered 3862 while generating the type info for some originally used symbol. 3863 This might generate additional entries in the queue. Only when 3864 the nesting depth goes to 0 is this routine called. */ 3865 3866void 3867debug_flush_symbol_queue (void) 3868{ 3869 int i; 3870 3871 /* Make sure that additionally queued items are not flushed 3872 prematurely. */ 3873 3874 ++debug_nesting; 3875 3876 for (i = 0; i < symbol_queue_index; ++i) 3877 { 3878 /* If we pushed queued symbols then such symbols are must be 3879 output no matter what anyone else says. Specifically, 3880 we need to make sure dbxout_symbol() thinks the symbol was 3881 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG 3882 which may be set for outside reasons. */ 3883 int saved_tree_used = TREE_USED (symbol_queue[i]); 3884 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]); 3885 TREE_USED (symbol_queue[i]) = 1; 3886 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0; 3887 3888#ifdef DBX_DEBUGGING_INFO 3889 dbxout_symbol (symbol_queue[i], 0); 3890#endif 3891 3892 TREE_USED (symbol_queue[i]) = saved_tree_used; 3893 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug; 3894 } 3895 3896 symbol_queue_index = 0; 3897 --debug_nesting; 3898} 3899 3900/* Queue a type symbol needed as part of the definition of a decl 3901 symbol. These symbols are generated when debug_flush_symbol_queue() 3902 is called. */ 3903 3904void 3905debug_queue_symbol (tree decl) 3906{ 3907 if (symbol_queue_index >= symbol_queue_size) 3908 { 3909 symbol_queue_size += 10; 3910 symbol_queue = xrealloc (symbol_queue, 3911 symbol_queue_size * sizeof (tree)); 3912 } 3913 3914 symbol_queue[symbol_queue_index++] = decl; 3915} 3916 3917/* Free symbol queue. */ 3918void 3919debug_free_queue (void) 3920{ 3921 if (symbol_queue) 3922 { 3923 free (symbol_queue); 3924 symbol_queue = NULL; 3925 symbol_queue_size = 0; 3926 } 3927} 3928 3929/* Turn the RTL into assembly. */ 3930static void 3931rest_of_handle_final (void) 3932{ 3933 rtx x; 3934 const char *fnname; 3935 3936 /* Get the function's name, as described by its RTL. This may be 3937 different from the DECL_NAME name used in the source file. */ 3938 3939 x = DECL_RTL (current_function_decl); 3940 gcc_assert (MEM_P (x)); 3941 x = XEXP (x, 0); 3942 gcc_assert (GET_CODE (x) == SYMBOL_REF); 3943 fnname = XSTR (x, 0); 3944 3945 assemble_start_function (current_function_decl, fnname); 3946 final_start_function (get_insns (), asm_out_file, optimize); 3947 final (get_insns (), asm_out_file, optimize); 3948 final_end_function (); 3949 3950#ifdef TARGET_UNWIND_INFO 3951 /* ??? The IA-64 ".handlerdata" directive must be issued before 3952 the ".endp" directive that closes the procedure descriptor. */ 3953 output_function_exception_table (); 3954#endif 3955 3956 assemble_end_function (current_function_decl, fnname); 3957 3958#ifndef TARGET_UNWIND_INFO 3959 /* Otherwise, it feels unclean to switch sections in the middle. */ 3960 output_function_exception_table (); 3961#endif 3962 3963 user_defined_section_attribute = false; 3964 3965 if (! quiet_flag) 3966 fflush (asm_out_file); 3967 3968 /* Release all memory allocated by flow. */ 3969 free_basic_block_vars (); 3970 3971 /* Write DBX symbols if requested. */ 3972 3973 /* Note that for those inline functions where we don't initially 3974 know for certain that we will be generating an out-of-line copy, 3975 the first invocation of this routine (rest_of_compilation) will 3976 skip over this code by doing a `goto exit_rest_of_compilation;'. 3977 Later on, wrapup_global_declarations will (indirectly) call 3978 rest_of_compilation again for those inline functions that need 3979 to have out-of-line copies generated. During that call, we 3980 *will* be routed past here. */ 3981 3982 timevar_push (TV_SYMOUT); 3983 (*debug_hooks->function_decl) (current_function_decl); 3984 timevar_pop (TV_SYMOUT); 3985} 3986 3987struct tree_opt_pass pass_final = 3988{ 3989 NULL, /* name */ 3990 NULL, /* gate */ 3991 rest_of_handle_final, /* execute */ 3992 NULL, /* sub */ 3993 NULL, /* next */ 3994 0, /* static_pass_number */ 3995 TV_FINAL, /* tv_id */ 3996 0, /* properties_required */ 3997 0, /* properties_provided */ 3998 0, /* properties_destroyed */ 3999 0, /* todo_flags_start */ 4000 TODO_ggc_collect, /* todo_flags_finish */ 4001 0 /* letter */ 4002}; 4003 4004 4005static void 4006rest_of_handle_shorten_branches (void) 4007{ 4008 /* Shorten branches. */ 4009 shorten_branches (get_insns ()); 4010} 4011 4012struct tree_opt_pass pass_shorten_branches = 4013{ 4014 "shorten", /* name */ 4015 NULL, /* gate */ 4016 rest_of_handle_shorten_branches, /* execute */ 4017 NULL, /* sub */ 4018 NULL, /* next */ 4019 0, /* static_pass_number */ 4020 TV_FINAL, /* tv_id */ 4021 0, /* properties_required */ 4022 0, /* properties_provided */ 4023 0, /* properties_destroyed */ 4024 0, /* todo_flags_start */ 4025 TODO_dump_func, /* todo_flags_finish */ 4026 0 /* letter */ 4027}; 4028 4029 4030static void 4031rest_of_clean_state (void) 4032{ 4033 rtx insn, next; 4034 4035 /* It is very important to decompose the RTL instruction chain here: 4036 debug information keeps pointing into CODE_LABEL insns inside the function 4037 body. If these remain pointing to the other insns, we end up preserving 4038 whole RTL chain and attached detailed debug info in memory. */ 4039 for (insn = get_insns (); insn; insn = next) 4040 { 4041 next = NEXT_INSN (insn); 4042 NEXT_INSN (insn) = NULL; 4043 PREV_INSN (insn) = NULL; 4044 } 4045 4046 /* In case the function was not output, 4047 don't leave any temporary anonymous types 4048 queued up for sdb output. */ 4049#ifdef SDB_DEBUGGING_INFO 4050 if (write_symbols == SDB_DEBUG) 4051 sdbout_types (NULL_TREE); 4052#endif 4053 4054 reload_completed = 0; 4055 epilogue_completed = 0; 4056 flow2_completed = 0; 4057 no_new_pseudos = 0; 4058 4059 /* Clear out the insn_length contents now that they are no 4060 longer valid. */ 4061 init_insn_lengths (); 4062 4063 /* Show no temporary slots allocated. */ 4064 init_temp_slots (); 4065 4066 free_basic_block_vars (); 4067 free_bb_for_insn (); 4068 4069 4070 if (targetm.binds_local_p (current_function_decl)) 4071 { 4072 int pref = cfun->preferred_stack_boundary; 4073 if (cfun->stack_alignment_needed > cfun->preferred_stack_boundary) 4074 pref = cfun->stack_alignment_needed; 4075 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary 4076 = pref; 4077 } 4078 4079 /* Make sure volatile mem refs aren't considered valid operands for 4080 arithmetic insns. We must call this here if this is a nested inline 4081 function, since the above code leaves us in the init_recog state, 4082 and the function context push/pop code does not save/restore volatile_ok. 4083 4084 ??? Maybe it isn't necessary for expand_start_function to call this 4085 anymore if we do it here? */ 4086 4087 init_recog_no_volatile (); 4088 4089 /* We're done with this function. Free up memory if we can. */ 4090 free_after_parsing (cfun); 4091 free_after_compilation (cfun); 4092} 4093 4094struct tree_opt_pass pass_clean_state = 4095{ 4096 NULL, /* name */ 4097 NULL, /* gate */ 4098 rest_of_clean_state, /* execute */ 4099 NULL, /* sub */ 4100 NULL, /* next */ 4101 0, /* static_pass_number */ 4102 TV_FINAL, /* tv_id */ 4103 0, /* properties_required */ 4104 0, /* properties_provided */ 4105 PROP_rtl, /* properties_destroyed */ 4106 0, /* todo_flags_start */ 4107 0, /* todo_flags_finish */ 4108 0 /* letter */ 4109}; 4110 4111