1/* Architecture, machine, and model support.
2   Copyright (C) 1997, 1998, 1999, 2007, 2008, 2009, 2010, 2011
3   Free Software Foundation, Inc.
4   Contributed by Cygnus Support.
5
6This file is part of GDB, the GNU debugger.
7
8This program is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
10the Free Software Foundation; either version 3 of the License, or
11(at your option) any later version.
12
13This program is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
21/* Nomenclature:
22   architecture = one of sparc, mips, sh, etc.
23   in the sparc architecture, mach = one of v6, v7, v8, sparclite, etc.
24   in the v8 mach, model = one of supersparc, etc.
25*/
26
27/* This file is intended to be included by sim-basics.h.  */
28
29#ifndef SIM_MODEL_H
30#define SIM_MODEL_H
31
32/* Function unit and instruction timing support.
33   ??? This is obviously insufficiently general.
34   It's useful but it needs elaborating upon.  */
35
36typedef struct {
37  unsigned char name; /* actually a UNIT_TYPE enum */
38  unsigned char issue;
39  unsigned char done;
40} UNIT;
41
42#ifndef MAX_UNITS
43#define MAX_UNITS 1
44#endif
45
46typedef int (MODEL_FN) (sim_cpu *, void *);
47
48typedef struct {
49  /* This is an integer that identifies this insn.
50     How this works is up to the target.  */
51  int num;
52
53  /* Function to handle insn-specific profiling.  */
54  MODEL_FN *model_fn;
55
56  /* Array of function units used by this insn.  */
57  UNIT units[MAX_UNITS];
58} INSN_TIMING;
59
60/* Struct to describe various implementation properties of a cpu.
61   When multiple cpu variants are supported, the sizes of some structs
62   can vary.  */
63
64typedef struct {
65  /* The size of the SIM_CPU struct.  */
66  int sim_cpu_size;
67#define IMP_PROPS_SIM_CPU_SIZE(cpu_props) ((cpu_props)->sim_cpu_size)
68  /* An SCACHE element can vary in size, depending on the selected cpu.
69     This is zero if the SCACHE isn't in use for this variant.  */
70  int scache_elm_size;
71#define IMP_PROPS_SCACHE_ELM_SIZE(cpu_props) ((cpu_props)->scache_elm_size)
72} MACH_IMP_PROPERTIES;
73
74/* A machine variant.  */
75
76typedef struct {
77  const char *name;
78#define MACH_NAME(m) ((m)->name)
79  /* This is the argument to bfd_scan_arch.  */
80  const char *bfd_name;
81#define MACH_BFD_NAME(m) ((m)->bfd_name)
82  enum mach_attr num;
83#define MACH_NUM(m) ((m)->num)
84
85  int word_bitsize;
86#define MACH_WORD_BITSIZE(m) ((m)->word_bitsize)
87  int addr_bitsize;
88#define MACH_ADDR_BITSIZE(m) ((m)->addr_bitsize)
89
90  /* Pointer to null-entry terminated table of models of this mach.
91     The default is the first one.  */
92  const struct model *models;
93#define MACH_MODELS(m) ((m)->models)
94
95  /* Pointer to the implementation properties of this mach.  */
96  const MACH_IMP_PROPERTIES *imp_props;
97#define MACH_IMP_PROPS(m) ((m)->imp_props)
98
99  /* Called by sim_model_set when the model of a cpu is set.  */
100  void (* init_cpu) (sim_cpu *);
101#define MACH_INIT_CPU(m) ((m)->init_cpu)
102
103  /* Initialize the simulator engine for this cpu.
104     Used by cgen simulators to initialize the insn descriptor table.  */
105  void (* prepare_run) (sim_cpu *);
106#define MACH_PREPARE_RUN(m) ((m)->prepare_run)
107} MACH;
108
109/* A model (implementation) of a machine.  */
110
111typedef struct model {
112  const char *name;
113#define MODEL_NAME(m) ((m)->name)
114  const MACH *mach;
115#define MODEL_MACH(m) ((m)->mach)
116  /* An enum that distinguished the model.  */
117  int num;
118#define MODEL_NUM(m) ((m)->num)
119  /* Pointer to timing table for this model.  */
120  const INSN_TIMING *timing;
121#define MODEL_TIMING(m) ((m)->timing)
122  void (* init) (sim_cpu *);
123#define MODEL_INIT(m) ((m)->init)
124} MODEL;
125
126/* Tables of supported machines.  */
127/* ??? In a simulator of multiple architectures, will need multiple copies of
128   this.  Have an `archs' array that contains a pointer to the machs array
129   for each (which in turn has a pointer to the models array for each).  */
130extern const MACH *sim_machs[];
131
132/* Model module handlers.  */
133extern MODULE_INSTALL_FN sim_model_install;
134
135/* Support routines.  */
136extern void sim_model_set (SIM_DESC sd_, sim_cpu *cpu_, const MODEL *model_);
137extern const MODEL * sim_model_lookup (const char *name_);
138extern const MACH * sim_mach_lookup (const char *name_);
139extern const MACH * sim_mach_lookup_bfd_name (const char *bfd_name_);
140
141#endif /* SIM_MODEL_H */
142