1/* Compute different info about registers.
2   Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3   1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4   2009  Free Software Foundation, Inc.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 3, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3.  If not see
20<http://www.gnu.org/licenses/>.  */
21
22
23/* This file contains regscan pass of the compiler and passes for
24   dealing with info about modes of pseudo-registers inside
25   subregisters.  It also defines some tables of information about the
26   hardware registers, function init_reg_sets to initialize the
27   tables, and other auxiliary functions to deal with info about
28   registers and their classes.  */
29
30#include "config.h"
31#include "system.h"
32#include "coretypes.h"
33#include "tm.h"
34#include "hard-reg-set.h"
35#include "rtl.h"
36#include "expr.h"
37#include "tm_p.h"
38#include "flags.h"
39#include "basic-block.h"
40#include "regs.h"
41#include "addresses.h"
42#include "function.h"
43#include "insn-config.h"
44#include "recog.h"
45#include "reload.h"
46#include "real.h"
47#include "toplev.h"
48#include "output.h"
49#include "ggc.h"
50#include "timevar.h"
51#include "hashtab.h"
52#include "target.h"
53#include "tree-pass.h"
54#include "df.h"
55#include "ira.h"
56
57/* Maximum register number used in this function, plus one.  */
58
59int max_regno;
60
61
62/* Register tables used by many passes.  */
63
64/* Indexed by hard register number, contains 1 for registers
65   that are fixed use (stack pointer, pc, frame pointer, etc.).
66   These are the registers that cannot be used to allocate
67   a pseudo reg for general use.  */
68char fixed_regs[FIRST_PSEUDO_REGISTER];
69
70/* Same info as a HARD_REG_SET.  */
71HARD_REG_SET fixed_reg_set;
72
73/* Data for initializing the above.  */
74static const char initial_fixed_regs[] = FIXED_REGISTERS;
75
76/* Indexed by hard register number, contains 1 for registers
77   that are fixed use or are clobbered by function calls.
78   These are the registers that cannot be used to allocate
79   a pseudo reg whose life crosses calls unless we are able
80   to save/restore them across the calls.  */
81char call_used_regs[FIRST_PSEUDO_REGISTER];
82
83/* Same info as a HARD_REG_SET.  */
84HARD_REG_SET call_used_reg_set;
85
86/* Data for initializing the above.  */
87static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
88
89/* This is much like call_used_regs, except it doesn't have to
90   be a superset of FIXED_REGISTERS. This vector indicates
91   what is really call clobbered, and is used when defining
92   regs_invalidated_by_call.  */
93#ifdef CALL_REALLY_USED_REGISTERS
94char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
95#endif
96
97#ifdef CALL_REALLY_USED_REGISTERS
98#define CALL_REALLY_USED_REGNO_P(X)  call_really_used_regs[X]
99#else
100#define CALL_REALLY_USED_REGNO_P(X)  call_used_regs[X]
101#endif
102
103
104/* Contains registers that are fixed use -- i.e. in fixed_reg_set -- or
105   a function value return register or TARGET_STRUCT_VALUE_RTX or
106   STATIC_CHAIN_REGNUM.  These are the registers that cannot hold quantities
107   across calls even if we are willing to save and restore them.  */
108
109HARD_REG_SET call_fixed_reg_set;
110
111/* Indexed by hard register number, contains 1 for registers
112   that are being used for global register decls.
113   These must be exempt from ordinary flow analysis
114   and are also considered fixed.  */
115char global_regs[FIRST_PSEUDO_REGISTER];
116
117/* Contains 1 for registers that are set or clobbered by calls.  */
118/* ??? Ideally, this would be just call_used_regs plus global_regs, but
119   for someone's bright idea to have call_used_regs strictly include
120   fixed_regs.  Which leaves us guessing as to the set of fixed_regs
121   that are actually preserved.  We know for sure that those associated
122   with the local stack frame are safe, but scant others.  */
123HARD_REG_SET regs_invalidated_by_call;
124
125/* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
126   in dataflow more conveniently.  */
127regset regs_invalidated_by_call_regset;
128
129/* The bitmap_obstack is used to hold some static variables that
130   should not be reset after each function is compiled.  */
131static bitmap_obstack persistent_obstack;
132
133/* Table of register numbers in the order in which to try to use them.  */
134#ifdef REG_ALLOC_ORDER
135int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
136
137/* The inverse of reg_alloc_order.  */
138int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
139#endif
140
141/* For each reg class, a HARD_REG_SET saying which registers are in it.  */
142HARD_REG_SET reg_class_contents[N_REG_CLASSES];
143
144/* The same information, but as an array of unsigned ints.  We copy from
145   these unsigned ints to the table above.  We do this so the tm.h files
146   do not have to be aware of the wordsize for machines with <= 64 regs.
147   Note that we hard-code 32 here, not HOST_BITS_PER_INT.  */
148#define N_REG_INTS  \
149  ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
150
151static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
152  = REG_CLASS_CONTENTS;
153
154/* For each reg class, number of regs it contains.  */
155unsigned int reg_class_size[N_REG_CLASSES];
156
157/* For each reg class, table listing all the classes contained in it.  */
158enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
159
160/* For each pair of reg classes,
161   a largest reg class contained in their union.  */
162enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
163
164/* For each pair of reg classes,
165   the smallest reg class containing their union.  */
166enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
167
168/* Array containing all of the register names.  */
169const char * reg_names[] = REGISTER_NAMES;
170
171/* Array containing all of the register class names.  */
172const char * reg_class_names[] = REG_CLASS_NAMES;
173
174/* For each hard register, the widest mode object that it can contain.
175   This will be a MODE_INT mode if the register can hold integers.  Otherwise
176   it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
177   register.  */
178enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
179
180/* 1 if there is a register of given mode.  */
181bool have_regs_of_mode [MAX_MACHINE_MODE];
182
183/* 1 if class does contain register of given mode.  */
184char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
185
186/* Maximum cost of moving from a register in one class to a register in
187   another class.  Based on REGISTER_MOVE_COST.  */
188move_table *move_cost[MAX_MACHINE_MODE];
189
190/* Similar, but here we don't have to move if the first index is a subset
191   of the second so in that case the cost is zero.  */
192move_table *may_move_in_cost[MAX_MACHINE_MODE];
193
194/* Similar, but here we don't have to move if the first index is a superset
195   of the second so in that case the cost is zero.  */
196move_table *may_move_out_cost[MAX_MACHINE_MODE];
197
198/* Keep track of the last mode we initialized move costs for.  */
199static int last_mode_for_init_move_cost;
200
201/* Sample MEM values for use by memory_move_secondary_cost.  */
202static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
203
204/* No more global register variables may be declared; true once
205   reginfo has been initialized.  */
206static int no_global_reg_vars = 0;
207
208/* Specify number of hard registers given machine mode occupy.  */
209unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
210
211/* Given a register bitmap, turn on the bits in a HARD_REG_SET that
212   correspond to the hard registers, if any, set in that map.  This
213   could be done far more efficiently by having all sorts of special-cases
214   with moving single words, but probably isn't worth the trouble.  */
215void
216reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
217{
218  unsigned i;
219  bitmap_iterator bi;
220
221  EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
222    {
223      if (i >= FIRST_PSEUDO_REGISTER)
224	return;
225      SET_HARD_REG_BIT (*to, i);
226    }
227}
228
229/* Function called only once to initialize the above data on reg usage.
230   Once this is done, various switches may override.  */
231void
232init_reg_sets (void)
233{
234  int i, j;
235
236  /* First copy the register information from the initial int form into
237     the regsets.  */
238
239  for (i = 0; i < N_REG_CLASSES; i++)
240    {
241      CLEAR_HARD_REG_SET (reg_class_contents[i]);
242
243      /* Note that we hard-code 32 here, not HOST_BITS_PER_INT.  */
244      for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
245	if (int_reg_class_contents[i][j / 32]
246	    & ((unsigned) 1 << (j % 32)))
247	  SET_HARD_REG_BIT (reg_class_contents[i], j);
248    }
249
250  /* Sanity check: make sure the target macros FIXED_REGISTERS and
251     CALL_USED_REGISTERS had the right number of initializers.  */
252  gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
253  gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
254
255  memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
256  memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
257  memset (global_regs, 0, sizeof global_regs);
258}
259
260/* Initialize may_move_cost and friends for mode M.  */
261void
262init_move_cost (enum machine_mode m)
263{
264  static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
265  bool all_match = true;
266  unsigned int i, j;
267
268  gcc_assert (have_regs_of_mode[m]);
269  for (i = 0; i < N_REG_CLASSES; i++)
270    if (contains_reg_of_mode[i][m])
271      for (j = 0; j < N_REG_CLASSES; j++)
272	{
273	  int cost;
274	  if (!contains_reg_of_mode[j][m])
275	    cost = 65535;
276	  else
277	    {
278	      cost = REGISTER_MOVE_COST (m, (enum reg_class) i,
279					 (enum reg_class) j);
280	      gcc_assert (cost < 65535);
281	    }
282	  all_match &= (last_move_cost[i][j] == cost);
283	  last_move_cost[i][j] = cost;
284	}
285  if (all_match && last_mode_for_init_move_cost != -1)
286    {
287      move_cost[m] = move_cost[last_mode_for_init_move_cost];
288      may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
289      may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
290      return;
291    }
292  last_mode_for_init_move_cost = m;
293  move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
294					* N_REG_CLASSES);
295  may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
296					       * N_REG_CLASSES);
297  may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
298					        * N_REG_CLASSES);
299  for (i = 0; i < N_REG_CLASSES; i++)
300    if (contains_reg_of_mode[i][m])
301      for (j = 0; j < N_REG_CLASSES; j++)
302	{
303	  int cost;
304	  enum reg_class *p1, *p2;
305
306	  if (last_move_cost[i][j] == 65535)
307	    {
308	      move_cost[m][i][j] = 65535;
309	      may_move_in_cost[m][i][j] = 65535;
310	      may_move_out_cost[m][i][j] = 65535;
311	    }
312	  else
313	    {
314	      cost = last_move_cost[i][j];
315
316	      for (p2 = &reg_class_subclasses[j][0];
317		   *p2 != LIM_REG_CLASSES; p2++)
318		if (*p2 != i && contains_reg_of_mode[*p2][m])
319		  cost = MAX (cost, move_cost[m][i][*p2]);
320
321	      for (p1 = &reg_class_subclasses[i][0];
322		   *p1 != LIM_REG_CLASSES; p1++)
323		if (*p1 != j && contains_reg_of_mode[*p1][m])
324		  cost = MAX (cost, move_cost[m][*p1][j]);
325
326	      gcc_assert (cost <= 65535);
327	      move_cost[m][i][j] = cost;
328
329	      if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
330		may_move_in_cost[m][i][j] = 0;
331	      else
332		may_move_in_cost[m][i][j] = cost;
333
334	      if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
335		may_move_out_cost[m][i][j] = 0;
336	      else
337		may_move_out_cost[m][i][j] = cost;
338	    }
339	}
340    else
341      for (j = 0; j < N_REG_CLASSES; j++)
342	{
343	  move_cost[m][i][j] = 65535;
344	  may_move_in_cost[m][i][j] = 65535;
345	  may_move_out_cost[m][i][j] = 65535;
346	}
347}
348
349/* We need to save copies of some of the register information which
350   can be munged by command-line switches so we can restore it during
351   subsequent back-end reinitialization.  */
352static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
353static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
354#ifdef CALL_REALLY_USED_REGISTERS
355static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
356#endif
357static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
358
359/* Save the register information.  */
360void
361save_register_info (void)
362{
363  /* Sanity check:  make sure the target macros FIXED_REGISTERS and
364     CALL_USED_REGISTERS had the right number of initializers.  */
365  gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
366  gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
367  memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
368  memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
369
370  /* Likewise for call_really_used_regs.  */
371#ifdef CALL_REALLY_USED_REGISTERS
372  gcc_assert (sizeof call_really_used_regs
373	      == sizeof saved_call_really_used_regs);
374  memcpy (saved_call_really_used_regs, call_really_used_regs,
375	  sizeof call_really_used_regs);
376#endif
377
378  /* And similarly for reg_names.  */
379  gcc_assert (sizeof reg_names == sizeof saved_reg_names);
380  memcpy (saved_reg_names, reg_names, sizeof reg_names);
381}
382
383/* Restore the register information.  */
384static void
385restore_register_info (void)
386{
387  memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
388  memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
389
390#ifdef CALL_REALLY_USED_REGISTERS
391  memcpy (call_really_used_regs, saved_call_really_used_regs,
392	  sizeof call_really_used_regs);
393#endif
394
395  memcpy (reg_names, saved_reg_names, sizeof reg_names);
396}
397
398/* After switches have been processed, which perhaps alter
399   `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs.  */
400static void
401init_reg_sets_1 (void)
402{
403  unsigned int i, j;
404  unsigned int /* enum machine_mode */ m;
405
406  restore_register_info ();
407
408#ifdef REG_ALLOC_ORDER
409  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
410    inv_reg_alloc_order[reg_alloc_order[i]] = i;
411#endif
412
413  /* This macro allows the fixed or call-used registers
414     and the register classes to depend on target flags.  */
415
416#ifdef CONDITIONAL_REGISTER_USAGE
417  CONDITIONAL_REGISTER_USAGE;
418#endif
419
420  /* Compute number of hard regs in each class.  */
421
422  memset (reg_class_size, 0, sizeof reg_class_size);
423  for (i = 0; i < N_REG_CLASSES; i++)
424    for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
425      if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
426	reg_class_size[i]++;
427
428  /* Initialize the table of subunions.
429     reg_class_subunion[I][J] gets the largest-numbered reg-class
430     that is contained in the union of classes I and J.  */
431
432  memset (reg_class_subunion, 0, sizeof reg_class_subunion);
433  for (i = 0; i < N_REG_CLASSES; i++)
434    {
435      for (j = 0; j < N_REG_CLASSES; j++)
436	{
437	  HARD_REG_SET c;
438	  int k;
439
440	  COPY_HARD_REG_SET (c, reg_class_contents[i]);
441	  IOR_HARD_REG_SET (c, reg_class_contents[j]);
442	  for (k = 0; k < N_REG_CLASSES; k++)
443	    if (hard_reg_set_subset_p (reg_class_contents[k], c)
444		&& !hard_reg_set_subset_p (reg_class_contents[k],
445					  reg_class_contents
446					  [(int) reg_class_subunion[i][j]]))
447	      reg_class_subunion[i][j] = (enum reg_class) k;
448	}
449    }
450
451  /* Initialize the table of superunions.
452     reg_class_superunion[I][J] gets the smallest-numbered reg-class
453     containing the union of classes I and J.  */
454
455  memset (reg_class_superunion, 0, sizeof reg_class_superunion);
456  for (i = 0; i < N_REG_CLASSES; i++)
457    {
458      for (j = 0; j < N_REG_CLASSES; j++)
459	{
460	  HARD_REG_SET c;
461	  int k;
462
463	  COPY_HARD_REG_SET (c, reg_class_contents[i]);
464	  IOR_HARD_REG_SET (c, reg_class_contents[j]);
465	  for (k = 0; k < N_REG_CLASSES; k++)
466	    if (hard_reg_set_subset_p (c, reg_class_contents[k]))
467	      break;
468
469	  reg_class_superunion[i][j] = (enum reg_class) k;
470	}
471    }
472
473  /* Initialize the tables of subclasses and superclasses of each reg class.
474     First clear the whole table, then add the elements as they are found.  */
475
476  for (i = 0; i < N_REG_CLASSES; i++)
477    {
478      for (j = 0; j < N_REG_CLASSES; j++)
479	reg_class_subclasses[i][j] = LIM_REG_CLASSES;
480    }
481
482  for (i = 0; i < N_REG_CLASSES; i++)
483    {
484      if (i == (int) NO_REGS)
485	continue;
486
487      for (j = i + 1; j < N_REG_CLASSES; j++)
488	if (hard_reg_set_subset_p (reg_class_contents[i],
489				  reg_class_contents[j]))
490	  {
491	    /* Reg class I is a subclass of J.
492	       Add J to the table of superclasses of I.  */
493	    enum reg_class *p;
494
495	    /* Add I to the table of superclasses of J.  */
496	    p = &reg_class_subclasses[j][0];
497	    while (*p != LIM_REG_CLASSES) p++;
498	    *p = (enum reg_class) i;
499	  }
500    }
501
502  /* Initialize "constant" tables.  */
503
504  CLEAR_HARD_REG_SET (fixed_reg_set);
505  CLEAR_HARD_REG_SET (call_used_reg_set);
506  CLEAR_HARD_REG_SET (call_fixed_reg_set);
507  CLEAR_HARD_REG_SET (regs_invalidated_by_call);
508  if (!regs_invalidated_by_call_regset)
509    {
510      bitmap_obstack_initialize (&persistent_obstack);
511      regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
512    }
513  else
514    CLEAR_REG_SET (regs_invalidated_by_call_regset);
515
516  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
517    {
518      /* call_used_regs must include fixed_regs.  */
519      gcc_assert (!fixed_regs[i] || call_used_regs[i]);
520#ifdef CALL_REALLY_USED_REGISTERS
521      /* call_used_regs must include call_really_used_regs.  */
522      gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
523#endif
524
525      if (fixed_regs[i])
526	SET_HARD_REG_BIT (fixed_reg_set, i);
527
528      if (call_used_regs[i])
529	SET_HARD_REG_BIT (call_used_reg_set, i);
530
531      /* There are a couple of fixed registers that we know are safe to
532	 exclude from being clobbered by calls:
533
534	 The frame pointer is always preserved across calls.  The arg pointer
535	 is if it is fixed.  The stack pointer usually is, unless
536	 RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
537	 If we are generating PIC code, the PIC offset table register is
538	 preserved across calls, though the target can override that.  */
539
540      if (i == STACK_POINTER_REGNUM)
541	;
542      else if (global_regs[i])
543        {
544	  SET_HARD_REG_BIT (regs_invalidated_by_call, i);
545	  SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
546	}
547      else if (i == FRAME_POINTER_REGNUM)
548	;
549#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
550      else if (i == HARD_FRAME_POINTER_REGNUM)
551	;
552#endif
553#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
554      else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
555	;
556#endif
557#ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
558      else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
559	;
560#endif
561      else if (CALL_REALLY_USED_REGNO_P (i))
562        {
563	  SET_HARD_REG_BIT (regs_invalidated_by_call, i);
564	  SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
565        }
566    }
567
568  COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
569
570  /* Preserve global registers if called more than once.  */
571  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
572    {
573      if (global_regs[i])
574	{
575	  fixed_regs[i] = call_used_regs[i] = 1;
576	  SET_HARD_REG_BIT (fixed_reg_set, i);
577	  SET_HARD_REG_BIT (call_used_reg_set, i);
578	  SET_HARD_REG_BIT (call_fixed_reg_set, i);
579	}
580    }
581
582  memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
583  memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
584  for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
585    {
586      HARD_REG_SET ok_regs;
587      CLEAR_HARD_REG_SET (ok_regs);
588      for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
589	if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
590	  SET_HARD_REG_BIT (ok_regs, j);
591
592      for (i = 0; i < N_REG_CLASSES; i++)
593	if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i,
594					 (enum machine_mode) m)
595	     <= reg_class_size[i])
596	    && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
597	  {
598	     contains_reg_of_mode [i][m] = 1;
599	     have_regs_of_mode [m] = 1;
600	  }
601     }
602
603  /* Reset move_cost and friends, making sure we only free shared
604     table entries once.  */
605  for (i = 0; i < MAX_MACHINE_MODE; i++)
606    if (move_cost[i])
607      {
608	for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
609	  ;
610	if (i == j)
611	  {
612	    free (move_cost[i]);
613	    free (may_move_in_cost[i]);
614	    free (may_move_out_cost[i]);
615	  }
616      }
617  memset (move_cost, 0, sizeof move_cost);
618  memset (may_move_in_cost, 0, sizeof may_move_in_cost);
619  memset (may_move_out_cost, 0, sizeof may_move_out_cost);
620  last_mode_for_init_move_cost = -1;
621}
622
623/* Compute the table of register modes.
624   These values are used to record death information for individual registers
625   (as opposed to a multi-register mode).
626   This function might be invoked more than once, if the target has support
627   for changing register usage conventions on a per-function basis.
628*/
629void
630init_reg_modes_target (void)
631{
632  int i, j;
633
634  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
635    for (j = 0; j < MAX_MACHINE_MODE; j++)
636      hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
637
638  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
639    {
640      reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
641
642      /* If we couldn't find a valid mode, just use the previous mode.
643         ??? One situation in which we need to do this is on the mips where
644	 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2.  Ideally we'd like
645	 to use DF mode for the even registers and VOIDmode for the odd
646	 (for the cpu models where the odd ones are inaccessible).  */
647      if (reg_raw_mode[i] == VOIDmode)
648	reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
649    }
650}
651
652/* Finish initializing the register sets and initialize the register modes.
653   This function might be invoked more than once, if the target has support
654   for changing register usage conventions on a per-function basis.
655*/
656void
657init_regs (void)
658{
659  /* This finishes what was started by init_reg_sets, but couldn't be done
660     until after register usage was specified.  */
661  init_reg_sets_1 ();
662}
663
664/* The same as previous function plus initializing IRA.  */
665void
666reinit_regs (void)
667{
668  init_regs ();
669  /* caller_save needs to be re-initialized.  */
670  caller_save_initialized_p = false;
671  ira_init ();
672}
673
674/* Initialize some fake stack-frame MEM references for use in
675   memory_move_secondary_cost.  */
676void
677init_fake_stack_mems (void)
678{
679  int i;
680
681  for (i = 0; i < MAX_MACHINE_MODE; i++)
682    top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
683}
684
685
686/* Compute extra cost of moving registers to/from memory due to reloads.
687   Only needed if secondary reloads are required for memory moves.  */
688int
689memory_move_secondary_cost (enum machine_mode mode, enum reg_class rclass,
690			    int in)
691{
692  enum reg_class altclass;
693  int partial_cost = 0;
694  /* We need a memory reference to feed to SECONDARY... macros.  */
695  /* mem may be unused even if the SECONDARY_ macros are defined.  */
696  rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
697
698  altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
699
700  if (altclass == NO_REGS)
701    return 0;
702
703  if (in)
704    partial_cost = REGISTER_MOVE_COST (mode, altclass, rclass);
705  else
706    partial_cost = REGISTER_MOVE_COST (mode, rclass, altclass);
707
708  if (rclass == altclass)
709    /* This isn't simply a copy-to-temporary situation.  Can't guess
710       what it is, so MEMORY_MOVE_COST really ought not to be calling
711       here in that case.
712
713       I'm tempted to put in an assert here, but returning this will
714       probably only give poor estimates, which is what we would've
715       had before this code anyways.  */
716    return partial_cost;
717
718  /* Check if the secondary reload register will also need a
719     secondary reload.  */
720  return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
721}
722
723/* Return a machine mode that is legitimate for hard reg REGNO and large
724   enough to save nregs.  If we can't find one, return VOIDmode.
725   If CALL_SAVED is true, only consider modes that are call saved.  */
726enum machine_mode
727choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
728		      unsigned int nregs, bool call_saved)
729{
730  unsigned int /* enum machine_mode */ m;
731  enum machine_mode found_mode = VOIDmode, mode;
732
733  /* We first look for the largest integer mode that can be validly
734     held in REGNO.  If none, we look for the largest floating-point mode.
735     If we still didn't find a valid mode, try CCmode.  */
736
737  for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
738       mode != VOIDmode;
739       mode = GET_MODE_WIDER_MODE (mode))
740    if ((unsigned) hard_regno_nregs[regno][mode] == nregs
741	&& HARD_REGNO_MODE_OK (regno, mode)
742	&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
743      found_mode = mode;
744
745  if (found_mode != VOIDmode)
746    return found_mode;
747
748  for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
749       mode != VOIDmode;
750       mode = GET_MODE_WIDER_MODE (mode))
751    if ((unsigned) hard_regno_nregs[regno][mode] == nregs
752	&& HARD_REGNO_MODE_OK (regno, mode)
753	&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
754      found_mode = mode;
755
756  if (found_mode != VOIDmode)
757    return found_mode;
758
759  for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
760       mode != VOIDmode;
761       mode = GET_MODE_WIDER_MODE (mode))
762    if ((unsigned) hard_regno_nregs[regno][mode] == nregs
763	&& HARD_REGNO_MODE_OK (regno, mode)
764	&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
765      found_mode = mode;
766
767  if (found_mode != VOIDmode)
768    return found_mode;
769
770  for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
771       mode != VOIDmode;
772       mode = GET_MODE_WIDER_MODE (mode))
773    if ((unsigned) hard_regno_nregs[regno][mode] == nregs
774	&& HARD_REGNO_MODE_OK (regno, mode)
775	&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
776      found_mode = mode;
777
778  if (found_mode != VOIDmode)
779    return found_mode;
780
781  /* Iterate over all of the CCmodes.  */
782  for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
783    {
784      mode = (enum machine_mode) m;
785      if ((unsigned) hard_regno_nregs[regno][mode] == nregs
786	  && HARD_REGNO_MODE_OK (regno, mode)
787	  && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
788	return mode;
789    }
790
791  /* We can't find a mode valid for this register.  */
792  return VOIDmode;
793}
794
795/* Specify the usage characteristics of the register named NAME.
796   It should be a fixed register if FIXED and a
797   call-used register if CALL_USED.  */
798void
799fix_register (const char *name, int fixed, int call_used)
800{
801  int i;
802
803  /* Decode the name and update the primary form of
804     the register info.  */
805
806  if ((i = decode_reg_name (name)) >= 0)
807    {
808      if ((i == STACK_POINTER_REGNUM
809#ifdef HARD_FRAME_POINTER_REGNUM
810	   || i == HARD_FRAME_POINTER_REGNUM
811#else
812	   || i == FRAME_POINTER_REGNUM
813#endif
814	   )
815	  && (fixed == 0 || call_used == 0))
816	{
817	  static const char * const what_option[2][2] = {
818	    { "call-saved", "call-used" },
819	    { "no-such-option", "fixed" }};
820
821	  error ("can't use '%s' as a %s register", name,
822		 what_option[fixed][call_used]);
823	}
824      else
825	{
826	  fixed_regs[i] = fixed;
827	  call_used_regs[i] = call_used;
828#ifdef CALL_REALLY_USED_REGISTERS
829	  if (fixed == 0)
830	    call_really_used_regs[i] = call_used;
831#endif
832	}
833    }
834  else
835    {
836      warning (0, "unknown register name: %s", name);
837    }
838}
839
840/* Mark register number I as global.  */
841void
842globalize_reg (int i)
843{
844#ifdef STACK_REGS
845  if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
846    {
847      error ("stack register used for global register variable");
848      return;
849    }
850#endif
851
852  if (fixed_regs[i] == 0 && no_global_reg_vars)
853    error ("global register variable follows a function definition");
854
855  if (global_regs[i])
856    {
857      warning (0, "register used for two global register variables");
858      return;
859    }
860
861  if (call_used_regs[i] && ! fixed_regs[i])
862    warning (0, "call-clobbered register used for global register variable");
863
864  global_regs[i] = 1;
865
866  /* If we're globalizing the frame pointer, we need to set the
867     appropriate regs_invalidated_by_call bit, even if it's already
868     set in fixed_regs.  */
869  if (i != STACK_POINTER_REGNUM)
870    {
871      SET_HARD_REG_BIT (regs_invalidated_by_call, i);
872      SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
873    }
874
875  /* If already fixed, nothing else to do.  */
876  if (fixed_regs[i])
877    return;
878
879  fixed_regs[i] = call_used_regs[i] = 1;
880#ifdef CALL_REALLY_USED_REGISTERS
881  call_really_used_regs[i] = 1;
882#endif
883
884  SET_HARD_REG_BIT (fixed_reg_set, i);
885  SET_HARD_REG_BIT (call_used_reg_set, i);
886  SET_HARD_REG_BIT (call_fixed_reg_set, i);
887
888  reinit_regs ();
889}
890
891
892/* Structure used to record preferences of given pseudo.  */
893struct reg_pref
894{
895  /* (enum reg_class) prefclass is the preferred class.  May be
896     NO_REGS if no class is better than memory.  */
897  char prefclass;
898
899  /* altclass is a register class that we should use for allocating
900     pseudo if no register in the preferred class is available.
901     If no register in this class is available, memory is preferred.
902
903     It might appear to be more general to have a bitmask of classes here,
904     but since it is recommended that there be a class corresponding to the
905     union of most major pair of classes, that generality is not required.  */
906  char altclass;
907
908  /* coverclass is a register class that IRA uses for allocating
909     the pseudo.  */
910  char coverclass;
911};
912
913/* Record preferences of each pseudo.  This is available after RA is
914   run.  */
915static struct reg_pref *reg_pref;
916
917/* Current size of reg_info.  */
918static int reg_info_size;
919
920/* Return the reg_class in which pseudo reg number REGNO is best allocated.
921   This function is sometimes called before the info has been computed.
922   When that happens, just return GENERAL_REGS, which is innocuous.  */
923enum reg_class
924reg_preferred_class (int regno)
925{
926  if (reg_pref == 0)
927    return GENERAL_REGS;
928
929  return (enum reg_class) reg_pref[regno].prefclass;
930}
931
932enum reg_class
933reg_alternate_class (int regno)
934{
935  if (reg_pref == 0)
936    return ALL_REGS;
937
938  return (enum reg_class) reg_pref[regno].altclass;
939}
940
941/* Return the reg_class which is used by IRA for its allocation.  */
942enum reg_class
943reg_cover_class (int regno)
944{
945  if (reg_pref == 0)
946    return NO_REGS;
947
948  return (enum reg_class) reg_pref[regno].coverclass;
949}
950
951
952
953/* Allocate space for reg info.  */
954static void
955allocate_reg_info (void)
956{
957  reg_info_size = max_reg_num ();
958  gcc_assert (! reg_pref && ! reg_renumber);
959  reg_renumber = XNEWVEC (short, reg_info_size);
960  reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
961  memset (reg_renumber, -1, reg_info_size * sizeof (short));
962}
963
964
965/* Resize reg info. The new elements will be uninitialized.  Return
966   TRUE if new elements (for new pseudos) were added.  */
967bool
968resize_reg_info (void)
969{
970  int old;
971
972  if (reg_pref == NULL)
973    {
974      allocate_reg_info ();
975      return true;
976    }
977  if (reg_info_size == max_reg_num ())
978    return false;
979  old = reg_info_size;
980  reg_info_size = max_reg_num ();
981  gcc_assert (reg_pref && reg_renumber);
982  reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
983  reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
984  memset (reg_pref + old, -1,
985	  (reg_info_size - old) * sizeof (struct reg_pref));
986  memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
987  return true;
988}
989
990
991/* Free up the space allocated by allocate_reg_info.  */
992void
993free_reg_info (void)
994{
995  if (reg_pref)
996    {
997      free (reg_pref);
998      reg_pref = NULL;
999    }
1000
1001  if (reg_renumber)
1002    {
1003      free (reg_renumber);
1004      reg_renumber = NULL;
1005    }
1006}
1007
1008/* Initialize some global data for this pass.  */
1009static unsigned int
1010reginfo_init (void)
1011{
1012  if (df)
1013    df_compute_regs_ever_live (true);
1014
1015  /* This prevents dump_flow_info from losing if called
1016     before reginfo is run.  */
1017  reg_pref = NULL;
1018  /* No more global register variables may be declared.  */
1019  no_global_reg_vars = 1;
1020  return 1;
1021}
1022
1023struct rtl_opt_pass pass_reginfo_init =
1024{
1025 {
1026  RTL_PASS,
1027  "reginfo",                            /* name */
1028  NULL,                                 /* gate */
1029  reginfo_init,                         /* execute */
1030  NULL,                                 /* sub */
1031  NULL,                                 /* next */
1032  0,                                    /* static_pass_number */
1033  TV_NONE,                                    /* tv_id */
1034  0,                                    /* properties_required */
1035  0,                                    /* properties_provided */
1036  0,                                    /* properties_destroyed */
1037  0,                                    /* todo_flags_start */
1038  0                                     /* todo_flags_finish */
1039 }
1040};
1041
1042
1043
1044/* Set up preferred, alternate, and cover classes for REGNO as
1045   PREFCLASS, ALTCLASS, and COVERCLASS.  */
1046void
1047setup_reg_classes (int regno,
1048		   enum reg_class prefclass, enum reg_class altclass,
1049		   enum reg_class coverclass)
1050{
1051  if (reg_pref == NULL)
1052    return;
1053  gcc_assert (reg_info_size == max_reg_num ());
1054  reg_pref[regno].prefclass = prefclass;
1055  reg_pref[regno].altclass = altclass;
1056  reg_pref[regno].coverclass = coverclass;
1057}
1058
1059
1060/* This is the `regscan' pass of the compiler, run just before cse and
1061   again just before loop.  It finds the first and last use of each
1062   pseudo-register.  */
1063
1064static void reg_scan_mark_refs (rtx, rtx);
1065
1066void
1067reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1068{
1069  rtx insn;
1070
1071  timevar_push (TV_REG_SCAN);
1072
1073  for (insn = f; insn; insn = NEXT_INSN (insn))
1074    if (INSN_P (insn))
1075      {
1076	reg_scan_mark_refs (PATTERN (insn), insn);
1077	if (REG_NOTES (insn))
1078	  reg_scan_mark_refs (REG_NOTES (insn), insn);
1079      }
1080
1081  timevar_pop (TV_REG_SCAN);
1082}
1083
1084
1085/* X is the expression to scan.  INSN is the insn it appears in.
1086   NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1087   We should only record information for REGs with numbers
1088   greater than or equal to MIN_REGNO.  */
1089static void
1090reg_scan_mark_refs (rtx x, rtx insn)
1091{
1092  enum rtx_code code;
1093  rtx dest;
1094  rtx note;
1095
1096  if (!x)
1097    return;
1098  code = GET_CODE (x);
1099  switch (code)
1100    {
1101    case CONST:
1102    case CONST_INT:
1103    case CONST_DOUBLE:
1104    case CONST_FIXED:
1105    case CONST_VECTOR:
1106    case CC0:
1107    case PC:
1108    case SYMBOL_REF:
1109    case LABEL_REF:
1110    case ADDR_VEC:
1111    case ADDR_DIFF_VEC:
1112    case REG:
1113      return;
1114
1115    case EXPR_LIST:
1116      if (XEXP (x, 0))
1117	reg_scan_mark_refs (XEXP (x, 0), insn);
1118      if (XEXP (x, 1))
1119	reg_scan_mark_refs (XEXP (x, 1), insn);
1120      break;
1121
1122    case INSN_LIST:
1123      if (XEXP (x, 1))
1124	reg_scan_mark_refs (XEXP (x, 1), insn);
1125      break;
1126
1127    case CLOBBER:
1128      if (MEM_P (XEXP (x, 0)))
1129	reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1130      break;
1131
1132    case SET:
1133      /* Count a set of the destination if it is a register.  */
1134      for (dest = SET_DEST (x);
1135	   GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1136	   || GET_CODE (dest) == ZERO_EXTEND;
1137	   dest = XEXP (dest, 0))
1138	;
1139
1140      /* If this is setting a pseudo from another pseudo or the sum of a
1141	 pseudo and a constant integer and the other pseudo is known to be
1142	 a pointer, set the destination to be a pointer as well.
1143
1144	 Likewise if it is setting the destination from an address or from a
1145	 value equivalent to an address or to the sum of an address and
1146	 something else.
1147
1148	 But don't do any of this if the pseudo corresponds to a user
1149	 variable since it should have already been set as a pointer based
1150	 on the type.  */
1151
1152      if (REG_P (SET_DEST (x))
1153	  && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1154	  /* If the destination pseudo is set more than once, then other
1155	     sets might not be to a pointer value (consider access to a
1156	     union in two threads of control in the presence of global
1157	     optimizations).  So only set REG_POINTER on the destination
1158	     pseudo if this is the only set of that pseudo.  */
1159	  && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1160	  && ! REG_USERVAR_P (SET_DEST (x))
1161	  && ! REG_POINTER (SET_DEST (x))
1162	  && ((REG_P (SET_SRC (x))
1163	       && REG_POINTER (SET_SRC (x)))
1164	      || ((GET_CODE (SET_SRC (x)) == PLUS
1165		   || GET_CODE (SET_SRC (x)) == LO_SUM)
1166		  && CONST_INT_P (XEXP (SET_SRC (x), 1))
1167		  && REG_P (XEXP (SET_SRC (x), 0))
1168		  && REG_POINTER (XEXP (SET_SRC (x), 0)))
1169	      || GET_CODE (SET_SRC (x)) == CONST
1170	      || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1171	      || GET_CODE (SET_SRC (x)) == LABEL_REF
1172	      || (GET_CODE (SET_SRC (x)) == HIGH
1173		  && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1174		      || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1175		      || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1176	      || ((GET_CODE (SET_SRC (x)) == PLUS
1177		   || GET_CODE (SET_SRC (x)) == LO_SUM)
1178		  && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1179		      || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1180		      || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1181	      || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1182		  && (GET_CODE (XEXP (note, 0)) == CONST
1183		      || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1184		      || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1185	REG_POINTER (SET_DEST (x)) = 1;
1186
1187      /* If this is setting a register from a register or from a simple
1188	 conversion of a register, propagate REG_EXPR.  */
1189      if (REG_P (dest) && !REG_ATTRS (dest))
1190	{
1191	  rtx src = SET_SRC (x);
1192
1193	  while (GET_CODE (src) == SIGN_EXTEND
1194		 || GET_CODE (src) == ZERO_EXTEND
1195		 || GET_CODE (src) == TRUNCATE
1196		 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1197	    src = XEXP (src, 0);
1198
1199	  set_reg_attrs_from_value (dest, src);
1200	}
1201
1202      /* ... fall through ...  */
1203
1204    default:
1205      {
1206	const char *fmt = GET_RTX_FORMAT (code);
1207	int i;
1208	for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1209	  {
1210	    if (fmt[i] == 'e')
1211	      reg_scan_mark_refs (XEXP (x, i), insn);
1212	    else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1213	      {
1214		int j;
1215		for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1216		  reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1217	      }
1218	  }
1219      }
1220    }
1221}
1222
1223
1224/* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1225   is also in C2.  */
1226int
1227reg_class_subset_p (enum reg_class c1, enum reg_class c2)
1228{
1229  return (c1 == c2
1230	  || c2 == ALL_REGS
1231	  || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1232				   reg_class_contents[(int) c2]));
1233}
1234
1235/* Return nonzero if there is a register that is in both C1 and C2.  */
1236int
1237reg_classes_intersect_p (enum reg_class c1, enum reg_class c2)
1238{
1239  return (c1 == c2
1240	  || c1 == ALL_REGS
1241	  || c2 == ALL_REGS
1242	  || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1243				      reg_class_contents[(int) c2]));
1244}
1245
1246
1247
1248/* Passes for keeping and updating info about modes of registers
1249   inside subregisters.  */
1250
1251#ifdef CANNOT_CHANGE_MODE_CLASS
1252
1253struct subregs_of_mode_node
1254{
1255  unsigned int block;
1256  unsigned char modes[MAX_MACHINE_MODE];
1257};
1258
1259static htab_t subregs_of_mode;
1260
1261static hashval_t
1262som_hash (const void *x)
1263{
1264  const struct subregs_of_mode_node *const a =
1265    (const struct subregs_of_mode_node *) x;
1266  return a->block;
1267}
1268
1269static int
1270som_eq (const void *x, const void *y)
1271{
1272  const struct subregs_of_mode_node *const a =
1273    (const struct subregs_of_mode_node *) x;
1274  const struct subregs_of_mode_node *const b =
1275    (const struct subregs_of_mode_node *) y;
1276  return a->block == b->block;
1277}
1278
1279static void
1280record_subregs_of_mode (rtx subreg)
1281{
1282  struct subregs_of_mode_node dummy, *node;
1283  enum machine_mode mode;
1284  unsigned int regno;
1285  void **slot;
1286
1287  if (!REG_P (SUBREG_REG (subreg)))
1288    return;
1289
1290  regno = REGNO (SUBREG_REG (subreg));
1291  mode = GET_MODE (subreg);
1292
1293  if (regno < FIRST_PSEUDO_REGISTER)
1294    return;
1295
1296  dummy.block = regno & -8;
1297  slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
1298				   dummy.block, INSERT);
1299  node = (struct subregs_of_mode_node *) *slot;
1300  if (node == NULL)
1301    {
1302      node = XCNEW (struct subregs_of_mode_node);
1303      node->block = regno & -8;
1304      *slot = node;
1305    }
1306
1307  node->modes[mode] |= 1 << (regno & 7);
1308}
1309
1310/* Call record_subregs_of_mode for all the subregs in X.  */
1311static void
1312find_subregs_of_mode (rtx x)
1313{
1314  enum rtx_code code = GET_CODE (x);
1315  const char * const fmt = GET_RTX_FORMAT (code);
1316  int i;
1317
1318  if (code == SUBREG)
1319    record_subregs_of_mode (x);
1320
1321  /* Time for some deep diving.  */
1322  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1323    {
1324      if (fmt[i] == 'e')
1325	find_subregs_of_mode (XEXP (x, i));
1326      else if (fmt[i] == 'E')
1327	{
1328	  int j;
1329	  for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1330	    find_subregs_of_mode (XVECEXP (x, i, j));
1331	}
1332    }
1333}
1334
1335void
1336init_subregs_of_mode (void)
1337{
1338  basic_block bb;
1339  rtx insn;
1340
1341  if (subregs_of_mode)
1342    htab_empty (subregs_of_mode);
1343  else
1344    subregs_of_mode = htab_create (100, som_hash, som_eq, free);
1345
1346  FOR_EACH_BB (bb)
1347    FOR_BB_INSNS (bb, insn)
1348    if (INSN_P (insn))
1349      find_subregs_of_mode (PATTERN (insn));
1350}
1351
1352/* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1353   mode.  */
1354bool
1355invalid_mode_change_p (unsigned int regno,
1356		       enum reg_class rclass ATTRIBUTE_UNUSED,
1357		       enum machine_mode from)
1358{
1359  struct subregs_of_mode_node dummy, *node;
1360  unsigned int to;
1361  unsigned char mask;
1362
1363  gcc_assert (subregs_of_mode);
1364  dummy.block = regno & -8;
1365  node = (struct subregs_of_mode_node *)
1366    htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1367  if (node == NULL)
1368    return false;
1369
1370  mask = 1 << (regno & 7);
1371  for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1372    if (node->modes[to] & mask)
1373      if (CANNOT_CHANGE_MODE_CLASS (from, (enum machine_mode) to, rclass))
1374	return true;
1375
1376  return false;
1377}
1378
1379void
1380finish_subregs_of_mode (void)
1381{
1382  htab_delete (subregs_of_mode);
1383  subregs_of_mode = 0;
1384}
1385#else
1386void
1387init_subregs_of_mode (void)
1388{
1389}
1390void
1391finish_subregs_of_mode (void)
1392{
1393}
1394
1395#endif /* CANNOT_CHANGE_MODE_CLASS */
1396
1397#include "gt-reginfo.h"
1398