1/* Output routines for GCC for CRX.
2   Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
3   2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4   Free Software Foundation, Inc.
5
6   This file is part of GCC.
7
8   GCC is free software; you can redistribute it and/or modify it
9   under the terms of the GNU General Public License as published
10   by the Free Software Foundation; either version 3, or (at your
11   option) any later version.
12
13   GCC is distributed in the hope that it will be useful, but WITHOUT
14   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16   License for more details.
17
18   You should have received a copy of the GNU General Public License
19   along with GCC; see the file COPYING3.  If not see
20   <http://www.gnu.org/licenses/>.  */
21
22/*****************************************************************************/
23/* HEADER INCLUDES							     */
24/*****************************************************************************/
25
26#include "config.h"
27#include "system.h"
28#include "coretypes.h"
29#include "tm.h"
30#include "rtl.h"
31#include "tree.h"
32#include "tm_p.h"
33#include "regs.h"
34#include "hard-reg-set.h"
35#include "real.h"
36#include "insn-config.h"
37#include "conditions.h"
38#include "output.h"
39#include "insn-codes.h"
40#include "insn-attr.h"
41#include "flags.h"
42#include "except.h"
43#include "function.h"
44#include "recog.h"
45#include "expr.h"
46#include "optabs.h"
47#include "toplev.h"
48#include "basic-block.h"
49#include "df.h"
50#include "target.h"
51#include "target-def.h"
52
53/*****************************************************************************/
54/* DEFINITIONS								     */
55/*****************************************************************************/
56
57/* Maximum number of register used for passing parameters.  */
58#define MAX_REG_FOR_PASSING_ARGS 6
59
60/* Minimum number register used for passing parameters.  */
61#define MIN_REG_FOR_PASSING_ARGS 2
62
63/* The maximum count of words supported in the assembly of the architecture in
64 * a push/pop instruction.  */
65#define MAX_COUNT		8
66
67/* Predicate is true if the current function is a 'noreturn' function, i.e. it
68 * is qualified as volatile.  */
69#define FUNC_IS_NORETURN_P(decl) (TREE_THIS_VOLATILE (decl))
70
71/* The following macros are used in crx_decompose_address () */
72
73/* Returns the factor of a scaled index address or -1 if invalid. */
74#define SCALE_FOR_INDEX_P(X)	\
75 (GET_CODE (X) == CONST_INT ?	\
76  (INTVAL (X) == 1 ? 1 :	\
77   INTVAL (X) == 2 ? 2 :	\
78   INTVAL (X) == 4 ? 4 :	\
79   INTVAL (X) == 8 ? 8 :	\
80   -1) :			\
81  -1)
82
83/* Nonzero if the rtx X is a signed const int of n bits */
84#define RTX_SIGNED_INT_FITS_N_BITS(X,n)			\
85 ((GET_CODE (X) == CONST_INT				\
86   && SIGNED_INT_FITS_N_BITS (INTVAL (X), n)) ? 1 : 0)
87
88/* Nonzero if the rtx X is an unsigned const int of n bits.  */
89#define RTX_UNSIGNED_INT_FITS_N_BITS(X, n)		\
90 ((GET_CODE (X) == CONST_INT				\
91   && UNSIGNED_INT_FITS_N_BITS (INTVAL (X), n)) ? 1 : 0)
92
93/*****************************************************************************/
94/* STATIC VARIABLES							     */
95/*****************************************************************************/
96
97/* Nonzero if the last param processed is passed in a register.  */
98static int last_parm_in_reg;
99
100/* Will hold the number of the last register the prologue saves, -1 if no
101 * register is saved. */
102static int last_reg_to_save;
103
104/* Each object in the array is a register number. Mark 1 for registers that
105 * need to be saved.  */
106static int save_regs[FIRST_PSEUDO_REGISTER];
107
108/* Number of bytes saved on the stack for non-scratch registers */
109static int sum_regs = 0;
110
111/* Number of bytes saved on the stack for local variables. */
112static int local_vars_size;
113
114/* The sum of 2 sizes: locals vars and padding byte for saving the registers.
115 * Used in expand_prologue () and expand_epilogue ().  */
116static int size_for_adjusting_sp;
117
118/* In case of a POST_INC or POST_DEC memory reference, we must report the mode
119 * of the memory reference from PRINT_OPERAND to PRINT_OPERAND_ADDRESS. */
120static enum machine_mode output_memory_reference_mode;
121
122/*****************************************************************************/
123/* TARGETM FUNCTION PROTOTYPES						     */
124/*****************************************************************************/
125
126static bool crx_fixed_condition_code_regs (unsigned int *, unsigned int *);
127static rtx crx_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
128				 int incoming ATTRIBUTE_UNUSED);
129static bool crx_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED);
130static int crx_address_cost (rtx, bool);
131static bool crx_legitimate_address_p (enum machine_mode, rtx, bool);
132static bool crx_can_eliminate (const int, const int);
133
134/*****************************************************************************/
135/* RTL VALIDITY								     */
136/*****************************************************************************/
137
138#undef TARGET_LEGITIMATE_ADDRESS_P
139#define TARGET_LEGITIMATE_ADDRESS_P	crx_legitimate_address_p
140
141#undef TARGET_CAN_ELIMINATE
142#define TARGET_CAN_ELIMINATE		crx_can_eliminate
143
144/*****************************************************************************/
145/* STACK LAYOUT AND CALLING CONVENTIONS					     */
146/*****************************************************************************/
147
148#undef	TARGET_FIXED_CONDITION_CODE_REGS
149#define	TARGET_FIXED_CONDITION_CODE_REGS crx_fixed_condition_code_regs
150
151#undef	TARGET_STRUCT_VALUE_RTX
152#define	TARGET_STRUCT_VALUE_RTX		crx_struct_value_rtx
153
154#undef	TARGET_RETURN_IN_MEMORY
155#define	TARGET_RETURN_IN_MEMORY		crx_return_in_memory
156
157/*****************************************************************************/
158/* RELATIVE COSTS OF OPERATIONS						     */
159/*****************************************************************************/
160
161#undef	TARGET_ADDRESS_COST
162#define	TARGET_ADDRESS_COST		crx_address_cost
163
164/*****************************************************************************/
165/* TARGET-SPECIFIC USES OF `__attribute__'				     */
166/*****************************************************************************/
167
168#undef  TARGET_ATTRIBUTE_TABLE
169#define TARGET_ATTRIBUTE_TABLE		crx_attribute_table
170
171static const struct attribute_spec crx_attribute_table[] = {
172  /* ISRs have special prologue and epilogue requirements. */
173  {"interrupt", 0, 0, false, true, true, NULL},
174  {NULL, 0, 0, false, false, false, NULL}
175};
176
177
178/* Initialize 'targetm' variable which contains pointers to functions and data
179 * relating to the target machine.  */
180
181struct gcc_target targetm = TARGET_INITIALIZER;
182
183
184/*****************************************************************************/
185/* TARGET HOOK IMPLEMENTATIONS						     */
186/*****************************************************************************/
187
188/* Return the fixed registers used for condition codes.  */
189
190static bool
191crx_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
192{
193    *p1 = CC_REGNUM;
194    *p2 = INVALID_REGNUM;
195    return true;
196}
197
198/* Implements hook TARGET_STRUCT_VALUE_RTX.  */
199
200static rtx
201crx_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
202		      int incoming ATTRIBUTE_UNUSED)
203{
204  return gen_rtx_REG (Pmode, CRX_STRUCT_VALUE_REGNUM);
205}
206
207/* Implements hook TARGET_RETURN_IN_MEMORY.  */
208
209static bool
210crx_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
211{
212  if (TYPE_MODE (type) == BLKmode)
213    {
214      HOST_WIDE_INT size = int_size_in_bytes (type);
215      return (size == -1 || size > 8);
216    }
217  else
218    return false;
219}
220
221
222/*****************************************************************************/
223/* MACRO IMPLEMENTATIONS						     */
224/*****************************************************************************/
225
226/* STACK LAYOUT AND CALLING CONVENTIONS ROUTINES */
227/* --------------------------------------------- */
228
229/* Return nonzero if the current function being compiled is an interrupt
230 * function as specified by the "interrupt" attribute.  */
231
232int
233crx_interrupt_function_p (void)
234{
235  tree attributes;
236
237  attributes = TYPE_ATTRIBUTES (TREE_TYPE (current_function_decl));
238  return lookup_attribute ("interrupt", attributes) != NULL_TREE;
239}
240
241/* Compute values for the array save_regs and the variable sum_regs.  The index
242 * of save_regs is numbers of register, each will get 1 if we need to save it
243 * in the current function, 0 if not. sum_regs is the total sum of the
244 * registers being saved. */
245
246static void
247crx_compute_save_regs (void)
248{
249  unsigned int regno;
250
251  /* initialize here so in case the function is no-return it will be -1. */
252  last_reg_to_save = -1;
253
254  /* No need to save any registers if the function never returns.  */
255  if (FUNC_IS_NORETURN_P (current_function_decl))
256    return;
257
258  /* Initialize the number of bytes to be saved. */
259  sum_regs = 0;
260
261  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
262    {
263      if (fixed_regs[regno])
264	{
265	  save_regs[regno] = 0;
266	  continue;
267	}
268
269      /* If this reg is used and not call-used (except RA), save it. */
270      if (crx_interrupt_function_p ())
271	{
272	  if (!current_function_is_leaf && call_used_regs[regno])
273	    /* this is a volatile reg in a non-leaf interrupt routine - save it
274	     * for the sake of its sons.  */
275	    save_regs[regno] = 1;
276
277	  else if (df_regs_ever_live_p (regno))
278	    /* This reg is used - save it.  */
279	    save_regs[regno] = 1;
280	  else
281	    /* This reg is not used, and is not a volatile - don't save. */
282      	    save_regs[regno] = 0;
283	}
284      else
285	{
286	  /* If this reg is used and not call-used (except RA), save it. */
287	  if (df_regs_ever_live_p (regno)
288	      && (!call_used_regs[regno] || regno == RETURN_ADDRESS_REGNUM))
289	    save_regs[regno] = 1;
290	  else
291	    save_regs[regno] = 0;
292	}
293    }
294
295  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
296    if (save_regs[regno] == 1)
297      {
298	last_reg_to_save = regno;
299	sum_regs += UNITS_PER_WORD;
300      }
301}
302
303/* Compute the size of the local area and the size to be adjusted by the
304 * prologue and epilogue. */
305
306static void
307crx_compute_frame (void)
308{
309  /* For aligning the local variables. */
310  int stack_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
311  int padding_locals;
312
313  /* Padding needed for each element of the frame.  */
314  local_vars_size = get_frame_size ();
315
316  /* Align to the stack alignment. */
317  padding_locals = local_vars_size % stack_alignment;
318  if (padding_locals)
319    padding_locals = stack_alignment - padding_locals;
320
321  local_vars_size += padding_locals;
322
323  size_for_adjusting_sp = local_vars_size + (ACCUMULATE_OUTGOING_ARGS ?
324				     crtl->outgoing_args_size : 0);
325}
326
327/* Worker function for TARGET_CAN_ELIMINATE.  */
328
329bool
330crx_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
331{
332  return (to == STACK_POINTER_REGNUM ? ! frame_pointer_needed : true);
333}
334
335/* Implements the macro INITIAL_ELIMINATION_OFFSET, return the OFFSET. */
336
337int
338crx_initial_elimination_offset (int from, int to)
339{
340  /* Compute this since we need to use sum_regs.  */
341  crx_compute_save_regs ();
342
343  /* Compute this since we need to use local_vars_size.  */
344  crx_compute_frame ();
345
346  if ((from) == FRAME_POINTER_REGNUM && (to) == STACK_POINTER_REGNUM)
347    return (ACCUMULATE_OUTGOING_ARGS ?
348	    crtl->outgoing_args_size : 0);
349  else if ((from) == ARG_POINTER_REGNUM && (to) == FRAME_POINTER_REGNUM)
350    return (sum_regs + local_vars_size);
351  else if ((from) == ARG_POINTER_REGNUM && (to) == STACK_POINTER_REGNUM)
352    return (sum_regs + local_vars_size +
353	    (ACCUMULATE_OUTGOING_ARGS ?
354	     crtl->outgoing_args_size : 0));
355  else
356    abort ();
357}
358
359/* REGISTER USAGE */
360/* -------------- */
361
362/* Return the class number of the smallest class containing reg number REGNO.
363 * This could be a conditional expression or could index an array. */
364
365enum reg_class
366crx_regno_reg_class (int regno)
367{
368  if (regno >= 0 && regno < SP_REGNUM)
369    return NOSP_REGS;
370
371  if (regno == SP_REGNUM)
372    return GENERAL_REGS;
373
374  if (regno == LO_REGNUM)
375    return LO_REGS;
376  if (regno == HI_REGNUM)
377    return HI_REGS;
378
379  return NO_REGS;
380}
381
382/* Transfer between HILO_REGS and memory via secondary reloading. */
383
384enum reg_class
385crx_secondary_reload_class (enum reg_class rclass,
386			    enum machine_mode mode ATTRIBUTE_UNUSED,
387			    rtx x ATTRIBUTE_UNUSED)
388{
389  if (reg_classes_intersect_p (rclass, HILO_REGS)
390      && true_regnum (x) == -1)
391    return GENERAL_REGS;
392
393  return NO_REGS;
394}
395
396/* Return 1 if hard register REGNO can hold a value of machine-mode MODE. */
397
398int
399crx_hard_regno_mode_ok (int regno, enum machine_mode mode)
400{
401  /* CC can only hold CCmode values.  */
402  if (regno == CC_REGNUM)
403    return GET_MODE_CLASS (mode) == MODE_CC;
404  if (GET_MODE_CLASS (mode) == MODE_CC)
405    return 0;
406  /* HILO registers can only hold SImode and DImode */
407  if (HILO_REGNO_P (regno))
408    return mode == SImode || mode == DImode;
409  return 1;
410}
411
412/* PASSING FUNCTION ARGUMENTS */
413/* -------------------------- */
414
415/* If enough param regs are available for passing the param of type TYPE return
416 * the number of registers needed else 0.  */
417
418static int
419enough_regs_for_param (CUMULATIVE_ARGS * cum, tree type,
420		       enum machine_mode mode)
421{
422  int type_size;
423  int remaining_size;
424
425  if (mode != BLKmode)
426    type_size = GET_MODE_BITSIZE (mode);
427  else
428    type_size = int_size_in_bytes (type) * BITS_PER_UNIT;
429
430  remaining_size =
431    BITS_PER_WORD * (MAX_REG_FOR_PASSING_ARGS -
432    (MIN_REG_FOR_PASSING_ARGS + cum->ints) + 1);
433
434  /* Any variable which is too big to pass in two registers, will pass on
435   * stack. */
436  if ((remaining_size >= type_size) && (type_size <= 2 * BITS_PER_WORD))
437    return (type_size + BITS_PER_WORD - 1) / BITS_PER_WORD;
438
439  return 0;
440}
441
442/* Implements the macro FUNCTION_ARG defined in crx.h.  */
443
444rtx
445crx_function_arg (CUMULATIVE_ARGS * cum, enum machine_mode mode, tree type,
446	      int named ATTRIBUTE_UNUSED)
447{
448  last_parm_in_reg = 0;
449
450  /* Function_arg () is called with this type just after all the args have had
451   * their registers assigned. The rtx that function_arg returns from this type
452   * is supposed to pass to 'gen_call' but currently it is not implemented (see
453   * macro GEN_CALL).  */
454  if (type == void_type_node)
455    return NULL_RTX;
456
457  if (targetm.calls.must_pass_in_stack (mode, type) || (cum->ints < 0))
458    return NULL_RTX;
459
460  if (mode == BLKmode)
461    {
462      /* Enable structures that need padding bytes at the end to pass to a
463       * function in registers. */
464      if (enough_regs_for_param (cum, type, mode) != 0)
465	{
466	  last_parm_in_reg = 1;
467	  return gen_rtx_REG (mode, MIN_REG_FOR_PASSING_ARGS + cum->ints);
468	}
469    }
470
471  if (MIN_REG_FOR_PASSING_ARGS + cum->ints > MAX_REG_FOR_PASSING_ARGS)
472    return NULL_RTX;
473  else
474    {
475      if (enough_regs_for_param (cum, type, mode) != 0)
476	{
477	  last_parm_in_reg = 1;
478	  return gen_rtx_REG (mode, MIN_REG_FOR_PASSING_ARGS + cum->ints);
479	}
480    }
481
482  return NULL_RTX;
483}
484
485/* Implements the macro INIT_CUMULATIVE_ARGS defined in crx.h.  */
486
487void
488crx_init_cumulative_args (CUMULATIVE_ARGS * cum, tree fntype,
489		      rtx libfunc ATTRIBUTE_UNUSED)
490{
491  tree param, next_param;
492
493  cum->ints = 0;
494
495  /* Determine if this function has variable arguments.  This is indicated by
496   * the last argument being 'void_type_mode' if there are no variable
497   * arguments.  Change here for a different vararg.  */
498  for (param = (fntype) ? TYPE_ARG_TYPES (fntype) : 0;
499       param != (tree) 0; param = next_param)
500    {
501      next_param = TREE_CHAIN (param);
502      if (next_param == (tree) 0 && TREE_VALUE (param) != void_type_node)
503	{
504	  cum->ints = -1;
505	  return;
506	}
507    }
508}
509
510/* Implements the macro FUNCTION_ARG_ADVANCE defined in crx.h.  */
511
512void
513crx_function_arg_advance (CUMULATIVE_ARGS * cum, enum machine_mode mode,
514		      tree type, int named ATTRIBUTE_UNUSED)
515{
516  /* l holds the number of registers required */
517  int l = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
518
519  /* If the parameter isn't passed on a register don't advance cum.  */
520  if (!last_parm_in_reg)
521    return;
522
523  if (targetm.calls.must_pass_in_stack (mode, type) || (cum->ints < 0))
524    return;
525
526  if (mode == SImode || mode == HImode || mode == QImode || mode == DImode)
527    {
528      if (l <= 1)
529	cum->ints += 1;
530      else
531	cum->ints += l;
532    }
533  else if (mode == SFmode || mode == DFmode)
534    cum->ints += l;
535  else if ((mode) == BLKmode)
536    {
537      if ((l = enough_regs_for_param (cum, type, mode)) != 0)
538	cum->ints += l;
539    }
540
541}
542
543/* Implements the macro FUNCTION_ARG_REGNO_P defined in crx.h.  Return nonzero
544 * if N is a register used for passing parameters.  */
545
546int
547crx_function_arg_regno_p (int n)
548{
549  return (n <= MAX_REG_FOR_PASSING_ARGS && n >= MIN_REG_FOR_PASSING_ARGS);
550}
551
552/* ADDRESSING MODES */
553/* ---------------- */
554
555/* Implements the hook for TARGET_LEGITIMATE_ADDRESS_P defined in crx.h.
556 * The following addressing modes are supported on CRX:
557 *
558 * Relocations		--> const | symbol_ref | label_ref
559 * Absolute address	--> 32-bit absolute
560 * Post increment	--> reg + 12-bit disp.
561 * Post modify		--> reg + 12-bit disp.
562 * Register relative	--> reg | 32-bit disp. + reg | 4 bit + reg
563 * Scaled index		--> reg + reg | 22-bit disp. + reg + reg |
564 *			    22-disp. + reg + reg + (2 | 4 | 8) */
565
566static int crx_addr_reg_p (rtx addr_reg)
567{
568  rtx reg;
569
570  if (REG_P (addr_reg))
571    {
572      reg = addr_reg;
573    }
574  else if ((GET_CODE (addr_reg) == SUBREG
575	   && REG_P (SUBREG_REG (addr_reg))
576	   && GET_MODE_SIZE (GET_MODE (SUBREG_REG (addr_reg)))
577	   <= UNITS_PER_WORD))
578    {
579      reg = SUBREG_REG (addr_reg);
580    }
581  else
582    return FALSE;
583
584  if (GET_MODE (addr_reg) != Pmode)
585    {
586      return FALSE;
587    }
588
589  return TRUE;
590}
591
592enum crx_addrtype
593crx_decompose_address (rtx addr, struct crx_address *out)
594{
595  rtx base = NULL_RTX, index = NULL_RTX, disp = NULL_RTX;
596  rtx scale_rtx = NULL_RTX, side_effect = NULL_RTX;
597  int scale = -1;
598
599  enum crx_addrtype retval = CRX_INVALID;
600
601  switch (GET_CODE (addr))
602    {
603    case CONST_INT:
604      /* Absolute address (known at compile time) */
605      retval = CRX_ABSOLUTE;
606      disp = addr;
607      if (!UNSIGNED_INT_FITS_N_BITS (INTVAL (disp), GET_MODE_BITSIZE (Pmode)))
608	return CRX_INVALID;
609      break;
610
611    case CONST:
612    case SYMBOL_REF:
613    case LABEL_REF:
614      /* Absolute address (known at link time) */
615      retval = CRX_ABSOLUTE;
616      disp = addr;
617      break;
618
619    case REG:
620    case SUBREG:
621      /* Register relative address */
622      retval = CRX_REG_REL;
623      base = addr;
624      break;
625
626    case PLUS:
627      switch (GET_CODE (XEXP (addr, 0)))
628	{
629	case REG:
630	case SUBREG:
631	  if (REG_P (XEXP (addr, 1)))
632	    {
633	      /* Scaled index with scale = 1 and disp. = 0 */
634	      retval = CRX_SCALED_INDX;
635	      base = XEXP (addr, 1);
636	      index = XEXP (addr, 0);
637	      scale = 1;
638	    }
639	  else if (RTX_SIGNED_INT_FITS_N_BITS (XEXP (addr, 1), 28))
640	    {
641	      /* Register relative address and <= 28-bit disp. */
642	      retval = CRX_REG_REL;
643	      base = XEXP (addr, 0);
644	      disp = XEXP (addr, 1);
645	    }
646	  else
647	    return CRX_INVALID;
648	  break;
649
650	case PLUS:
651	  /* Scaled index and <= 22-bit disp. */
652	  retval = CRX_SCALED_INDX;
653	  base = XEXP (XEXP (addr, 0), 1);
654	  disp = XEXP (addr, 1);
655	  if (!RTX_SIGNED_INT_FITS_N_BITS (disp, 22))
656	    return CRX_INVALID;
657	  switch (GET_CODE (XEXP (XEXP (addr, 0), 0)))
658	    {
659	    case REG:
660	      /* Scaled index with scale = 0 and <= 22-bit disp. */
661	      index = XEXP (XEXP (addr, 0), 0);
662	      scale = 1;
663	      break;
664
665	    case MULT:
666	      /* Scaled index with scale >= 0 and <= 22-bit disp. */
667	      index = XEXP (XEXP (XEXP (addr, 0), 0), 0);
668	      scale_rtx = XEXP (XEXP (XEXP (addr, 0), 0), 1);
669	      if ((scale = SCALE_FOR_INDEX_P (scale_rtx)) == -1)
670		return CRX_INVALID;
671	      break;
672
673	    default:
674	      return CRX_INVALID;
675	    }
676	  break;
677
678	case MULT:
679	  /* Scaled index with scale >= 0 */
680	  retval = CRX_SCALED_INDX;
681	  base = XEXP (addr, 1);
682	  index = XEXP (XEXP (addr, 0), 0);
683	  scale_rtx = XEXP (XEXP (addr, 0), 1);
684	  /* Scaled index with scale >= 0 and <= 22-bit disp. */
685	  if ((scale = SCALE_FOR_INDEX_P (scale_rtx)) == -1)
686	    return CRX_INVALID;
687	  break;
688
689	default:
690	  return CRX_INVALID;
691	}
692      break;
693
694    case POST_INC:
695    case POST_DEC:
696      /* Simple post-increment */
697      retval = CRX_POST_INC;
698      base = XEXP (addr, 0);
699      side_effect = addr;
700      break;
701
702    case POST_MODIFY:
703      /* Generic post-increment with <= 12-bit disp. */
704      retval = CRX_POST_INC;
705      base = XEXP (addr, 0);
706      side_effect = XEXP (addr, 1);
707      if (base != XEXP (side_effect, 0))
708	return CRX_INVALID;
709      switch (GET_CODE (side_effect))
710	{
711	case PLUS:
712	case MINUS:
713	  disp = XEXP (side_effect, 1);
714	  if (!RTX_SIGNED_INT_FITS_N_BITS (disp, 12))
715	    return CRX_INVALID;
716	  break;
717
718	default:
719	  /* CRX only supports PLUS and MINUS */
720	  return CRX_INVALID;
721	}
722      break;
723
724    default:
725      return CRX_INVALID;
726    }
727
728  if (base && !crx_addr_reg_p (base)) return CRX_INVALID;
729  if (index && !crx_addr_reg_p (index)) return CRX_INVALID;
730
731  out->base = base;
732  out->index = index;
733  out->disp = disp;
734  out->scale = scale;
735  out->side_effect = side_effect;
736
737  return retval;
738}
739
740bool
741crx_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
742			  rtx addr, bool strict)
743{
744  enum crx_addrtype addrtype;
745  struct crx_address address;
746
747  if (TARGET_DEBUG_ADDR)
748    {
749      fprintf (stderr,
750               "\n======\nGO_IF_LEGITIMATE_ADDRESS, mode = %s, strict = %d\n",
751               GET_MODE_NAME (mode), strict);
752      debug_rtx (addr);
753    }
754
755  addrtype = crx_decompose_address (addr, &address);
756
757  if (addrtype == CRX_POST_INC && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
758    return FALSE;
759
760  if (TARGET_DEBUG_ADDR)
761    {
762      const char *typestr;
763      switch (addrtype)
764	{
765	case CRX_INVALID:
766	  typestr = "Invalid";
767	  break;
768	case CRX_REG_REL:
769	  typestr = "Register relative";
770	  break;
771	case CRX_POST_INC:
772	  typestr = "Post-increment";
773	  break;
774	case CRX_SCALED_INDX:
775	  typestr = "Scaled index";
776	  break;
777	case CRX_ABSOLUTE:
778	  typestr = "Absolute";
779	  break;
780	default:
781	  abort ();
782	}
783      fprintf (stderr, "CRX Address type: %s\n", typestr);
784    }
785
786  if (addrtype == CRX_INVALID)
787    return FALSE;
788
789  if (strict)
790    {
791      if (address.base && !REGNO_OK_FOR_BASE_P (REGNO (address.base)))
792	{
793	  if (TARGET_DEBUG_ADDR)
794	    fprintf (stderr, "Base register not strict\n");
795	  return FALSE;
796	}
797      if (address.index && !REGNO_OK_FOR_INDEX_P (REGNO (address.index)))
798	{
799	  if (TARGET_DEBUG_ADDR)
800	    fprintf (stderr, "Index register not strict\n");
801	  return FALSE;
802	}
803    }
804
805  return TRUE;
806}
807
808/* ROUTINES TO COMPUTE COSTS */
809/* ------------------------- */
810
811/* Return cost of the memory address x. */
812
813static int
814crx_address_cost (rtx addr, bool speed ATTRIBUTE_UNUSED)
815{
816  enum crx_addrtype addrtype;
817  struct crx_address address;
818
819  int cost = 2;
820
821  addrtype = crx_decompose_address (addr, &address);
822
823  gcc_assert (addrtype != CRX_INVALID);
824
825  /* An absolute address causes a 3-word instruction */
826  if (addrtype == CRX_ABSOLUTE)
827    cost+=2;
828
829  /* Post-modifying addresses are more powerful.  */
830  if (addrtype == CRX_POST_INC)
831    cost-=2;
832
833  /* Attempt to minimize number of registers in the address. */
834  if (address.base)
835    cost++;
836
837  if (address.index && address.scale == 1)
838    cost+=5;
839
840  if (address.disp && !INT_CST4 (INTVAL (address.disp)))
841    cost+=2;
842
843  if (TARGET_DEBUG_ADDR)
844    {
845      fprintf (stderr, "\n======\nTARGET_ADDRESS_COST = %d\n", cost);
846      debug_rtx (addr);
847    }
848
849  return cost;
850}
851
852/* Return the cost of moving data of mode MODE between a register of class
853 * RCLASS and memory; IN is zero if the value is to be written to memory,
854 * nonzero if it is to be read in. This cost is relative to those in
855 * REGISTER_MOVE_COST.  */
856
857int
858crx_memory_move_cost (enum machine_mode mode,
859		  enum reg_class rclass ATTRIBUTE_UNUSED,
860		  int in ATTRIBUTE_UNUSED)
861{
862  /* One LD or ST takes twice the time of a simple reg-reg move */
863  if (reg_classes_intersect_p (rclass, GENERAL_REGS))
864    {
865      /* printf ("GENERAL_REGS LD/ST = %d\n", 4 * HARD_REGNO_NREGS (0, mode));*/
866      return 4 * HARD_REGNO_NREGS (0, mode);
867    }
868  else if (reg_classes_intersect_p (rclass, HILO_REGS))
869    {
870      /* HILO to memory and vice versa */
871      /* printf ("HILO_REGS %s = %d\n", in ? "LD" : "ST",
872	     (REGISTER_MOVE_COST (mode,
873				 in ? GENERAL_REGS : HILO_REGS,
874				 in ? HILO_REGS : GENERAL_REGS) + 4)
875	* HARD_REGNO_NREGS (0, mode)); */
876      return (REGISTER_MOVE_COST (mode,
877				 in ? GENERAL_REGS : HILO_REGS,
878				 in ? HILO_REGS : GENERAL_REGS) + 4)
879	* HARD_REGNO_NREGS (0, mode);
880    }
881  else /* default (like in i386) */
882    {
883      /* printf ("ANYREGS = 100\n"); */
884      return 100;
885    }
886}
887
888/* INSTRUCTION OUTPUT */
889/* ------------------ */
890
891/* Check if a const_double is ok for crx store-immediate instructions */
892
893int
894crx_const_double_ok (rtx op)
895{
896  if (GET_MODE (op) == DFmode)
897  {
898    REAL_VALUE_TYPE r;
899    long l[2];
900    REAL_VALUE_FROM_CONST_DOUBLE (r, op);
901    REAL_VALUE_TO_TARGET_DOUBLE (r, l);
902    return (UNSIGNED_INT_FITS_N_BITS (l[0], 4) &&
903	    UNSIGNED_INT_FITS_N_BITS (l[1], 4)) ? 1 : 0;
904  }
905
906  if (GET_MODE (op) == SFmode)
907  {
908    REAL_VALUE_TYPE r;
909    long l;
910    REAL_VALUE_FROM_CONST_DOUBLE (r, op);
911    REAL_VALUE_TO_TARGET_SINGLE (r, l);
912    return UNSIGNED_INT_FITS_N_BITS (l, 4) ? 1 : 0;
913  }
914
915  return (UNSIGNED_INT_FITS_N_BITS (CONST_DOUBLE_LOW (op), 4) &&
916	  UNSIGNED_INT_FITS_N_BITS (CONST_DOUBLE_HIGH (op), 4)) ? 1 : 0;
917}
918
919/* Implements the macro PRINT_OPERAND defined in crx.h.  */
920
921void
922crx_print_operand (FILE * file, rtx x, int code)
923{
924  switch (code)
925    {
926    case 'p' :
927      if (GET_CODE (x) == REG) {
928	if (GET_MODE (x) == DImode || GET_MODE (x) == DFmode)
929	  {
930	    int regno = REGNO (x);
931	    if (regno + 1 >= SP_REGNUM) abort ();
932	    fprintf (file, "{%s, %s}", reg_names[regno], reg_names[regno + 1]);
933	    return;
934	  }
935	else
936	  {
937	    if (REGNO (x) >= SP_REGNUM) abort ();
938	    fprintf (file, "%s", reg_names[REGNO (x)]);
939	    return;
940	  }
941      }
942
943    case 'd' :
944	{
945	  const char *crx_cmp_str;
946	  switch (GET_CODE (x))
947	    { /* MD: compare (reg, reg or imm) but CRX: cmp (reg or imm, reg)
948	       * -> swap all non symmetric ops */
949	    case EQ  : crx_cmp_str = "eq"; break;
950	    case NE  : crx_cmp_str = "ne"; break;
951	    case GT  : crx_cmp_str = "lt"; break;
952	    case GTU : crx_cmp_str = "lo"; break;
953	    case LT  : crx_cmp_str = "gt"; break;
954	    case LTU : crx_cmp_str = "hi"; break;
955	    case GE  : crx_cmp_str = "le"; break;
956	    case GEU : crx_cmp_str = "ls"; break;
957	    case LE  : crx_cmp_str = "ge"; break;
958	    case LEU : crx_cmp_str = "hs"; break;
959	    default : abort ();
960	    }
961	  fprintf (file, "%s", crx_cmp_str);
962	  return;
963	}
964
965    case 'H':
966      /* Print high part of a double precision value. */
967      switch (GET_CODE (x))
968	{
969	case CONST_DOUBLE:
970	  if (GET_MODE (x) == SFmode) abort ();
971	  if (GET_MODE (x) == DFmode)
972	    {
973	      /* High part of a DF const. */
974	      REAL_VALUE_TYPE r;
975	      long l[2];
976
977	      REAL_VALUE_FROM_CONST_DOUBLE (r, x);
978	      REAL_VALUE_TO_TARGET_DOUBLE (r, l);
979
980	      fprintf (file, "$0x%lx", l[1]);
981	      return;
982	    }
983
984	  /* -- Fallthrough to handle DI consts -- */
985
986	case CONST_INT:
987	    {
988	      rtx high, low;
989	      split_double (x, &low, &high);
990	      putc ('$', file);
991	      output_addr_const (file, high);
992	      return;
993	    }
994
995	case REG:
996	  if (REGNO (x) + 1 >= FIRST_PSEUDO_REGISTER) abort ();
997	  fprintf (file, "%s", reg_names[REGNO (x) + 1]);
998	  return;
999
1000	case MEM:
1001	  /* Adjust memory address to high part.  */
1002	    {
1003	      rtx adj_mem = x;
1004	      adj_mem = adjust_address (adj_mem, GET_MODE (adj_mem), 4);
1005
1006	      output_memory_reference_mode = GET_MODE (adj_mem);
1007	      output_address (XEXP (adj_mem, 0));
1008	      return;
1009	    }
1010
1011	default:
1012	  abort ();
1013	}
1014
1015    case 'L':
1016      /* Print low part of a double precision value. */
1017      switch (GET_CODE (x))
1018	{
1019	case CONST_DOUBLE:
1020	  if (GET_MODE (x) == SFmode) abort ();
1021	  if (GET_MODE (x) == DFmode)
1022	    {
1023	      /* High part of a DF const. */
1024	      REAL_VALUE_TYPE r;
1025	      long l[2];
1026
1027	      REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1028	      REAL_VALUE_TO_TARGET_DOUBLE (r, l);
1029
1030	      fprintf (file, "$0x%lx", l[0]);
1031	      return;
1032	    }
1033
1034	  /* -- Fallthrough to handle DI consts -- */
1035
1036	case CONST_INT:
1037	    {
1038	      rtx high, low;
1039	      split_double (x, &low, &high);
1040	      putc ('$', file);
1041	      output_addr_const (file, low);
1042	      return;
1043	    }
1044
1045	case REG:
1046	  fprintf (file, "%s", reg_names[REGNO (x)]);
1047	  return;
1048
1049	case MEM:
1050	  output_memory_reference_mode = GET_MODE (x);
1051	  output_address (XEXP (x, 0));
1052	  return;
1053
1054	default:
1055	  abort ();
1056	}
1057
1058    case 0 : /* default */
1059      switch (GET_CODE (x))
1060	{
1061	case REG:
1062	  fprintf (file, "%s", reg_names[REGNO (x)]);
1063	  return;
1064
1065	case MEM:
1066	  output_memory_reference_mode = GET_MODE (x);
1067	  output_address (XEXP (x, 0));
1068	  return;
1069
1070	case CONST_DOUBLE:
1071	    {
1072	      REAL_VALUE_TYPE r;
1073	      long l;
1074
1075	      /* Always use H and L for double precision - see above */
1076	      gcc_assert (GET_MODE (x) == SFmode);
1077
1078	      REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1079	      REAL_VALUE_TO_TARGET_SINGLE (r, l);
1080
1081	      fprintf (file, "$0x%lx", l);
1082	      return;
1083	    }
1084
1085	default:
1086	  putc ('$', file);
1087	  output_addr_const (file, x);
1088	  return;
1089	}
1090
1091    default:
1092      output_operand_lossage ("invalid %%xn code");
1093    }
1094
1095  abort ();
1096}
1097
1098/* Implements the macro PRINT_OPERAND_ADDRESS defined in crx.h.  */
1099
1100void
1101crx_print_operand_address (FILE * file, rtx addr)
1102{
1103  enum crx_addrtype addrtype;
1104  struct crx_address address;
1105
1106  int offset;
1107
1108  addrtype = crx_decompose_address (addr, &address);
1109
1110  if (address.disp)
1111    offset = INTVAL (address.disp);
1112  else
1113    offset = 0;
1114
1115  switch (addrtype)
1116    {
1117    case CRX_REG_REL:
1118      fprintf (file, "%d(%s)", offset, reg_names[REGNO (address.base)]);
1119      return;
1120
1121    case CRX_POST_INC:
1122      switch (GET_CODE (address.side_effect))
1123	{
1124	case PLUS:
1125	  break;
1126	case MINUS:
1127	  offset = -offset;
1128	  break;
1129	case POST_INC:
1130	  offset = GET_MODE_SIZE (output_memory_reference_mode);
1131	  break;
1132	case POST_DEC:
1133	  offset = -GET_MODE_SIZE (output_memory_reference_mode);
1134	  break;
1135	default:
1136	  abort ();
1137	}
1138	fprintf (file, "%d(%s)+", offset, reg_names[REGNO (address.base)]);
1139      return;
1140
1141    case CRX_SCALED_INDX:
1142      fprintf (file, "%d(%s, %s, %d)", offset, reg_names[REGNO (address.base)],
1143	       reg_names[REGNO (address.index)], address.scale);
1144      return;
1145
1146    case CRX_ABSOLUTE:
1147      output_addr_const (file, address.disp);
1148      return;
1149
1150    default:
1151      abort ();
1152    }
1153}
1154
1155
1156/*****************************************************************************/
1157/* MACHINE DESCRIPTION HELPER-FUNCTIONS					     */
1158/*****************************************************************************/
1159
1160void crx_expand_movmem_single (rtx src, rtx srcbase, rtx dst, rtx dstbase,
1161			       rtx tmp_reg, unsigned HOST_WIDE_INT *offset_p)
1162{
1163  rtx addr, mem;
1164  unsigned HOST_WIDE_INT offset = *offset_p;
1165
1166  /* Load */
1167  addr = plus_constant (src, offset);
1168  mem = adjust_automodify_address (srcbase, SImode, addr, offset);
1169  emit_move_insn (tmp_reg, mem);
1170
1171  /* Store */
1172  addr = plus_constant (dst, offset);
1173  mem = adjust_automodify_address (dstbase, SImode, addr, offset);
1174  emit_move_insn (mem, tmp_reg);
1175
1176  *offset_p = offset + 4;
1177}
1178
1179int
1180crx_expand_movmem (rtx dstbase, rtx srcbase, rtx count_exp, rtx align_exp)
1181{
1182  unsigned HOST_WIDE_INT count = 0, offset, si_moves, i;
1183  HOST_WIDE_INT align = 0;
1184
1185  rtx src, dst;
1186  rtx tmp_reg;
1187
1188  if (GET_CODE (align_exp) == CONST_INT)
1189    { /* Only if aligned */
1190      align = INTVAL (align_exp);
1191      if (align & 3)
1192	return 0;
1193    }
1194
1195  if (GET_CODE (count_exp) == CONST_INT)
1196    { /* No more than 16 SImode moves */
1197      count = INTVAL (count_exp);
1198      if (count > 64)
1199	return 0;
1200    }
1201
1202  tmp_reg = gen_reg_rtx (SImode);
1203
1204  /* Create psrs for the src and dest pointers */
1205  dst = copy_to_mode_reg (Pmode, XEXP (dstbase, 0));
1206  if (dst != XEXP (dstbase, 0))
1207    dstbase = replace_equiv_address_nv (dstbase, dst);
1208  src = copy_to_mode_reg (Pmode, XEXP (srcbase, 0));
1209  if (src != XEXP (srcbase, 0))
1210    srcbase = replace_equiv_address_nv (srcbase, src);
1211
1212  offset = 0;
1213
1214  /* Emit SImode moves */
1215  si_moves = count >> 2;
1216  for (i = 0; i < si_moves; i++)
1217    crx_expand_movmem_single (src, srcbase, dst, dstbase, tmp_reg, &offset);
1218
1219  /* Special cases */
1220  if (count & 3)
1221    {
1222      offset = count - 4;
1223      crx_expand_movmem_single (src, srcbase, dst, dstbase, tmp_reg, &offset);
1224    }
1225
1226  gcc_assert (offset == count);
1227
1228  return 1;
1229}
1230
1231static void
1232mpushpop_str (char *stringbuffer, const char *mnemonic, char *mask)
1233{
1234  if (strlen (mask) > 2 || crx_interrupt_function_p ()) /* needs 2-word instr. */
1235    sprintf (stringbuffer, "\n\t%s\tsp, {%s}", mnemonic, mask);
1236  else /* single word instruction */
1237    sprintf (stringbuffer, "\n\t%s\t%s", mnemonic, mask);
1238}
1239
1240/* Called from crx.md. The return value depends on the parameter push_or_pop:
1241 * When push_or_pop is zero -> string for push instructions of prologue.
1242 * When push_or_pop is nonzero -> string for pop/popret/retx in epilogue.
1243 * Relies on the assumptions:
1244 * 1. RA is the last register to be saved.
1245 * 2. The maximal value of the counter is MAX_COUNT. */
1246
1247char *
1248crx_prepare_push_pop_string (int push_or_pop)
1249{
1250  /* j is the number of registers being saved, takes care that there won't be
1251   * more than 8 in one push/pop instruction */
1252
1253  /* For the register mask string */
1254  static char mask_str[50];
1255
1256  /* i is the index of save_regs[], going from 0 until last_reg_to_save */
1257  int i = 0;
1258
1259  int ra_in_bitmask = 0;
1260
1261  char *return_str;
1262
1263  /* For reversing on the push instructions if there are more than one. */
1264  char *temp_str;
1265
1266  return_str = (char *) xmalloc (120);
1267  temp_str = (char *) xmalloc (120);
1268
1269  /* Initialize */
1270  memset (return_str, 0, 3);
1271
1272  while (i <= last_reg_to_save)
1273    {
1274      /* Prepare mask for one instruction. */
1275      mask_str[0] = 0;
1276
1277      if (i <= SP_REGNUM)
1278	{ /* Add regs unit full or SP register reached */
1279	  int j = 0;
1280	  while (j < MAX_COUNT && i <= SP_REGNUM)
1281	    {
1282	      if (save_regs[i])
1283		{
1284		  /* TODO to use ra_in_bitmask for detecting last pop is not
1285		   * smart it prevents things like:  popret r5 */
1286		  if (i == RETURN_ADDRESS_REGNUM) ra_in_bitmask = 1;
1287		  if (j > 0) strcat (mask_str, ", ");
1288		  strcat (mask_str, reg_names[i]);
1289		  ++j;
1290		}
1291	      ++i;
1292	    }
1293	}
1294      else
1295	{
1296	  /* Handle hi/lo savings */
1297	  while (i <= last_reg_to_save)
1298	    {
1299	      if (save_regs[i])
1300		{
1301		  strcat (mask_str, "lo, hi");
1302		  i = last_reg_to_save + 1;
1303		  break;
1304		}
1305	      ++i;
1306	    }
1307	}
1308
1309      if (strlen (mask_str) == 0) continue;
1310
1311      if (push_or_pop == 1)
1312	{
1313	  if (crx_interrupt_function_p ())
1314	    mpushpop_str (temp_str, "popx", mask_str);
1315	  else
1316	    {
1317	      if (ra_in_bitmask)
1318		{
1319		  mpushpop_str (temp_str, "popret", mask_str);
1320		  ra_in_bitmask = 0;
1321		}
1322	      else mpushpop_str (temp_str, "pop", mask_str);
1323	    }
1324
1325	  strcat (return_str, temp_str);
1326	}
1327      else
1328	{
1329	  /* push - We need to reverse the order of the instructions if there
1330	   * are more than one. (since the pop will not be reversed in the
1331	   * epilogue */
1332      	  if (crx_interrupt_function_p ())
1333	    mpushpop_str (temp_str, "pushx", mask_str);
1334	  else
1335	    mpushpop_str (temp_str, "push", mask_str);
1336	  strcat (temp_str, return_str);
1337	  strcpy (strcat (return_str, "\t"), temp_str);
1338	}
1339
1340    }
1341
1342  if (push_or_pop == 1)
1343    {
1344      /* pop */
1345      if (crx_interrupt_function_p ())
1346	strcat (return_str, "\n\tretx\n");
1347
1348      else if (!FUNC_IS_NORETURN_P (current_function_decl)
1349	       && !save_regs[RETURN_ADDRESS_REGNUM])
1350	strcat (return_str, "\n\tjump\tra\n");
1351    }
1352
1353  /* Skip the newline and the tab in the start of return_str. */
1354  return_str += 2;
1355  return return_str;
1356}
1357
1358/*  CompactRISC CRX Architecture stack layout:
1359
1360     0 +---------------------
1361	|
1362	.
1363	.
1364	|
1365	+==================== Sp(x)=Ap(x+1)
1366      A | Args for functions
1367      | | called by X and      Dynamically
1368      | | Dynamic allocations  allocated and
1369      | | (alloca, variable    deallocated
1370  Stack | length arrays).
1371  grows +-------------------- Fp(x)
1372  down| | Local variables of X
1373  ward| +--------------------
1374      | | Regs saved for X-1
1375      | +==================== Sp(x-1)=Ap(x)
1376	| Args for func X
1377	| pushed by X-1
1378	+-------------------- Fp(x-1)
1379	|
1380	|
1381	V
1382
1383*/
1384
1385void
1386crx_expand_prologue (void)
1387{
1388  crx_compute_frame ();
1389  crx_compute_save_regs ();
1390
1391  /* If there is no need in push and adjustment to sp, return. */
1392  if (size_for_adjusting_sp + sum_regs == 0)
1393    return;
1394
1395  if (last_reg_to_save != -1)
1396    /* If there are registers to push.  */
1397    emit_insn (gen_push_for_prologue (GEN_INT (sum_regs)));
1398
1399  if (size_for_adjusting_sp > 0)
1400    emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
1401			   GEN_INT (-size_for_adjusting_sp)));
1402
1403  if (frame_pointer_needed)
1404    /* Initialize the frame pointer with the value of the stack pointer
1405     * pointing now to the locals. */
1406    emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
1407}
1408
1409/* Generate insn that updates the stack for local variables and padding for
1410 * registers we save. - Generate the appropriate return insn. */
1411
1412void
1413crx_expand_epilogue (void)
1414{
1415  rtx return_reg;
1416
1417  /* Nonzero if we need to return and pop only RA. This will generate a
1418   * different insn. This differentiate is for the peepholes for call as last
1419   * statement in function. */
1420  int only_popret_RA = (save_regs[RETURN_ADDRESS_REGNUM]
1421			&& (sum_regs == UNITS_PER_WORD));
1422
1423  /* Return register.  */
1424  return_reg = gen_rtx_REG (Pmode, RETURN_ADDRESS_REGNUM);
1425
1426  if (frame_pointer_needed)
1427    /* Restore the stack pointer with the frame pointers value */
1428    emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
1429
1430  if (size_for_adjusting_sp > 0)
1431    emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
1432			   GEN_INT (size_for_adjusting_sp)));
1433
1434  if (crx_interrupt_function_p ())
1435    emit_jump_insn (gen_interrupt_return ());
1436  else if (last_reg_to_save == -1)
1437    /* Nothing to pop */
1438    /* Don't output jump for interrupt routine, only retx.  */
1439    emit_jump_insn (gen_indirect_jump_return ());
1440  else if (only_popret_RA)
1441    emit_jump_insn (gen_popret_RA_return ());
1442  else
1443    emit_jump_insn (gen_pop_and_popret_return (GEN_INT (sum_regs)));
1444}
1445