1/* Disassembler code for CRIS. 2 Copyright 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009 3 Free Software Foundation, Inc. 4 Contributed by Axis Communications AB, Lund, Sweden. 5 Written by Hans-Peter Nilsson. 6 7 This file is part of the GNU opcodes library. 8 9 This library is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 It is distributed in the hope that it will be useful, but WITHOUT 15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17 License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; if not, write to the Free Software 21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 22 MA 02110-1301, USA. */ 23 24#include "dis-asm.h" 25#include "sysdep.h" 26#include "opcode/cris.h" 27#include "libiberty.h" 28 29/* No instruction will be disassembled longer than this. In theory, and 30 in silicon, address prefixes can be cascaded. In practice, cascading 31 is not used by GCC, and not supported by the assembler. */ 32#ifndef MAX_BYTES_PER_CRIS_INSN 33#define MAX_BYTES_PER_CRIS_INSN 8 34#endif 35 36/* Whether or not to decode prefixes, folding it into the following 37 instruction. FIXME: Make this optional later. */ 38#ifndef PARSE_PREFIX 39#define PARSE_PREFIX 1 40#endif 41 42/* Sometimes we prefix all registers with this character. */ 43#define REGISTER_PREFIX_CHAR '$' 44 45/* Whether or not to trace the following sequence: 46 sub* X,r%d 47 bound* Y,r%d 48 adds.w [pc+r%d.w],pc 49 50 This is the assembly form of a switch-statement in C. 51 The "sub is optional. If there is none, then X will be zero. 52 X is the value of the first case, 53 Y is the number of cases (including default). 54 55 This results in case offsets printed on the form: 56 case N: -> case_address 57 where N is an estimation on the corresponding 'case' operand in C, 58 and case_address is where execution of that case continues after the 59 sequence presented above. 60 61 The old style of output was to print the offsets as instructions, 62 which made it hard to follow "case"-constructs in the disassembly, 63 and caused a lot of annoying warnings about undefined instructions. 64 65 FIXME: Make this optional later. */ 66#ifndef TRACE_CASE 67#define TRACE_CASE (disdata->trace_case) 68#endif 69 70enum cris_disass_family 71 { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 }; 72 73/* Stored in the disasm_info->private_data member. */ 74struct cris_disasm_data 75{ 76 /* Whether to print something less confusing if we find something 77 matching a switch-construct. */ 78 bfd_boolean trace_case; 79 80 /* Whether this code is flagged as crisv32. FIXME: Should be an enum 81 that includes "compatible". */ 82 enum cris_disass_family distype; 83}; 84 85/* Value of first element in switch. */ 86static long case_offset = 0; 87 88/* How many more case-offsets to print. */ 89static long case_offset_counter = 0; 90 91/* Number of case offsets. */ 92static long no_of_case_offsets = 0; 93 94/* Candidate for next case_offset. */ 95static long last_immediate = 0; 96 97static int cris_constraint 98 (const char *, unsigned, unsigned, struct cris_disasm_data *); 99 100/* Parse disassembler options and store state in info. FIXME: For the 101 time being, we abuse static variables. */ 102 103static bfd_boolean 104cris_parse_disassembler_options (disassemble_info *info, 105 enum cris_disass_family distype) 106{ 107 struct cris_disasm_data *disdata; 108 109 info->private_data = calloc (1, sizeof (struct cris_disasm_data)); 110 disdata = (struct cris_disasm_data *) info->private_data; 111 if (disdata == NULL) 112 return FALSE; 113 114 /* Default true. */ 115 disdata->trace_case 116 = (info->disassembler_options == NULL 117 || (strcmp (info->disassembler_options, "nocase") != 0)); 118 119 disdata->distype = distype; 120 return TRUE; 121} 122 123static const struct cris_spec_reg * 124spec_reg_info (unsigned int sreg, enum cris_disass_family distype) 125{ 126 int i; 127 128 for (i = 0; cris_spec_regs[i].name != NULL; i++) 129 { 130 if (cris_spec_regs[i].number == sreg) 131 { 132 if (distype == cris_dis_v32) 133 switch (cris_spec_regs[i].applicable_version) 134 { 135 case cris_ver_warning: 136 case cris_ver_version_all: 137 case cris_ver_v3p: 138 case cris_ver_v8p: 139 case cris_ver_v10p: 140 case cris_ver_v32p: 141 /* No ambiguous sizes or register names with CRISv32. */ 142 if (cris_spec_regs[i].warning == NULL) 143 return &cris_spec_regs[i]; 144 default: 145 ; 146 } 147 else if (cris_spec_regs[i].applicable_version != cris_ver_v32p) 148 return &cris_spec_regs[i]; 149 } 150 } 151 152 return NULL; 153} 154 155/* Return the number of bits in the argument. */ 156 157static int 158number_of_bits (unsigned int val) 159{ 160 int bits; 161 162 for (bits = 0; val != 0; val &= val - 1) 163 bits++; 164 165 return bits; 166} 167 168/* Get an entry in the opcode-table. */ 169 170static const struct cris_opcode * 171get_opcode_entry (unsigned int insn, 172 unsigned int prefix_insn, 173 struct cris_disasm_data *disdata) 174{ 175 /* For non-prefixed insns, we keep a table of pointers, indexed by the 176 insn code. Each entry is initialized when found to be NULL. */ 177 static const struct cris_opcode **opc_table = NULL; 178 179 const struct cris_opcode *max_matchedp = NULL; 180 const struct cris_opcode **prefix_opc_table = NULL; 181 182 /* We hold a table for each prefix that need to be handled differently. */ 183 static const struct cris_opcode **dip_prefixes = NULL; 184 static const struct cris_opcode **bdapq_m1_prefixes = NULL; 185 static const struct cris_opcode **bdapq_m2_prefixes = NULL; 186 static const struct cris_opcode **bdapq_m4_prefixes = NULL; 187 static const struct cris_opcode **rest_prefixes = NULL; 188 189 /* Allocate and clear the opcode-table. */ 190 if (opc_table == NULL) 191 { 192 opc_table = malloc (65536 * sizeof (opc_table[0])); 193 if (opc_table == NULL) 194 return NULL; 195 196 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *)); 197 198 dip_prefixes 199 = malloc (65536 * sizeof (const struct cris_opcode **)); 200 if (dip_prefixes == NULL) 201 return NULL; 202 203 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0])); 204 205 bdapq_m1_prefixes 206 = malloc (65536 * sizeof (const struct cris_opcode **)); 207 if (bdapq_m1_prefixes == NULL) 208 return NULL; 209 210 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0])); 211 212 bdapq_m2_prefixes 213 = malloc (65536 * sizeof (const struct cris_opcode **)); 214 if (bdapq_m2_prefixes == NULL) 215 return NULL; 216 217 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0])); 218 219 bdapq_m4_prefixes 220 = malloc (65536 * sizeof (const struct cris_opcode **)); 221 if (bdapq_m4_prefixes == NULL) 222 return NULL; 223 224 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0])); 225 226 rest_prefixes 227 = malloc (65536 * sizeof (const struct cris_opcode **)); 228 if (rest_prefixes == NULL) 229 return NULL; 230 231 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0])); 232 } 233 234 /* Get the right table if this is a prefix. 235 This code is connected to cris_constraints in that it knows what 236 prefixes play a role in recognition of patterns; the necessary 237 state is reflected by which table is used. If constraints 238 involving match or non-match of prefix insns are changed, then this 239 probably needs changing too. */ 240 if (prefix_insn != NO_CRIS_PREFIX) 241 { 242 const struct cris_opcode *popcodep 243 = (opc_table[prefix_insn] != NULL 244 ? opc_table[prefix_insn] 245 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata)); 246 247 if (popcodep == NULL) 248 return NULL; 249 250 if (popcodep->match == BDAP_QUICK_OPCODE) 251 { 252 /* Since some offsets are recognized with "push" macros, we 253 have to have different tables for them. */ 254 int offset = (prefix_insn & 255); 255 256 if (offset > 127) 257 offset -= 256; 258 259 switch (offset) 260 { 261 case -4: 262 prefix_opc_table = bdapq_m4_prefixes; 263 break; 264 265 case -2: 266 prefix_opc_table = bdapq_m2_prefixes; 267 break; 268 269 case -1: 270 prefix_opc_table = bdapq_m1_prefixes; 271 break; 272 273 default: 274 prefix_opc_table = rest_prefixes; 275 break; 276 } 277 } 278 else if (popcodep->match == DIP_OPCODE) 279 /* We don't allow postincrement when the prefix is DIP, so use a 280 different table for DIP. */ 281 prefix_opc_table = dip_prefixes; 282 else 283 prefix_opc_table = rest_prefixes; 284 } 285 286 if (prefix_insn != NO_CRIS_PREFIX 287 && prefix_opc_table[insn] != NULL) 288 max_matchedp = prefix_opc_table[insn]; 289 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL) 290 max_matchedp = opc_table[insn]; 291 else 292 { 293 const struct cris_opcode *opcodep; 294 int max_level_of_match = -1; 295 296 for (opcodep = cris_opcodes; 297 opcodep->name != NULL; 298 opcodep++) 299 { 300 int level_of_match; 301 302 if (disdata->distype == cris_dis_v32) 303 { 304 switch (opcodep->applicable_version) 305 { 306 case cris_ver_version_all: 307 break; 308 309 case cris_ver_v0_3: 310 case cris_ver_v0_10: 311 case cris_ver_v3_10: 312 case cris_ver_sim_v0_10: 313 case cris_ver_v8_10: 314 case cris_ver_v10: 315 case cris_ver_warning: 316 continue; 317 318 case cris_ver_v3p: 319 case cris_ver_v8p: 320 case cris_ver_v10p: 321 case cris_ver_v32p: 322 break; 323 324 case cris_ver_v8: 325 abort (); 326 default: 327 abort (); 328 } 329 } 330 else 331 { 332 switch (opcodep->applicable_version) 333 { 334 case cris_ver_version_all: 335 case cris_ver_v0_3: 336 case cris_ver_v3p: 337 case cris_ver_v0_10: 338 case cris_ver_v8p: 339 case cris_ver_v8_10: 340 case cris_ver_v10: 341 case cris_ver_sim_v0_10: 342 case cris_ver_v10p: 343 case cris_ver_warning: 344 break; 345 346 case cris_ver_v32p: 347 continue; 348 349 case cris_ver_v8: 350 abort (); 351 default: 352 abort (); 353 } 354 } 355 356 /* We give a double lead for bits matching the template in 357 cris_opcodes. Not even, because then "move p8,r10" would 358 be given 2 bits lead over "clear.d r10". When there's a 359 tie, the first entry in the table wins. This is 360 deliberate, to avoid a more complicated recognition 361 formula. */ 362 if ((opcodep->match & insn) == opcodep->match 363 && (opcodep->lose & insn) == 0 364 && ((level_of_match 365 = cris_constraint (opcodep->args, 366 insn, 367 prefix_insn, 368 disdata)) 369 >= 0) 370 && ((level_of_match 371 += 2 * number_of_bits (opcodep->match 372 | opcodep->lose)) 373 > max_level_of_match)) 374 { 375 max_matchedp = opcodep; 376 max_level_of_match = level_of_match; 377 378 /* If there was a full match, never mind looking 379 further. */ 380 if (level_of_match >= 2 * 16) 381 break; 382 } 383 } 384 /* Fill in the new entry. 385 386 If there are changes to the opcode-table involving prefixes, and 387 disassembly then does not work correctly, try removing the 388 else-clause below that fills in the prefix-table. If that 389 helps, you need to change the prefix_opc_table setting above, or 390 something related. */ 391 if (prefix_insn == NO_CRIS_PREFIX) 392 opc_table[insn] = max_matchedp; 393 else 394 prefix_opc_table[insn] = max_matchedp; 395 } 396 397 return max_matchedp; 398} 399 400/* Return -1 if the constraints of a bitwise-matched instruction say 401 that there is no match. Otherwise return a nonnegative number 402 indicating the confidence in the match (higher is better). */ 403 404static int 405cris_constraint (const char *cs, 406 unsigned int insn, 407 unsigned int prefix_insn, 408 struct cris_disasm_data *disdata) 409{ 410 int retval = 0; 411 int tmp; 412 int prefix_ok = 0; 413 const char *s; 414 415 for (s = cs; *s; s++) 416 switch (*s) 417 { 418 case '!': 419 /* Do not recognize "pop" if there's a prefix and then only for 420 v0..v10. */ 421 if (prefix_insn != NO_CRIS_PREFIX 422 || disdata->distype != cris_dis_v0_v10) 423 return -1; 424 break; 425 426 case 'U': 427 /* Not recognized at disassembly. */ 428 return -1; 429 430 case 'M': 431 /* Size modifier for "clear", i.e. special register 0, 4 or 8. 432 Check that it is one of them. Only special register 12 could 433 be mismatched, but checking for matches is more logical than 434 checking for mismatches when there are only a few cases. */ 435 tmp = ((insn >> 12) & 0xf); 436 if (tmp != 0 && tmp != 4 && tmp != 8) 437 return -1; 438 break; 439 440 case 'm': 441 if ((insn & 0x30) == 0x30) 442 return -1; 443 break; 444 445 case 'S': 446 /* A prefix operand without side-effect. */ 447 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0) 448 { 449 prefix_ok = 1; 450 break; 451 } 452 else 453 return -1; 454 455 case 's': 456 case 'y': 457 case 'Y': 458 /* If this is a prefixed insn with postincrement (side-effect), 459 the prefix must not be DIP. */ 460 if (prefix_insn != NO_CRIS_PREFIX) 461 { 462 if (insn & 0x400) 463 { 464 const struct cris_opcode *prefix_opcodep 465 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata); 466 467 if (prefix_opcodep->match == DIP_OPCODE) 468 return -1; 469 } 470 471 prefix_ok = 1; 472 } 473 break; 474 475 case 'B': 476 /* If we don't fall through, then the prefix is ok. */ 477 prefix_ok = 1; 478 479 /* A "push" prefix. Check for valid "push" size. 480 In case of special register, it may be != 4. */ 481 if (prefix_insn != NO_CRIS_PREFIX) 482 { 483 /* Match the prefix insn to BDAPQ. */ 484 const struct cris_opcode *prefix_opcodep 485 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata); 486 487 if (prefix_opcodep->match == BDAP_QUICK_OPCODE) 488 { 489 int pushsize = (prefix_insn & 255); 490 491 if (pushsize > 127) 492 pushsize -= 256; 493 494 if (s[1] == 'P') 495 { 496 unsigned int spec_reg = (insn >> 12) & 15; 497 const struct cris_spec_reg *sregp 498 = spec_reg_info (spec_reg, disdata->distype); 499 500 /* For a special-register, the "prefix size" must 501 match the size of the register. */ 502 if (sregp && sregp->reg_size == (unsigned int) -pushsize) 503 break; 504 } 505 else if (s[1] == 'R') 506 { 507 if ((insn & 0x30) == 0x20 && pushsize == -4) 508 break; 509 } 510 /* FIXME: Should abort here; next constraint letter 511 *must* be 'P' or 'R'. */ 512 } 513 } 514 return -1; 515 516 case 'D': 517 retval = (((insn >> 12) & 15) == (insn & 15)); 518 if (!retval) 519 return -1; 520 else 521 retval += 4; 522 break; 523 524 case 'P': 525 { 526 const struct cris_spec_reg *sregp 527 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 528 529 /* Since we match four bits, we will give a value of 4-1 = 3 530 in a match. If there is a corresponding exact match of a 531 special register in another pattern, it will get a value of 532 4, which will be higher. This should be correct in that an 533 exact pattern would match better than a general pattern. 534 535 Note that there is a reason for not returning zero; the 536 pattern for "clear" is partly matched in the bit-pattern 537 (the two lower bits must be zero), while the bit-pattern 538 for a move from a special register is matched in the 539 register constraint. */ 540 541 if (sregp != NULL) 542 { 543 retval += 3; 544 break; 545 } 546 else 547 return -1; 548 } 549 } 550 551 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok) 552 return -1; 553 554 return retval; 555} 556 557/* Format number as hex with a leading "0x" into outbuffer. */ 558 559static char * 560format_hex (unsigned long number, 561 char *outbuffer, 562 struct cris_disasm_data *disdata) 563{ 564 /* Truncate negative numbers on >32-bit hosts. */ 565 number &= 0xffffffff; 566 567 sprintf (outbuffer, "0x%lx", number); 568 569 /* Save this value for the "case" support. */ 570 if (TRACE_CASE) 571 last_immediate = number; 572 573 return outbuffer + strlen (outbuffer); 574} 575 576/* Format number as decimal into outbuffer. Parameter signedp says 577 whether the number should be formatted as signed (!= 0) or 578 unsigned (== 0). */ 579 580static char * 581format_dec (long number, char *outbuffer, int signedp) 582{ 583 last_immediate = number; 584 if (signedp) 585 sprintf (outbuffer, "%ld", number); 586 else 587 sprintf (outbuffer, "%lu", (unsigned long) number); 588 589 return outbuffer + strlen (outbuffer); 590} 591 592/* Format the name of the general register regno into outbuffer. */ 593 594static char * 595format_reg (struct cris_disasm_data *disdata, 596 int regno, 597 char *outbuffer_start, 598 bfd_boolean with_reg_prefix) 599{ 600 char *outbuffer = outbuffer_start; 601 602 if (with_reg_prefix) 603 *outbuffer++ = REGISTER_PREFIX_CHAR; 604 605 switch (regno) 606 { 607 case 15: 608 /* For v32, there is no context in which we output PC. */ 609 if (disdata->distype == cris_dis_v32) 610 strcpy (outbuffer, "acr"); 611 else 612 strcpy (outbuffer, "pc"); 613 break; 614 615 case 14: 616 strcpy (outbuffer, "sp"); 617 break; 618 619 default: 620 sprintf (outbuffer, "r%d", regno); 621 break; 622 } 623 624 return outbuffer_start + strlen (outbuffer_start); 625} 626 627/* Format the name of a support register into outbuffer. */ 628 629static char * 630format_sup_reg (unsigned int regno, 631 char *outbuffer_start, 632 bfd_boolean with_reg_prefix) 633{ 634 char *outbuffer = outbuffer_start; 635 int i; 636 637 if (with_reg_prefix) 638 *outbuffer++ = REGISTER_PREFIX_CHAR; 639 640 for (i = 0; cris_support_regs[i].name != NULL; i++) 641 if (cris_support_regs[i].number == regno) 642 { 643 sprintf (outbuffer, "%s", cris_support_regs[i].name); 644 return outbuffer_start + strlen (outbuffer_start); 645 } 646 647 /* There's supposed to be register names covering all numbers, though 648 some may be generic names. */ 649 sprintf (outbuffer, "format_sup_reg-BUG"); 650 return outbuffer_start + strlen (outbuffer_start); 651} 652 653/* Return the length of an instruction. */ 654 655static unsigned 656bytes_to_skip (unsigned int insn, 657 const struct cris_opcode *matchedp, 658 enum cris_disass_family distype, 659 const struct cris_opcode *prefix_matchedp) 660{ 661 /* Each insn is a word plus "immediate" operands. */ 662 unsigned to_skip = 2; 663 const char *template_name = (const char *) matchedp->args; 664 const char *s; 665 666 for (s = template_name; *s; s++) 667 if ((*s == 's' || *s == 'N' || *s == 'Y') 668 && (insn & 0x400) && (insn & 15) == 15 669 && prefix_matchedp == NULL) 670 { 671 /* Immediate via [pc+], so we have to check the size of the 672 operand. */ 673 int mode_size = 1 << ((insn >> 4) & (*template_name == 'z' ? 1 : 3)); 674 675 if (matchedp->imm_oprnd_size == SIZE_FIX_32) 676 to_skip += 4; 677 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG) 678 { 679 const struct cris_spec_reg *sregp 680 = spec_reg_info ((insn >> 12) & 15, distype); 681 682 /* FIXME: Improve error handling; should have been caught 683 earlier. */ 684 if (sregp == NULL) 685 return 2; 686 687 /* PC is incremented by two, not one, for a byte. Except on 688 CRISv32, where constants are always DWORD-size for 689 special registers. */ 690 to_skip += 691 distype == cris_dis_v32 ? 4 : (sregp->reg_size + 1) & ~1; 692 } 693 else 694 to_skip += (mode_size + 1) & ~1; 695 } 696 else if (*s == 'n') 697 to_skip += 4; 698 else if (*s == 'b') 699 to_skip += 2; 700 701 return to_skip; 702} 703 704/* Print condition code flags. */ 705 706static char * 707print_flags (struct cris_disasm_data *disdata, unsigned int insn, char *cp) 708{ 709 /* Use the v8 (Etrax 100) flag definitions for disassembly. 710 The differences with v0 (Etrax 1..4) vs. Svinto are: 711 v0 'd' <=> v8 'm' 712 v0 'e' <=> v8 'b'. 713 FIXME: Emit v0..v3 flag names somehow. */ 714 static const char v8_fnames[] = "cvznxibm"; 715 static const char v32_fnames[] = "cvznxiup"; 716 const char *fnames 717 = disdata->distype == cris_dis_v32 ? v32_fnames : v8_fnames; 718 719 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15)); 720 int i; 721 722 for (i = 0; i < 8; i++) 723 if (flagbits & (1 << i)) 724 *cp++ = fnames[i]; 725 726 return cp; 727} 728 729/* Print out an insn with its operands, and update the info->insn_type 730 fields. The prefix_opcodep and the rest hold a prefix insn that is 731 supposed to be output as an address mode. */ 732 733static void 734print_with_operands (const struct cris_opcode *opcodep, 735 unsigned int insn, 736 unsigned char *buffer, 737 bfd_vma addr, 738 disassemble_info *info, 739 /* If a prefix insn was before this insn (and is supposed 740 to be output as an address), here is a description of 741 it. */ 742 const struct cris_opcode *prefix_opcodep, 743 unsigned int prefix_insn, 744 unsigned char *prefix_buffer, 745 bfd_boolean with_reg_prefix) 746{ 747 /* Get a buffer of somewhat reasonable size where we store 748 intermediate parts of the insn. */ 749 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2]; 750 char *tp = temp; 751 static const char mode_char[] = "bwd?"; 752 const char *s; 753 const char *cs; 754 struct cris_disasm_data *disdata 755 = (struct cris_disasm_data *) info->private_data; 756 757 /* Print out the name first thing we do. */ 758 (*info->fprintf_func) (info->stream, "%s", opcodep->name); 759 760 cs = opcodep->args; 761 s = cs; 762 763 /* Ignore any prefix indicator. */ 764 if (*s == 'p') 765 s++; 766 767 if (*s == 'm' || *s == 'M' || *s == 'z') 768 { 769 *tp++ = '.'; 770 771 /* Get the size-letter. */ 772 *tp++ = *s == 'M' 773 ? (insn & 0x8000 ? 'd' 774 : insn & 0x4000 ? 'w' : 'b') 775 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)]; 776 777 /* Ignore the size and the space character that follows. */ 778 s += 2; 779 } 780 781 /* Add a space if this isn't a long-branch, because for those will add 782 the condition part of the name later. */ 783 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256)) 784 *tp++ = ' '; 785 786 /* Fill in the insn-type if deducible from the name (and there's no 787 better way). */ 788 if (opcodep->name[0] == 'j') 789 { 790 if (CONST_STRNEQ (opcodep->name, "jsr")) 791 /* It's "jsr" or "jsrc". */ 792 info->insn_type = dis_jsr; 793 else 794 /* Any other jump-type insn is considered a branch. */ 795 info->insn_type = dis_branch; 796 } 797 798 /* We might know some more fields right now. */ 799 info->branch_delay_insns = opcodep->delayed; 800 801 /* Handle operands. */ 802 for (; *s; s++) 803 { 804 switch (*s) 805 { 806 case 'T': 807 tp = format_sup_reg ((insn >> 12) & 15, tp, with_reg_prefix); 808 break; 809 810 case 'A': 811 if (with_reg_prefix) 812 *tp++ = REGISTER_PREFIX_CHAR; 813 *tp++ = 'a'; 814 *tp++ = 'c'; 815 *tp++ = 'r'; 816 break; 817 818 case '[': 819 case ']': 820 case ',': 821 *tp++ = *s; 822 break; 823 824 case '!': 825 /* Ignore at this point; used at earlier stages to avoid 826 recognition if there's a prefix at something that in other 827 ways looks like a "pop". */ 828 break; 829 830 case 'd': 831 /* Ignore. This is an optional ".d " on the large one of 832 relaxable insns. */ 833 break; 834 835 case 'B': 836 /* This was the prefix that made this a "push". We've already 837 handled it by recognizing it, so signal that the prefix is 838 handled by setting it to NULL. */ 839 prefix_opcodep = NULL; 840 break; 841 842 case 'D': 843 case 'r': 844 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 845 break; 846 847 case 'R': 848 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 849 break; 850 851 case 'n': 852 { 853 /* Like N but pc-relative to the start of the insn. */ 854 unsigned long number 855 = (buffer[2] + buffer[3] * 256 + buffer[4] * 65536 856 + buffer[5] * 0x1000000 + addr); 857 858 /* Finish off and output previous formatted bytes. */ 859 *tp = 0; 860 if (temp[0]) 861 (*info->fprintf_func) (info->stream, "%s", temp); 862 tp = temp; 863 864 (*info->print_address_func) ((bfd_vma) number, info); 865 } 866 break; 867 868 case 'u': 869 { 870 /* Like n but the offset is bits <3:0> in the instruction. */ 871 unsigned long number = (buffer[0] & 0xf) * 2 + addr; 872 873 /* Finish off and output previous formatted bytes. */ 874 *tp = 0; 875 if (temp[0]) 876 (*info->fprintf_func) (info->stream, "%s", temp); 877 tp = temp; 878 879 (*info->print_address_func) ((bfd_vma) number, info); 880 } 881 break; 882 883 case 'N': 884 case 'y': 885 case 'Y': 886 case 'S': 887 case 's': 888 /* Any "normal" memory operand. */ 889 if ((insn & 0x400) && (insn & 15) == 15 && prefix_opcodep == NULL) 890 { 891 /* We're looking at [pc+], i.e. we need to output an immediate 892 number, where the size can depend on different things. */ 893 long number; 894 int signedp 895 = ((*cs == 'z' && (insn & 0x20)) 896 || opcodep->match == BDAP_QUICK_OPCODE); 897 int nbytes; 898 899 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 900 nbytes = 4; 901 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 902 { 903 const struct cris_spec_reg *sregp 904 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 905 906 /* A NULL return should have been as a non-match earlier, 907 so catch it as an internal error in the error-case 908 below. */ 909 if (sregp == NULL) 910 /* Whatever non-valid size. */ 911 nbytes = 42; 912 else 913 /* PC is always incremented by a multiple of two. 914 For CRISv32, immediates are always 4 bytes for 915 special registers. */ 916 nbytes = disdata->distype == cris_dis_v32 917 ? 4 : (sregp->reg_size + 1) & ~1; 918 } 919 else 920 { 921 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3)); 922 923 if (mode_size == 1) 924 nbytes = 2; 925 else 926 nbytes = mode_size; 927 } 928 929 switch (nbytes) 930 { 931 case 1: 932 number = buffer[2]; 933 if (signedp && number > 127) 934 number -= 256; 935 break; 936 937 case 2: 938 number = buffer[2] + buffer[3] * 256; 939 if (signedp && number > 32767) 940 number -= 65536; 941 break; 942 943 case 4: 944 number 945 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536 946 + buffer[5] * 0x1000000; 947 break; 948 949 default: 950 strcpy (tp, "bug"); 951 tp += 3; 952 number = 42; 953 } 954 955 if ((*cs == 'z' && (insn & 0x20)) 956 || (opcodep->match == BDAP_QUICK_OPCODE 957 && (nbytes <= 2 || buffer[1 + nbytes] == 0))) 958 tp = format_dec (number, tp, signedp); 959 else 960 { 961 unsigned int highbyte = (number >> 24) & 0xff; 962 963 /* Either output this as an address or as a number. If it's 964 a dword with the same high-byte as the address of the 965 insn, assume it's an address, and also if it's a non-zero 966 non-0xff high-byte. If this is a jsr or a jump, then 967 it's definitely an address. */ 968 if (nbytes == 4 969 && (highbyte == ((addr >> 24) & 0xff) 970 || (highbyte != 0 && highbyte != 0xff) 971 || info->insn_type == dis_branch 972 || info->insn_type == dis_jsr)) 973 { 974 /* Finish off and output previous formatted bytes. */ 975 *tp = 0; 976 tp = temp; 977 if (temp[0]) 978 (*info->fprintf_func) (info->stream, "%s", temp); 979 980 (*info->print_address_func) ((bfd_vma) number, info); 981 982 info->target = number; 983 } 984 else 985 tp = format_hex (number, tp, disdata); 986 } 987 } 988 else 989 { 990 /* Not an immediate number. Then this is a (possibly 991 prefixed) memory operand. */ 992 if (info->insn_type != dis_nonbranch) 993 { 994 int mode_size 995 = 1 << ((insn >> 4) 996 & (opcodep->args[0] == 'z' ? 1 : 3)); 997 int size; 998 info->insn_type = dis_dref; 999 info->flags |= CRIS_DIS_FLAG_MEMREF; 1000 1001 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 1002 size = 4; 1003 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 1004 { 1005 const struct cris_spec_reg *sregp 1006 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 1007 1008 /* FIXME: Improve error handling; should have been caught 1009 earlier. */ 1010 if (sregp == NULL) 1011 size = 4; 1012 else 1013 size = sregp->reg_size; 1014 } 1015 else 1016 size = mode_size; 1017 1018 info->data_size = size; 1019 } 1020 1021 *tp++ = '['; 1022 1023 if (prefix_opcodep 1024 /* We don't match dip with a postincremented field 1025 as a side-effect address mode. */ 1026 && ((insn & 0x400) == 0 1027 || prefix_opcodep->match != DIP_OPCODE)) 1028 { 1029 if (insn & 0x400) 1030 { 1031 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 1032 *tp++ = '='; 1033 } 1034 1035 1036 /* We mainly ignore the prefix format string when the 1037 address-mode syntax is output. */ 1038 switch (prefix_opcodep->match) 1039 { 1040 case DIP_OPCODE: 1041 /* It's [r], [r+] or [pc+]. */ 1042 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 1043 { 1044 /* It's [pc+]. This cannot possibly be anything 1045 but an address. */ 1046 unsigned long number 1047 = prefix_buffer[2] + prefix_buffer[3] * 256 1048 + prefix_buffer[4] * 65536 1049 + prefix_buffer[5] * 0x1000000; 1050 1051 info->target = (bfd_vma) number; 1052 1053 /* Finish off and output previous formatted 1054 data. */ 1055 *tp = 0; 1056 tp = temp; 1057 if (temp[0]) 1058 (*info->fprintf_func) (info->stream, "%s", temp); 1059 1060 (*info->print_address_func) ((bfd_vma) number, info); 1061 } 1062 else 1063 { 1064 /* For a memref in an address, we use target2. 1065 In this case, target is zero. */ 1066 info->flags 1067 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1068 | CRIS_DIS_FLAG_MEM_TARGET2_MEM); 1069 1070 info->target2 = prefix_insn & 15; 1071 1072 *tp++ = '['; 1073 tp = format_reg (disdata, prefix_insn & 15, tp, 1074 with_reg_prefix); 1075 if (prefix_insn & 0x400) 1076 *tp++ = '+'; 1077 *tp++ = ']'; 1078 } 1079 break; 1080 1081 case BDAP_QUICK_OPCODE: 1082 { 1083 int number; 1084 1085 number = prefix_buffer[0]; 1086 if (number > 127) 1087 number -= 256; 1088 1089 /* Output "reg+num" or, if num < 0, "reg-num". */ 1090 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1091 with_reg_prefix); 1092 if (number >= 0) 1093 *tp++ = '+'; 1094 tp = format_dec (number, tp, 1); 1095 1096 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1097 info->target = (prefix_insn >> 12) & 15; 1098 info->target2 = (bfd_vma) number; 1099 break; 1100 } 1101 1102 case BIAP_OPCODE: 1103 /* Output "r+R.m". */ 1104 tp = format_reg (disdata, prefix_insn & 15, tp, 1105 with_reg_prefix); 1106 *tp++ = '+'; 1107 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1108 with_reg_prefix); 1109 *tp++ = '.'; 1110 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 1111 1112 info->flags 1113 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1114 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 1115 1116 | ((prefix_insn & 0x8000) 1117 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4 1118 : ((prefix_insn & 0x8000) 1119 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0))); 1120 1121 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */ 1122 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f) 1123 /* Then start interpreting data as offsets. */ 1124 case_offset_counter = no_of_case_offsets; 1125 break; 1126 1127 case BDAP_INDIR_OPCODE: 1128 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or 1129 "r-s". */ 1130 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1131 with_reg_prefix); 1132 1133 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 1134 { 1135 long number; 1136 unsigned int nbytes; 1137 1138 /* It's a value. Get its size. */ 1139 int mode_size = 1 << ((prefix_insn >> 4) & 3); 1140 1141 if (mode_size == 1) 1142 nbytes = 2; 1143 else 1144 nbytes = mode_size; 1145 1146 switch (nbytes) 1147 { 1148 case 1: 1149 number = prefix_buffer[2]; 1150 if (number > 127) 1151 number -= 256; 1152 break; 1153 1154 case 2: 1155 number = prefix_buffer[2] + prefix_buffer[3] * 256; 1156 if (number > 32767) 1157 number -= 65536; 1158 break; 1159 1160 case 4: 1161 number 1162 = prefix_buffer[2] + prefix_buffer[3] * 256 1163 + prefix_buffer[4] * 65536 1164 + prefix_buffer[5] * 0x1000000; 1165 break; 1166 1167 default: 1168 strcpy (tp, "bug"); 1169 tp += 3; 1170 number = 42; 1171 } 1172 1173 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1174 info->target2 = (bfd_vma) number; 1175 1176 /* If the size is dword, then assume it's an 1177 address. */ 1178 if (nbytes == 4) 1179 { 1180 /* Finish off and output previous formatted 1181 bytes. */ 1182 *tp++ = '+'; 1183 *tp = 0; 1184 tp = temp; 1185 (*info->fprintf_func) (info->stream, "%s", temp); 1186 1187 (*info->print_address_func) ((bfd_vma) number, info); 1188 } 1189 else 1190 { 1191 if (number >= 0) 1192 *tp++ = '+'; 1193 tp = format_dec (number, tp, 1); 1194 } 1195 } 1196 else 1197 { 1198 /* Output "r+[R].m" or "r+[R+].m". */ 1199 *tp++ = '+'; 1200 *tp++ = '['; 1201 tp = format_reg (disdata, prefix_insn & 15, tp, 1202 with_reg_prefix); 1203 if (prefix_insn & 0x400) 1204 *tp++ = '+'; 1205 *tp++ = ']'; 1206 *tp++ = '.'; 1207 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 1208 1209 info->flags 1210 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1211 | CRIS_DIS_FLAG_MEM_TARGET2_MEM 1212 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 1213 1214 | (((prefix_insn >> 4) == 2) 1215 ? 0 1216 : (((prefix_insn >> 4) & 3) == 1 1217 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD 1218 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE))); 1219 } 1220 break; 1221 1222 default: 1223 (*info->fprintf_func) (info->stream, "?prefix-bug"); 1224 } 1225 1226 /* To mark that the prefix is used, reset it. */ 1227 prefix_opcodep = NULL; 1228 } 1229 else 1230 { 1231 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 1232 1233 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1234 info->target = insn & 15; 1235 1236 if (insn & 0x400) 1237 *tp++ = '+'; 1238 } 1239 *tp++ = ']'; 1240 } 1241 break; 1242 1243 case 'x': 1244 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 1245 *tp++ = '.'; 1246 *tp++ = mode_char[(insn >> 4) & 3]; 1247 break; 1248 1249 case 'I': 1250 tp = format_dec (insn & 63, tp, 0); 1251 break; 1252 1253 case 'b': 1254 { 1255 int where = buffer[2] + buffer[3] * 256; 1256 1257 if (where > 32767) 1258 where -= 65536; 1259 1260 where += addr + ((disdata->distype == cris_dis_v32) ? 0 : 4); 1261 1262 if (insn == BA_PC_INCR_OPCODE) 1263 info->insn_type = dis_branch; 1264 else 1265 info->insn_type = dis_condbranch; 1266 1267 info->target = (bfd_vma) where; 1268 1269 *tp = 0; 1270 tp = temp; 1271 (*info->fprintf_func) (info->stream, "%s%s ", 1272 temp, cris_cc_strings[insn >> 12]); 1273 1274 (*info->print_address_func) ((bfd_vma) where, info); 1275 } 1276 break; 1277 1278 case 'c': 1279 tp = format_dec (insn & 31, tp, 0); 1280 break; 1281 1282 case 'C': 1283 tp = format_dec (insn & 15, tp, 0); 1284 break; 1285 1286 case 'o': 1287 { 1288 long offset = insn & 0xfe; 1289 bfd_vma target; 1290 1291 if (insn & 1) 1292 offset |= ~0xff; 1293 1294 if (opcodep->match == BA_QUICK_OPCODE) 1295 info->insn_type = dis_branch; 1296 else 1297 info->insn_type = dis_condbranch; 1298 1299 target = addr + ((disdata->distype == cris_dis_v32) ? 0 : 2) + offset; 1300 info->target = target; 1301 *tp = 0; 1302 tp = temp; 1303 (*info->fprintf_func) (info->stream, "%s", temp); 1304 (*info->print_address_func) (target, info); 1305 } 1306 break; 1307 1308 case 'Q': 1309 case 'O': 1310 { 1311 long number = buffer[0]; 1312 1313 if (number > 127) 1314 number = number - 256; 1315 1316 tp = format_dec (number, tp, 1); 1317 *tp++ = ','; 1318 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 1319 } 1320 break; 1321 1322 case 'f': 1323 tp = print_flags (disdata, insn, tp); 1324 break; 1325 1326 case 'i': 1327 tp = format_dec ((insn & 32) ? (insn & 31) | ~31L : insn & 31, tp, 1); 1328 break; 1329 1330 case 'P': 1331 { 1332 const struct cris_spec_reg *sregp 1333 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 1334 1335 if (sregp->name == NULL) 1336 /* Should have been caught as a non-match eariler. */ 1337 *tp++ = '?'; 1338 else 1339 { 1340 if (with_reg_prefix) 1341 *tp++ = REGISTER_PREFIX_CHAR; 1342 strcpy (tp, sregp->name); 1343 tp += strlen (tp); 1344 } 1345 } 1346 break; 1347 1348 default: 1349 strcpy (tp, "???"); 1350 tp += 3; 1351 } 1352 } 1353 1354 *tp = 0; 1355 1356 if (prefix_opcodep) 1357 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")", 1358 prefix_opcodep->name, prefix_opcodep->args); 1359 1360 (*info->fprintf_func) (info->stream, "%s", temp); 1361 1362 /* Get info for matching case-tables, if we don't have any active. 1363 We assume that the last constant seen is used; either in the insn 1364 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */ 1365 if (TRACE_CASE && case_offset_counter == 0) 1366 { 1367 if (CONST_STRNEQ (opcodep->name, "sub")) 1368 case_offset = last_immediate; 1369 1370 /* It could also be an "add", if there are negative case-values. */ 1371 else if (CONST_STRNEQ (opcodep->name, "add")) 1372 /* The first case is the negated operand to the add. */ 1373 case_offset = -last_immediate; 1374 1375 /* A bound insn will tell us the number of cases. */ 1376 else if (CONST_STRNEQ (opcodep->name, "bound")) 1377 no_of_case_offsets = last_immediate + 1; 1378 1379 /* A jump or jsr or branch breaks the chain of insns for a 1380 case-table, so assume default first-case again. */ 1381 else if (info->insn_type == dis_jsr 1382 || info->insn_type == dis_branch 1383 || info->insn_type == dis_condbranch) 1384 case_offset = 0; 1385 } 1386} 1387 1388 1389/* Print the CRIS instruction at address memaddr on stream. Returns 1390 length of the instruction, in bytes. Prefix register names with `$' if 1391 WITH_REG_PREFIX. */ 1392 1393static int 1394print_insn_cris_generic (bfd_vma memaddr, 1395 disassemble_info *info, 1396 bfd_boolean with_reg_prefix) 1397{ 1398 int nbytes; 1399 unsigned int insn; 1400 const struct cris_opcode *matchedp; 1401 int advance = 0; 1402 struct cris_disasm_data *disdata 1403 = (struct cris_disasm_data *) info->private_data; 1404 1405 /* No instruction will be disassembled as longer than this number of 1406 bytes; stacked prefixes will not be expanded. */ 1407 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN]; 1408 unsigned char *bufp; 1409 int status = 0; 1410 bfd_vma addr; 1411 1412 /* There will be an "out of range" error after the last instruction. 1413 Reading pairs of bytes in decreasing number, we hope that we will get 1414 at least the amount that we will consume. 1415 1416 If we can't get any data, or we do not get enough data, we print 1417 the error message. */ 1418 1419 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2) 1420 { 1421 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info); 1422 if (status == 0) 1423 break; 1424 } 1425 1426 /* If we did not get all we asked for, then clear the rest. 1427 Hopefully this makes a reproducible result in case of errors. */ 1428 if (nbytes != MAX_BYTES_PER_CRIS_INSN) 1429 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes); 1430 1431 addr = memaddr; 1432 bufp = buffer; 1433 1434 /* Set some defaults for the insn info. */ 1435 info->insn_info_valid = 1; 1436 info->branch_delay_insns = 0; 1437 info->data_size = 0; 1438 info->insn_type = dis_nonbranch; 1439 info->flags = 0; 1440 info->target = 0; 1441 info->target2 = 0; 1442 1443 /* If we got any data, disassemble it. */ 1444 if (nbytes != 0) 1445 { 1446 matchedp = NULL; 1447 1448 insn = bufp[0] + bufp[1] * 256; 1449 1450 /* If we're in a case-table, don't disassemble the offsets. */ 1451 if (TRACE_CASE && case_offset_counter != 0) 1452 { 1453 info->insn_type = dis_noninsn; 1454 advance += 2; 1455 1456 /* If to print data as offsets, then shortcut here. */ 1457 (*info->fprintf_func) (info->stream, "case %ld%s: -> ", 1458 case_offset + no_of_case_offsets 1459 - case_offset_counter, 1460 case_offset_counter == 1 ? "/default" : 1461 ""); 1462 1463 (*info->print_address_func) ((bfd_vma) 1464 ((short) (insn) 1465 + (long) (addr 1466 - (no_of_case_offsets 1467 - case_offset_counter) 1468 * 2)), info); 1469 case_offset_counter--; 1470 1471 /* The default case start (without a "sub" or "add") must be 1472 zero. */ 1473 if (case_offset_counter == 0) 1474 case_offset = 0; 1475 } 1476 else if (insn == 0) 1477 { 1478 /* We're often called to disassemble zeroes. While this is a 1479 valid "bcc .+2" insn, it is also useless enough and enough 1480 of a nuiscance that we will just output "bcc .+2" for it 1481 and signal it as a noninsn. */ 1482 (*info->fprintf_func) (info->stream, 1483 disdata->distype == cris_dis_v32 1484 ? "bcc ." : "bcc .+2"); 1485 info->insn_type = dis_noninsn; 1486 advance += 2; 1487 } 1488 else 1489 { 1490 const struct cris_opcode *prefix_opcodep = NULL; 1491 unsigned char *prefix_buffer = bufp; 1492 unsigned int prefix_insn = insn; 1493 int prefix_size = 0; 1494 1495 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX, disdata); 1496 1497 /* Check if we're supposed to write out prefixes as address 1498 modes and if this was a prefix. */ 1499 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p') 1500 { 1501 /* If it's a prefix, put it into the prefix vars and get the 1502 main insn. */ 1503 prefix_size = bytes_to_skip (prefix_insn, matchedp, 1504 disdata->distype, NULL); 1505 prefix_opcodep = matchedp; 1506 1507 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256; 1508 matchedp = get_opcode_entry (insn, prefix_insn, disdata); 1509 1510 if (matchedp != NULL) 1511 { 1512 addr += prefix_size; 1513 bufp += prefix_size; 1514 advance += prefix_size; 1515 } 1516 else 1517 { 1518 /* The "main" insn wasn't valid, at least not when 1519 prefixed. Put back things enough to output the 1520 prefix insn only, as a normal insn. */ 1521 matchedp = prefix_opcodep; 1522 insn = prefix_insn; 1523 prefix_opcodep = NULL; 1524 } 1525 } 1526 1527 if (matchedp == NULL) 1528 { 1529 (*info->fprintf_func) (info->stream, "??0x%x", insn); 1530 advance += 2; 1531 1532 info->insn_type = dis_noninsn; 1533 } 1534 else 1535 { 1536 advance 1537 += bytes_to_skip (insn, matchedp, disdata->distype, 1538 prefix_opcodep); 1539 1540 /* The info_type and assorted fields will be set according 1541 to the operands. */ 1542 print_with_operands (matchedp, insn, bufp, addr, info, 1543 prefix_opcodep, prefix_insn, 1544 prefix_buffer, with_reg_prefix); 1545 } 1546 } 1547 } 1548 else 1549 info->insn_type = dis_noninsn; 1550 1551 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error 1552 status when reading that much, and the insn decoding indicated a 1553 length exceeding what we read, there is an error. */ 1554 if (status != 0 && (nbytes == 0 || advance > nbytes)) 1555 { 1556 (*info->memory_error_func) (status, memaddr, info); 1557 return -1; 1558 } 1559 1560 /* Max supported insn size with one folded prefix insn. */ 1561 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN; 1562 1563 /* I would like to set this to a fixed value larger than the actual 1564 number of bytes to print in order to avoid spaces between bytes, 1565 but objdump.c (2.9.1) does not like that, so we print 16-bit 1566 chunks, which is the next choice. */ 1567 info->bytes_per_chunk = 2; 1568 1569 /* Printing bytes in order of increasing addresses makes sense, 1570 especially on a little-endian target. 1571 This is completely the opposite of what you think; setting this to 1572 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N 1573 we want. */ 1574 info->display_endian = BFD_ENDIAN_BIG; 1575 1576 return advance; 1577} 1578 1579/* Disassemble, prefixing register names with `$'. CRIS v0..v10. */ 1580 1581static int 1582print_insn_cris_with_register_prefix (bfd_vma vma, 1583 disassemble_info *info) 1584{ 1585 if (info->private_data == NULL 1586 && !cris_parse_disassembler_options (info, cris_dis_v0_v10)) 1587 return -1; 1588 return print_insn_cris_generic (vma, info, TRUE); 1589} 1590 1591/* Disassemble, prefixing register names with `$'. CRIS v32. */ 1592 1593static int 1594print_insn_crisv32_with_register_prefix (bfd_vma vma, 1595 disassemble_info *info) 1596{ 1597 if (info->private_data == NULL 1598 && !cris_parse_disassembler_options (info, cris_dis_v32)) 1599 return -1; 1600 return print_insn_cris_generic (vma, info, TRUE); 1601} 1602 1603/* Disassemble, prefixing register names with `$'. 1604 Common v10 and v32 subset. */ 1605 1606static int 1607print_insn_crisv10_v32_with_register_prefix (bfd_vma vma, 1608 disassemble_info *info) 1609{ 1610 if (info->private_data == NULL 1611 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) 1612 return -1; 1613 return print_insn_cris_generic (vma, info, TRUE); 1614} 1615 1616/* Disassemble, no prefixes on register names. CRIS v0..v10. */ 1617 1618static int 1619print_insn_cris_without_register_prefix (bfd_vma vma, 1620 disassemble_info *info) 1621{ 1622 if (info->private_data == NULL 1623 && !cris_parse_disassembler_options (info, cris_dis_v0_v10)) 1624 return -1; 1625 return print_insn_cris_generic (vma, info, FALSE); 1626} 1627 1628/* Disassemble, no prefixes on register names. CRIS v32. */ 1629 1630static int 1631print_insn_crisv32_without_register_prefix (bfd_vma vma, 1632 disassemble_info *info) 1633{ 1634 if (info->private_data == NULL 1635 && !cris_parse_disassembler_options (info, cris_dis_v32)) 1636 return -1; 1637 return print_insn_cris_generic (vma, info, FALSE); 1638} 1639 1640/* Disassemble, no prefixes on register names. 1641 Common v10 and v32 subset. */ 1642 1643static int 1644print_insn_crisv10_v32_without_register_prefix (bfd_vma vma, 1645 disassemble_info *info) 1646{ 1647 if (info->private_data == NULL 1648 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) 1649 return -1; 1650 return print_insn_cris_generic (vma, info, FALSE); 1651} 1652 1653/* Return a disassembler-function that prints registers with a `$' prefix, 1654 or one that prints registers without a prefix. 1655 FIXME: We should improve the solution to avoid the multitude of 1656 functions seen above. */ 1657 1658disassembler_ftype 1659cris_get_disassembler (bfd *abfd) 1660{ 1661 /* If there's no bfd in sight, we return what is valid as input in all 1662 contexts if fed back to the assembler: disassembly *with* register 1663 prefix. Unfortunately this will be totally wrong for v32. */ 1664 if (abfd == NULL) 1665 return print_insn_cris_with_register_prefix; 1666 1667 if (bfd_get_symbol_leading_char (abfd) == 0) 1668 { 1669 if (bfd_get_mach (abfd) == bfd_mach_cris_v32) 1670 return print_insn_crisv32_with_register_prefix; 1671 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32) 1672 return print_insn_crisv10_v32_with_register_prefix; 1673 1674 /* We default to v10. This may be specifically specified in the 1675 bfd mach, but is also the default setting. */ 1676 return print_insn_cris_with_register_prefix; 1677 } 1678 1679 if (bfd_get_mach (abfd) == bfd_mach_cris_v32) 1680 return print_insn_crisv32_without_register_prefix; 1681 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32) 1682 return print_insn_crisv10_v32_without_register_prefix; 1683 return print_insn_cris_without_register_prefix; 1684} 1685 1686/* Local variables: 1687 eval: (c-set-style "gnu") 1688 indent-tabs-mode: t 1689 End: */ 1690