1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 4 Free Software Foundation, Inc. 5 Written by Ian Lance Taylor, Cygnus Support. 6 7 This file is part of GAS, the GNU Assembler. 8 9 GAS is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 GAS is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with GAS; see the file COPYING. If not, write to the Free 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 22 02110-1301, USA. */ 23 24#include "as.h" 25#include "safe-ctype.h" 26#include "subsegs.h" 27#include "dw2gencfi.h" 28#include "opcode/ppc.h" 29 30#ifdef OBJ_ELF 31#include "elf/ppc.h" 32#include "dwarf2dbg.h" 33#endif 34 35#ifdef TE_PE 36#include "coff/pe.h" 37#endif 38 39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ 40 41/* Tell the main code what the endianness is. */ 42extern int target_big_endian; 43 44/* Whether or not, we've set target_big_endian. */ 45static int set_target_endian = 0; 46 47/* Whether to use user friendly register names. */ 48#ifndef TARGET_REG_NAMES_P 49#ifdef TE_PE 50#define TARGET_REG_NAMES_P TRUE 51#else 52#define TARGET_REG_NAMES_P FALSE 53#endif 54#endif 55 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, 57 HIGHESTA. */ 58 59/* #lo(value) denotes the least significant 16 bits of the indicated. */ 60#define PPC_LO(v) ((v) & 0xffff) 61 62/* #hi(value) denotes bits 16 through 31 of the indicated value. */ 63#define PPC_HI(v) (((v) >> 16) & 0xffff) 64 65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of 66 the indicated value, compensating for #lo() being treated as a 67 signed number. */ 68#define PPC_HA(v) PPC_HI ((v) + 0x8000) 69 70/* #higher(value) denotes bits 32 through 47 of the indicated value. */ 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) 72 73/* #highera(value) denotes bits 32 through 47 of the indicated value, 74 compensating for #lo() being treated as a signed number. */ 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) 76 77/* #highest(value) denotes bits 48 through 63 of the indicated value. */ 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) 79 80/* #highesta(value) denotes bits 48 through 63 of the indicated value, 81 compensating for #lo being treated as a signed number. */ 82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) 83 84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000) 85 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; 87 88static void ppc_macro (char *, const struct powerpc_macro *); 89static void ppc_byte (int); 90 91#if defined (OBJ_XCOFF) || defined (OBJ_ELF) 92static void ppc_tc (int); 93static void ppc_machine (int); 94#endif 95 96#ifdef OBJ_XCOFF 97static void ppc_comm (int); 98static void ppc_bb (int); 99static void ppc_bc (int); 100static void ppc_bf (int); 101static void ppc_biei (int); 102static void ppc_bs (int); 103static void ppc_eb (int); 104static void ppc_ec (int); 105static void ppc_ef (int); 106static void ppc_es (int); 107static void ppc_csect (int); 108static void ppc_change_csect (symbolS *, offsetT); 109static void ppc_function (int); 110static void ppc_extern (int); 111static void ppc_lglobl (int); 112static void ppc_ref (int); 113static void ppc_section (int); 114static void ppc_named_section (int); 115static void ppc_stabx (int); 116static void ppc_rename (int); 117static void ppc_toc (int); 118static void ppc_xcoff_cons (int); 119static void ppc_vbyte (int); 120#endif 121 122#ifdef OBJ_ELF 123static void ppc_elf_cons (int); 124static void ppc_elf_rdata (int); 125static void ppc_elf_lcomm (int); 126#endif 127 128#ifdef TE_PE 129static void ppc_previous (int); 130static void ppc_pdata (int); 131static void ppc_ydata (int); 132static void ppc_reldata (int); 133static void ppc_rdata (int); 134static void ppc_ualong (int); 135static void ppc_znop (int); 136static void ppc_pe_comm (int); 137static void ppc_pe_section (int); 138static void ppc_pe_function (int); 139static void ppc_pe_tocd (int); 140#endif 141 142/* Generic assembler global variables which must be defined by all 143 targets. */ 144 145#ifdef OBJ_ELF 146/* This string holds the chars that always start a comment. If the 147 pre-processor is disabled, these aren't very useful. The macro 148 tc_comment_chars points to this. We use this, rather than the 149 usual comment_chars, so that we can switch for Solaris conventions. */ 150static const char ppc_solaris_comment_chars[] = "#!"; 151static const char ppc_eabi_comment_chars[] = "#"; 152 153#ifdef TARGET_SOLARIS_COMMENT 154const char *ppc_comment_chars = ppc_solaris_comment_chars; 155#else 156const char *ppc_comment_chars = ppc_eabi_comment_chars; 157#endif 158#else 159const char comment_chars[] = "#"; 160#endif 161 162/* Characters which start a comment at the beginning of a line. */ 163const char line_comment_chars[] = "#"; 164 165/* Characters which may be used to separate multiple commands on a 166 single line. */ 167const char line_separator_chars[] = ";"; 168 169/* Characters which are used to indicate an exponent in a floating 170 point number. */ 171const char EXP_CHARS[] = "eE"; 172 173/* Characters which mean that a number is a floating point constant, 174 as in 0d1.0. */ 175const char FLT_CHARS[] = "dD"; 176 177/* Anything that can start an operand needs to be mentioned here, 178 to stop the input scrubber eating whitespace. */ 179const char ppc_symbol_chars[] = "%["; 180 181/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ 182int ppc_cie_data_alignment; 183 184/* More than this number of nops in an alignment op gets a branch 185 instead. */ 186unsigned long nop_limit = 4; 187 188/* The type of processor we are assembling for. This is one or more 189 of the PPC_OPCODE flags defined in opcode/ppc.h. */ 190ppc_cpu_t ppc_cpu = 0; 191 192/* Flags set on encountering toc relocs. */ 193enum { 194 has_large_toc_reloc = 1, 195 has_small_toc_reloc = 2 196} toc_reloc_types; 197 198/* The target specific pseudo-ops which we support. */ 199 200const pseudo_typeS md_pseudo_table[] = 201{ 202 /* Pseudo-ops which must be overridden. */ 203 { "byte", ppc_byte, 0 }, 204 205#ifdef OBJ_XCOFF 206 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these 207 legitimately belong in the obj-*.c file. However, XCOFF is based 208 on COFF, and is only implemented for the RS/6000. We just use 209 obj-coff.c, and add what we need here. */ 210 { "comm", ppc_comm, 0 }, 211 { "lcomm", ppc_comm, 1 }, 212 { "bb", ppc_bb, 0 }, 213 { "bc", ppc_bc, 0 }, 214 { "bf", ppc_bf, 0 }, 215 { "bi", ppc_biei, 0 }, 216 { "bs", ppc_bs, 0 }, 217 { "csect", ppc_csect, 0 }, 218 { "data", ppc_section, 'd' }, 219 { "eb", ppc_eb, 0 }, 220 { "ec", ppc_ec, 0 }, 221 { "ef", ppc_ef, 0 }, 222 { "ei", ppc_biei, 1 }, 223 { "es", ppc_es, 0 }, 224 { "extern", ppc_extern, 0 }, 225 { "function", ppc_function, 0 }, 226 { "lglobl", ppc_lglobl, 0 }, 227 { "ref", ppc_ref, 0 }, 228 { "rename", ppc_rename, 0 }, 229 { "section", ppc_named_section, 0 }, 230 { "stabx", ppc_stabx, 0 }, 231 { "text", ppc_section, 't' }, 232 { "toc", ppc_toc, 0 }, 233 { "long", ppc_xcoff_cons, 2 }, 234 { "llong", ppc_xcoff_cons, 3 }, 235 { "word", ppc_xcoff_cons, 1 }, 236 { "short", ppc_xcoff_cons, 1 }, 237 { "vbyte", ppc_vbyte, 0 }, 238#endif 239 240#ifdef OBJ_ELF 241 { "llong", ppc_elf_cons, 8 }, 242 { "quad", ppc_elf_cons, 8 }, 243 { "long", ppc_elf_cons, 4 }, 244 { "word", ppc_elf_cons, 2 }, 245 { "short", ppc_elf_cons, 2 }, 246 { "rdata", ppc_elf_rdata, 0 }, 247 { "rodata", ppc_elf_rdata, 0 }, 248 { "lcomm", ppc_elf_lcomm, 0 }, 249#endif 250 251#ifdef TE_PE 252 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 253 { "previous", ppc_previous, 0 }, 254 { "pdata", ppc_pdata, 0 }, 255 { "ydata", ppc_ydata, 0 }, 256 { "reldata", ppc_reldata, 0 }, 257 { "rdata", ppc_rdata, 0 }, 258 { "ualong", ppc_ualong, 0 }, 259 { "znop", ppc_znop, 0 }, 260 { "comm", ppc_pe_comm, 0 }, 261 { "lcomm", ppc_pe_comm, 1 }, 262 { "section", ppc_pe_section, 0 }, 263 { "function", ppc_pe_function,0 }, 264 { "tocd", ppc_pe_tocd, 0 }, 265#endif 266 267#if defined (OBJ_XCOFF) || defined (OBJ_ELF) 268 { "tc", ppc_tc, 0 }, 269 { "machine", ppc_machine, 0 }, 270#endif 271 272 { NULL, NULL, 0 } 273}; 274 275 276/* Predefined register names if -mregnames (or default for Windows NT). 277 In general, there are lots of them, in an attempt to be compatible 278 with a number of other Windows NT assemblers. */ 279 280/* Structure to hold information about predefined registers. */ 281struct pd_reg 282 { 283 char *name; 284 int value; 285 }; 286 287/* List of registers that are pre-defined: 288 289 Each general register has predefined names of the form: 290 1. r<reg_num> which has the value <reg_num>. 291 2. r.<reg_num> which has the value <reg_num>. 292 293 Each floating point register has predefined names of the form: 294 1. f<reg_num> which has the value <reg_num>. 295 2. f.<reg_num> which has the value <reg_num>. 296 297 Each vector unit register has predefined names of the form: 298 1. v<reg_num> which has the value <reg_num>. 299 2. v.<reg_num> which has the value <reg_num>. 300 301 Each condition register has predefined names of the form: 302 1. cr<reg_num> which has the value <reg_num>. 303 2. cr.<reg_num> which has the value <reg_num>. 304 305 There are individual registers as well: 306 sp or r.sp has the value 1 307 rtoc or r.toc has the value 2 308 fpscr has the value 0 309 xer has the value 1 310 lr has the value 8 311 ctr has the value 9 312 pmr has the value 0 313 dar has the value 19 314 dsisr has the value 18 315 dec has the value 22 316 sdr1 has the value 25 317 srr0 has the value 26 318 srr1 has the value 27 319 320 The table is sorted. Suitable for searching by a binary search. */ 321 322static const struct pd_reg pre_defined_registers[] = 323{ 324 { "cr.0", 0 }, /* Condition Registers */ 325 { "cr.1", 1 }, 326 { "cr.2", 2 }, 327 { "cr.3", 3 }, 328 { "cr.4", 4 }, 329 { "cr.5", 5 }, 330 { "cr.6", 6 }, 331 { "cr.7", 7 }, 332 333 { "cr0", 0 }, 334 { "cr1", 1 }, 335 { "cr2", 2 }, 336 { "cr3", 3 }, 337 { "cr4", 4 }, 338 { "cr5", 5 }, 339 { "cr6", 6 }, 340 { "cr7", 7 }, 341 342 { "ctr", 9 }, 343 344 { "dar", 19 }, /* Data Access Register */ 345 { "dec", 22 }, /* Decrementer */ 346 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ 347 348 { "f.0", 0 }, /* Floating point registers */ 349 { "f.1", 1 }, 350 { "f.10", 10 }, 351 { "f.11", 11 }, 352 { "f.12", 12 }, 353 { "f.13", 13 }, 354 { "f.14", 14 }, 355 { "f.15", 15 }, 356 { "f.16", 16 }, 357 { "f.17", 17 }, 358 { "f.18", 18 }, 359 { "f.19", 19 }, 360 { "f.2", 2 }, 361 { "f.20", 20 }, 362 { "f.21", 21 }, 363 { "f.22", 22 }, 364 { "f.23", 23 }, 365 { "f.24", 24 }, 366 { "f.25", 25 }, 367 { "f.26", 26 }, 368 { "f.27", 27 }, 369 { "f.28", 28 }, 370 { "f.29", 29 }, 371 { "f.3", 3 }, 372 { "f.30", 30 }, 373 { "f.31", 31 }, 374 375 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ 376 { "f.33", 33 }, 377 { "f.34", 34 }, 378 { "f.35", 35 }, 379 { "f.36", 36 }, 380 { "f.37", 37 }, 381 { "f.38", 38 }, 382 { "f.39", 39 }, 383 { "f.4", 4 }, 384 { "f.40", 40 }, 385 { "f.41", 41 }, 386 { "f.42", 42 }, 387 { "f.43", 43 }, 388 { "f.44", 44 }, 389 { "f.45", 45 }, 390 { "f.46", 46 }, 391 { "f.47", 47 }, 392 { "f.48", 48 }, 393 { "f.49", 49 }, 394 { "f.5", 5 }, 395 { "f.50", 50 }, 396 { "f.51", 51 }, 397 { "f.52", 52 }, 398 { "f.53", 53 }, 399 { "f.54", 54 }, 400 { "f.55", 55 }, 401 { "f.56", 56 }, 402 { "f.57", 57 }, 403 { "f.58", 58 }, 404 { "f.59", 59 }, 405 { "f.6", 6 }, 406 { "f.60", 60 }, 407 { "f.61", 61 }, 408 { "f.62", 62 }, 409 { "f.63", 63 }, 410 { "f.7", 7 }, 411 { "f.8", 8 }, 412 { "f.9", 9 }, 413 414 { "f0", 0 }, 415 { "f1", 1 }, 416 { "f10", 10 }, 417 { "f11", 11 }, 418 { "f12", 12 }, 419 { "f13", 13 }, 420 { "f14", 14 }, 421 { "f15", 15 }, 422 { "f16", 16 }, 423 { "f17", 17 }, 424 { "f18", 18 }, 425 { "f19", 19 }, 426 { "f2", 2 }, 427 { "f20", 20 }, 428 { "f21", 21 }, 429 { "f22", 22 }, 430 { "f23", 23 }, 431 { "f24", 24 }, 432 { "f25", 25 }, 433 { "f26", 26 }, 434 { "f27", 27 }, 435 { "f28", 28 }, 436 { "f29", 29 }, 437 { "f3", 3 }, 438 { "f30", 30 }, 439 { "f31", 31 }, 440 441 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ 442 { "f33", 33 }, 443 { "f34", 34 }, 444 { "f35", 35 }, 445 { "f36", 36 }, 446 { "f37", 37 }, 447 { "f38", 38 }, 448 { "f39", 39 }, 449 { "f4", 4 }, 450 { "f40", 40 }, 451 { "f41", 41 }, 452 { "f42", 42 }, 453 { "f43", 43 }, 454 { "f44", 44 }, 455 { "f45", 45 }, 456 { "f46", 46 }, 457 { "f47", 47 }, 458 { "f48", 48 }, 459 { "f49", 49 }, 460 { "f5", 5 }, 461 { "f50", 50 }, 462 { "f51", 51 }, 463 { "f52", 52 }, 464 { "f53", 53 }, 465 { "f54", 54 }, 466 { "f55", 55 }, 467 { "f56", 56 }, 468 { "f57", 57 }, 469 { "f58", 58 }, 470 { "f59", 59 }, 471 { "f6", 6 }, 472 { "f60", 60 }, 473 { "f61", 61 }, 474 { "f62", 62 }, 475 { "f63", 63 }, 476 { "f7", 7 }, 477 { "f8", 8 }, 478 { "f9", 9 }, 479 480 { "fpscr", 0 }, 481 482 /* Quantization registers used with pair single instructions. */ 483 { "gqr.0", 0 }, 484 { "gqr.1", 1 }, 485 { "gqr.2", 2 }, 486 { "gqr.3", 3 }, 487 { "gqr.4", 4 }, 488 { "gqr.5", 5 }, 489 { "gqr.6", 6 }, 490 { "gqr.7", 7 }, 491 { "gqr0", 0 }, 492 { "gqr1", 1 }, 493 { "gqr2", 2 }, 494 { "gqr3", 3 }, 495 { "gqr4", 4 }, 496 { "gqr5", 5 }, 497 { "gqr6", 6 }, 498 { "gqr7", 7 }, 499 500 { "lr", 8 }, /* Link Register */ 501 502 { "pmr", 0 }, 503 504 { "r.0", 0 }, /* General Purpose Registers */ 505 { "r.1", 1 }, 506 { "r.10", 10 }, 507 { "r.11", 11 }, 508 { "r.12", 12 }, 509 { "r.13", 13 }, 510 { "r.14", 14 }, 511 { "r.15", 15 }, 512 { "r.16", 16 }, 513 { "r.17", 17 }, 514 { "r.18", 18 }, 515 { "r.19", 19 }, 516 { "r.2", 2 }, 517 { "r.20", 20 }, 518 { "r.21", 21 }, 519 { "r.22", 22 }, 520 { "r.23", 23 }, 521 { "r.24", 24 }, 522 { "r.25", 25 }, 523 { "r.26", 26 }, 524 { "r.27", 27 }, 525 { "r.28", 28 }, 526 { "r.29", 29 }, 527 { "r.3", 3 }, 528 { "r.30", 30 }, 529 { "r.31", 31 }, 530 { "r.4", 4 }, 531 { "r.5", 5 }, 532 { "r.6", 6 }, 533 { "r.7", 7 }, 534 { "r.8", 8 }, 535 { "r.9", 9 }, 536 537 { "r.sp", 1 }, /* Stack Pointer */ 538 539 { "r.toc", 2 }, /* Pointer to the table of contents */ 540 541 { "r0", 0 }, /* More general purpose registers */ 542 { "r1", 1 }, 543 { "r10", 10 }, 544 { "r11", 11 }, 545 { "r12", 12 }, 546 { "r13", 13 }, 547 { "r14", 14 }, 548 { "r15", 15 }, 549 { "r16", 16 }, 550 { "r17", 17 }, 551 { "r18", 18 }, 552 { "r19", 19 }, 553 { "r2", 2 }, 554 { "r20", 20 }, 555 { "r21", 21 }, 556 { "r22", 22 }, 557 { "r23", 23 }, 558 { "r24", 24 }, 559 { "r25", 25 }, 560 { "r26", 26 }, 561 { "r27", 27 }, 562 { "r28", 28 }, 563 { "r29", 29 }, 564 { "r3", 3 }, 565 { "r30", 30 }, 566 { "r31", 31 }, 567 { "r4", 4 }, 568 { "r5", 5 }, 569 { "r6", 6 }, 570 { "r7", 7 }, 571 { "r8", 8 }, 572 { "r9", 9 }, 573 574 { "rtoc", 2 }, /* Table of contents */ 575 576 { "sdr1", 25 }, /* Storage Description Register 1 */ 577 578 { "sp", 1 }, 579 580 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ 581 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ 582 583 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ 584 { "v.1", 1 }, 585 { "v.10", 10 }, 586 { "v.11", 11 }, 587 { "v.12", 12 }, 588 { "v.13", 13 }, 589 { "v.14", 14 }, 590 { "v.15", 15 }, 591 { "v.16", 16 }, 592 { "v.17", 17 }, 593 { "v.18", 18 }, 594 { "v.19", 19 }, 595 { "v.2", 2 }, 596 { "v.20", 20 }, 597 { "v.21", 21 }, 598 { "v.22", 22 }, 599 { "v.23", 23 }, 600 { "v.24", 24 }, 601 { "v.25", 25 }, 602 { "v.26", 26 }, 603 { "v.27", 27 }, 604 { "v.28", 28 }, 605 { "v.29", 29 }, 606 { "v.3", 3 }, 607 { "v.30", 30 }, 608 { "v.31", 31 }, 609 { "v.4", 4 }, 610 { "v.5", 5 }, 611 { "v.6", 6 }, 612 { "v.7", 7 }, 613 { "v.8", 8 }, 614 { "v.9", 9 }, 615 616 { "v0", 0 }, 617 { "v1", 1 }, 618 { "v10", 10 }, 619 { "v11", 11 }, 620 { "v12", 12 }, 621 { "v13", 13 }, 622 { "v14", 14 }, 623 { "v15", 15 }, 624 { "v16", 16 }, 625 { "v17", 17 }, 626 { "v18", 18 }, 627 { "v19", 19 }, 628 { "v2", 2 }, 629 { "v20", 20 }, 630 { "v21", 21 }, 631 { "v22", 22 }, 632 { "v23", 23 }, 633 { "v24", 24 }, 634 { "v25", 25 }, 635 { "v26", 26 }, 636 { "v27", 27 }, 637 { "v28", 28 }, 638 { "v29", 29 }, 639 { "v3", 3 }, 640 { "v30", 30 }, 641 { "v31", 31 }, 642 { "v4", 4 }, 643 { "v5", 5 }, 644 { "v6", 6 }, 645 { "v7", 7 }, 646 { "v8", 8 }, 647 { "v9", 9 }, 648 649 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ 650 { "vs.1", 1 }, 651 { "vs.10", 10 }, 652 { "vs.11", 11 }, 653 { "vs.12", 12 }, 654 { "vs.13", 13 }, 655 { "vs.14", 14 }, 656 { "vs.15", 15 }, 657 { "vs.16", 16 }, 658 { "vs.17", 17 }, 659 { "vs.18", 18 }, 660 { "vs.19", 19 }, 661 { "vs.2", 2 }, 662 { "vs.20", 20 }, 663 { "vs.21", 21 }, 664 { "vs.22", 22 }, 665 { "vs.23", 23 }, 666 { "vs.24", 24 }, 667 { "vs.25", 25 }, 668 { "vs.26", 26 }, 669 { "vs.27", 27 }, 670 { "vs.28", 28 }, 671 { "vs.29", 29 }, 672 { "vs.3", 3 }, 673 { "vs.30", 30 }, 674 { "vs.31", 31 }, 675 { "vs.32", 32 }, 676 { "vs.33", 33 }, 677 { "vs.34", 34 }, 678 { "vs.35", 35 }, 679 { "vs.36", 36 }, 680 { "vs.37", 37 }, 681 { "vs.38", 38 }, 682 { "vs.39", 39 }, 683 { "vs.4", 4 }, 684 { "vs.40", 40 }, 685 { "vs.41", 41 }, 686 { "vs.42", 42 }, 687 { "vs.43", 43 }, 688 { "vs.44", 44 }, 689 { "vs.45", 45 }, 690 { "vs.46", 46 }, 691 { "vs.47", 47 }, 692 { "vs.48", 48 }, 693 { "vs.49", 49 }, 694 { "vs.5", 5 }, 695 { "vs.50", 50 }, 696 { "vs.51", 51 }, 697 { "vs.52", 52 }, 698 { "vs.53", 53 }, 699 { "vs.54", 54 }, 700 { "vs.55", 55 }, 701 { "vs.56", 56 }, 702 { "vs.57", 57 }, 703 { "vs.58", 58 }, 704 { "vs.59", 59 }, 705 { "vs.6", 6 }, 706 { "vs.60", 60 }, 707 { "vs.61", 61 }, 708 { "vs.62", 62 }, 709 { "vs.63", 63 }, 710 { "vs.7", 7 }, 711 { "vs.8", 8 }, 712 { "vs.9", 9 }, 713 714 { "vs0", 0 }, 715 { "vs1", 1 }, 716 { "vs10", 10 }, 717 { "vs11", 11 }, 718 { "vs12", 12 }, 719 { "vs13", 13 }, 720 { "vs14", 14 }, 721 { "vs15", 15 }, 722 { "vs16", 16 }, 723 { "vs17", 17 }, 724 { "vs18", 18 }, 725 { "vs19", 19 }, 726 { "vs2", 2 }, 727 { "vs20", 20 }, 728 { "vs21", 21 }, 729 { "vs22", 22 }, 730 { "vs23", 23 }, 731 { "vs24", 24 }, 732 { "vs25", 25 }, 733 { "vs26", 26 }, 734 { "vs27", 27 }, 735 { "vs28", 28 }, 736 { "vs29", 29 }, 737 { "vs3", 3 }, 738 { "vs30", 30 }, 739 { "vs31", 31 }, 740 { "vs32", 32 }, 741 { "vs33", 33 }, 742 { "vs34", 34 }, 743 { "vs35", 35 }, 744 { "vs36", 36 }, 745 { "vs37", 37 }, 746 { "vs38", 38 }, 747 { "vs39", 39 }, 748 { "vs4", 4 }, 749 { "vs40", 40 }, 750 { "vs41", 41 }, 751 { "vs42", 42 }, 752 { "vs43", 43 }, 753 { "vs44", 44 }, 754 { "vs45", 45 }, 755 { "vs46", 46 }, 756 { "vs47", 47 }, 757 { "vs48", 48 }, 758 { "vs49", 49 }, 759 { "vs5", 5 }, 760 { "vs50", 50 }, 761 { "vs51", 51 }, 762 { "vs52", 52 }, 763 { "vs53", 53 }, 764 { "vs54", 54 }, 765 { "vs55", 55 }, 766 { "vs56", 56 }, 767 { "vs57", 57 }, 768 { "vs58", 58 }, 769 { "vs59", 59 }, 770 { "vs6", 6 }, 771 { "vs60", 60 }, 772 { "vs61", 61 }, 773 { "vs62", 62 }, 774 { "vs63", 63 }, 775 { "vs7", 7 }, 776 { "vs8", 8 }, 777 { "vs9", 9 }, 778 779 { "xer", 1 }, 780 781}; 782 783#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) 784 785/* Given NAME, find the register number associated with that name, return 786 the integer value associated with the given name or -1 on failure. */ 787 788static int 789reg_name_search (const struct pd_reg *regs, int regcount, const char *name) 790{ 791 int middle, low, high; 792 int cmp; 793 794 low = 0; 795 high = regcount - 1; 796 797 do 798 { 799 middle = (low + high) / 2; 800 cmp = strcasecmp (name, regs[middle].name); 801 if (cmp < 0) 802 high = middle - 1; 803 else if (cmp > 0) 804 low = middle + 1; 805 else 806 return regs[middle].value; 807 } 808 while (low <= high); 809 810 return -1; 811} 812 813/* 814 * Summary of register_name. 815 * 816 * in: Input_line_pointer points to 1st char of operand. 817 * 818 * out: A expressionS. 819 * The operand may have been a register: in this case, X_op == O_register, 820 * X_add_number is set to the register number, and truth is returned. 821 * Input_line_pointer->(next non-blank) char after operand, or is in its 822 * original state. 823 */ 824 825static bfd_boolean 826register_name (expressionS *expressionP) 827{ 828 int reg_number; 829 char *name; 830 char *start; 831 char c; 832 833 /* Find the spelling of the operand. */ 834 start = name = input_line_pointer; 835 if (name[0] == '%' && ISALPHA (name[1])) 836 name = ++input_line_pointer; 837 838 else if (!reg_names_p || !ISALPHA (name[0])) 839 return FALSE; 840 841 c = get_symbol_end (); 842 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); 843 844 /* Put back the delimiting char. */ 845 *input_line_pointer = c; 846 847 /* Look to see if it's in the register table. */ 848 if (reg_number >= 0) 849 { 850 expressionP->X_op = O_register; 851 expressionP->X_add_number = reg_number; 852 853 /* Make the rest nice. */ 854 expressionP->X_add_symbol = NULL; 855 expressionP->X_op_symbol = NULL; 856 return TRUE; 857 } 858 859 /* Reset the line as if we had not done anything. */ 860 input_line_pointer = start; 861 return FALSE; 862} 863 864/* This function is called for each symbol seen in an expression. It 865 handles the special parsing which PowerPC assemblers are supposed 866 to use for condition codes. */ 867 868/* Whether to do the special parsing. */ 869static bfd_boolean cr_operand; 870 871/* Names to recognize in a condition code. This table is sorted. */ 872static const struct pd_reg cr_names[] = 873{ 874 { "cr0", 0 }, 875 { "cr1", 1 }, 876 { "cr2", 2 }, 877 { "cr3", 3 }, 878 { "cr4", 4 }, 879 { "cr5", 5 }, 880 { "cr6", 6 }, 881 { "cr7", 7 }, 882 { "eq", 2 }, 883 { "gt", 1 }, 884 { "lt", 0 }, 885 { "so", 3 }, 886 { "un", 3 } 887}; 888 889/* Parsing function. This returns non-zero if it recognized an 890 expression. */ 891 892int 893ppc_parse_name (const char *name, expressionS *exp) 894{ 895 int val; 896 897 if (! cr_operand) 898 return 0; 899 900 if (*name == '%') 901 ++name; 902 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], 903 name); 904 if (val < 0) 905 return 0; 906 907 exp->X_op = O_constant; 908 exp->X_add_number = val; 909 910 return 1; 911} 912 913/* Local variables. */ 914 915/* Whether to target xcoff64/elf64. */ 916static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; 917 918/* Opcode hash table. */ 919static struct hash_control *ppc_hash; 920 921/* Macro hash table. */ 922static struct hash_control *ppc_macro_hash; 923 924#ifdef OBJ_ELF 925/* What type of shared library support to use. */ 926static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; 927 928/* Flags to set in the elf header. */ 929static flagword ppc_flags = 0; 930 931/* Whether this is Solaris or not. */ 932#ifdef TARGET_SOLARIS_COMMENT 933#define SOLARIS_P TRUE 934#else 935#define SOLARIS_P FALSE 936#endif 937 938static bfd_boolean msolaris = SOLARIS_P; 939#endif 940 941#ifdef OBJ_XCOFF 942 943/* The RS/6000 assembler uses the .csect pseudo-op to generate code 944 using a bunch of different sections. These assembler sections, 945 however, are all encompassed within the .text or .data sections of 946 the final output file. We handle this by using different 947 subsegments within these main segments. */ 948 949/* Next subsegment to allocate within the .text segment. */ 950static subsegT ppc_text_subsegment = 2; 951 952/* Linked list of csects in the text section. */ 953static symbolS *ppc_text_csects; 954 955/* Next subsegment to allocate within the .data segment. */ 956static subsegT ppc_data_subsegment = 2; 957 958/* Linked list of csects in the data section. */ 959static symbolS *ppc_data_csects; 960 961/* The current csect. */ 962static symbolS *ppc_current_csect; 963 964/* The RS/6000 assembler uses a TOC which holds addresses of functions 965 and variables. Symbols are put in the TOC with the .tc pseudo-op. 966 A special relocation is used when accessing TOC entries. We handle 967 the TOC as a subsegment within the .data segment. We set it up if 968 we see a .toc pseudo-op, and save the csect symbol here. */ 969static symbolS *ppc_toc_csect; 970 971/* The first frag in the TOC subsegment. */ 972static fragS *ppc_toc_frag; 973 974/* The first frag in the first subsegment after the TOC in the .data 975 segment. NULL if there are no subsegments after the TOC. */ 976static fragS *ppc_after_toc_frag; 977 978/* The current static block. */ 979static symbolS *ppc_current_block; 980 981/* The COFF debugging section; set by md_begin. This is not the 982 .debug section, but is instead the secret BFD section which will 983 cause BFD to set the section number of a symbol to N_DEBUG. */ 984static asection *ppc_coff_debug_section; 985 986#endif /* OBJ_XCOFF */ 987 988#ifdef TE_PE 989 990/* Various sections that we need for PE coff support. */ 991static segT ydata_section; 992static segT pdata_section; 993static segT reldata_section; 994static segT rdata_section; 995static segT tocdata_section; 996 997/* The current section and the previous section. See ppc_previous. */ 998static segT ppc_previous_section; 999static segT ppc_current_section; 1000 1001#endif /* TE_PE */ 1002 1003#ifdef OBJ_ELF 1004symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ 1005#define PPC_APUINFO_ISEL 0x40 1006#define PPC_APUINFO_PMR 0x41 1007#define PPC_APUINFO_RFMCI 0x42 1008#define PPC_APUINFO_CACHELCK 0x43 1009#define PPC_APUINFO_SPE 0x100 1010#define PPC_APUINFO_EFS 0x101 1011#define PPC_APUINFO_BRLOCK 0x102 1012 1013/* 1014 * We keep a list of APUinfo 1015 */ 1016unsigned long *ppc_apuinfo_list; 1017unsigned int ppc_apuinfo_num; 1018unsigned int ppc_apuinfo_num_alloc; 1019#endif /* OBJ_ELF */ 1020 1021#ifdef OBJ_ELF 1022const char *const md_shortopts = "b:l:usm:K:VQ:"; 1023#else 1024const char *const md_shortopts = "um:"; 1025#endif 1026#define OPTION_NOPS (OPTION_MD_BASE + 0) 1027const struct option md_longopts[] = { 1028 {"nops", required_argument, NULL, OPTION_NOPS}, 1029 {NULL, no_argument, NULL, 0} 1030}; 1031const size_t md_longopts_size = sizeof (md_longopts); 1032 1033int 1034md_parse_option (int c, char *arg) 1035{ 1036 ppc_cpu_t new_cpu; 1037 1038 switch (c) 1039 { 1040 case 'u': 1041 /* -u means that any undefined symbols should be treated as 1042 external, which is the default for gas anyhow. */ 1043 break; 1044 1045#ifdef OBJ_ELF 1046 case 'l': 1047 /* Solaris as takes -le (presumably for little endian). For completeness 1048 sake, recognize -be also. */ 1049 if (strcmp (arg, "e") == 0) 1050 { 1051 target_big_endian = 0; 1052 set_target_endian = 1; 1053 } 1054 else 1055 return 0; 1056 1057 break; 1058 1059 case 'b': 1060 if (strcmp (arg, "e") == 0) 1061 { 1062 target_big_endian = 1; 1063 set_target_endian = 1; 1064 } 1065 else 1066 return 0; 1067 1068 break; 1069 1070 case 'K': 1071 /* Recognize -K PIC. */ 1072 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) 1073 { 1074 shlib = SHLIB_PIC; 1075 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1076 } 1077 else 1078 return 0; 1079 1080 break; 1081#endif 1082 1083 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ 1084 case 'a': 1085 if (strcmp (arg, "64") == 0) 1086 { 1087#ifdef BFD64 1088 ppc_obj64 = 1; 1089#else 1090 as_fatal (_("%s unsupported"), "-a64"); 1091#endif 1092 } 1093 else if (strcmp (arg, "32") == 0) 1094 ppc_obj64 = 0; 1095 else 1096 return 0; 1097 break; 1098 1099 case 'm': 1100 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0) 1101 ppc_cpu = new_cpu; 1102 1103 else if (strcmp (arg, "regnames") == 0) 1104 reg_names_p = TRUE; 1105 1106 else if (strcmp (arg, "no-regnames") == 0) 1107 reg_names_p = FALSE; 1108 1109#ifdef OBJ_ELF 1110 /* -mrelocatable/-mrelocatable-lib -- warn about initializations 1111 that require relocation. */ 1112 else if (strcmp (arg, "relocatable") == 0) 1113 { 1114 shlib = SHLIB_MRELOCATABLE; 1115 ppc_flags |= EF_PPC_RELOCATABLE; 1116 } 1117 1118 else if (strcmp (arg, "relocatable-lib") == 0) 1119 { 1120 shlib = SHLIB_MRELOCATABLE; 1121 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1122 } 1123 1124 /* -memb, set embedded bit. */ 1125 else if (strcmp (arg, "emb") == 0) 1126 ppc_flags |= EF_PPC_EMB; 1127 1128 /* -mlittle/-mbig set the endianess. */ 1129 else if (strcmp (arg, "little") == 0 1130 || strcmp (arg, "little-endian") == 0) 1131 { 1132 target_big_endian = 0; 1133 set_target_endian = 1; 1134 } 1135 1136 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) 1137 { 1138 target_big_endian = 1; 1139 set_target_endian = 1; 1140 } 1141 1142 else if (strcmp (arg, "solaris") == 0) 1143 { 1144 msolaris = TRUE; 1145 ppc_comment_chars = ppc_solaris_comment_chars; 1146 } 1147 1148 else if (strcmp (arg, "no-solaris") == 0) 1149 { 1150 msolaris = FALSE; 1151 ppc_comment_chars = ppc_eabi_comment_chars; 1152 } 1153#endif 1154 else 1155 { 1156 as_bad (_("invalid switch -m%s"), arg); 1157 return 0; 1158 } 1159 break; 1160 1161#ifdef OBJ_ELF 1162 /* -V: SVR4 argument to print version ID. */ 1163 case 'V': 1164 print_version_id (); 1165 break; 1166 1167 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section 1168 should be emitted or not. FIXME: Not implemented. */ 1169 case 'Q': 1170 break; 1171 1172 /* Solaris takes -s to specify that .stabs go in a .stabs section, 1173 rather than .stabs.excl, which is ignored by the linker. 1174 FIXME: Not implemented. */ 1175 case 's': 1176 if (arg) 1177 return 0; 1178 1179 break; 1180#endif 1181 1182 case OPTION_NOPS: 1183 { 1184 char *end; 1185 nop_limit = strtoul (optarg, &end, 0); 1186 if (*end) 1187 as_bad (_("--nops needs a numeric argument")); 1188 } 1189 break; 1190 1191 default: 1192 return 0; 1193 } 1194 1195 return 1; 1196} 1197 1198void 1199md_show_usage (FILE *stream) 1200{ 1201 fprintf (stream, _("\ 1202PowerPC options:\n\ 1203-a32 generate ELF32/XCOFF32\n\ 1204-a64 generate ELF64/XCOFF64\n\ 1205-u ignored\n\ 1206-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ 1207-mpwr generate code for POWER (RIOS1)\n\ 1208-m601 generate code for PowerPC 601\n\ 1209-mppc, -mppc32, -m603, -m604\n\ 1210 generate code for PowerPC 603/604\n\ 1211-m403 generate code for PowerPC 403\n\ 1212-m405 generate code for PowerPC 405\n\ 1213-m440 generate code for PowerPC 440\n\ 1214-m464 generate code for PowerPC 464\n\ 1215-m476 generate code for PowerPC 476\n\ 1216-m7400, -m7410, -m7450, -m7455\n\ 1217 generate code for PowerPC 7400/7410/7450/7455\n\ 1218-m750cl generate code for PowerPC 750cl\n")); 1219 fprintf (stream, _("\ 1220-mppc64, -m620 generate code for PowerPC 620/625/630\n\ 1221-mppc64bridge generate code for PowerPC 64, including bridge insns\n\ 1222-mbooke generate code for 32-bit PowerPC BookE\n\ 1223-ma2 generate code for A2 architecture\n\ 1224-mpower4, -mpwr4 generate code for Power4 architecture\n\ 1225-mpower5, -mpwr5, -mpwr5x\n\ 1226 generate code for Power5 architecture\n\ 1227-mpower6, -mpwr6 generate code for Power6 architecture\n\ 1228-mpower7, -mpwr7 generate code for Power7 architecture\n\ 1229-mcell generate code for Cell Broadband Engine architecture\n\ 1230-mcom generate code Power/PowerPC common instructions\n\ 1231-many generate code for any architecture (PWR/PWRX/PPC)\n")); 1232 fprintf (stream, _("\ 1233-maltivec generate code for AltiVec\n\ 1234-mvsx generate code for Vector-Scalar (VSX) instructions\n\ 1235-me300 generate code for PowerPC e300 family\n\ 1236-me500, -me500x2 generate code for Motorola e500 core complex\n\ 1237-me500mc, generate code for Freescale e500mc core complex\n\ 1238-me500mc64, generate code for Freescale e500mc64 core complex\n\ 1239-mspe generate code for Motorola SPE instructions\n\ 1240-mtitan generate code for AppliedMicro Titan core complex\n\ 1241-mregnames Allow symbolic names for registers\n\ 1242-mno-regnames Do not allow symbolic names for registers\n")); 1243#ifdef OBJ_ELF 1244 fprintf (stream, _("\ 1245-mrelocatable support for GCC's -mrelocatble option\n\ 1246-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ 1247-memb set PPC_EMB bit in ELF flags\n\ 1248-mlittle, -mlittle-endian, -le\n\ 1249 generate code for a little endian machine\n\ 1250-mbig, -mbig-endian, -be\n\ 1251 generate code for a big endian machine\n\ 1252-msolaris generate code for Solaris\n\ 1253-mno-solaris do not generate code for Solaris\n\ 1254-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\ 1255-V print assembler version number\n\ 1256-Qy, -Qn ignored\n")); 1257#endif 1258 fprintf (stream, _("\ 1259-nops=count when aligning, more than COUNT nops uses a branch\n")); 1260} 1261 1262/* Set ppc_cpu if it is not already set. */ 1263 1264static void 1265ppc_set_cpu (void) 1266{ 1267 const char *default_os = TARGET_OS; 1268 const char *default_cpu = TARGET_CPU; 1269 1270 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) 1271 { 1272 if (ppc_obj64) 1273 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; 1274 else if (strncmp (default_os, "aix", 3) == 0 1275 && default_os[3] >= '4' && default_os[3] <= '9') 1276 ppc_cpu |= PPC_OPCODE_COMMON; 1277 else if (strncmp (default_os, "aix3", 4) == 0) 1278 ppc_cpu |= PPC_OPCODE_POWER; 1279 else if (strcmp (default_cpu, "rs6000") == 0) 1280 ppc_cpu |= PPC_OPCODE_POWER; 1281 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1282 ppc_cpu |= PPC_OPCODE_PPC; 1283 else 1284 as_fatal (_("Unknown default cpu = %s, os = %s"), 1285 default_cpu, default_os); 1286 } 1287} 1288 1289/* Figure out the BFD architecture to use. This function and ppc_mach 1290 are called well before md_begin, when the output file is opened. */ 1291 1292enum bfd_architecture 1293ppc_arch (void) 1294{ 1295 const char *default_cpu = TARGET_CPU; 1296 ppc_set_cpu (); 1297 1298 if ((ppc_cpu & PPC_OPCODE_PPC) != 0) 1299 return bfd_arch_powerpc; 1300 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0) 1301 return bfd_arch_rs6000; 1302 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) 1303 { 1304 if (strcmp (default_cpu, "rs6000") == 0) 1305 return bfd_arch_rs6000; 1306 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1307 return bfd_arch_powerpc; 1308 } 1309 1310 as_fatal (_("Neither Power nor PowerPC opcodes were selected.")); 1311 return bfd_arch_unknown; 1312} 1313 1314unsigned long 1315ppc_mach (void) 1316{ 1317 if (ppc_obj64) 1318 return bfd_mach_ppc64; 1319 else if (ppc_arch () == bfd_arch_rs6000) 1320 return bfd_mach_rs6k; 1321 else if (ppc_cpu & PPC_OPCODE_TITAN) 1322 return bfd_mach_ppc_titan; 1323 else 1324 return bfd_mach_ppc; 1325} 1326 1327extern char* 1328ppc_target_format (void) 1329{ 1330#ifdef OBJ_COFF 1331#ifdef TE_PE 1332 return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; 1333#elif TE_POWERMAC 1334 return "xcoff-powermac"; 1335#else 1336# ifdef TE_AIX5 1337 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); 1338# else 1339 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); 1340# endif 1341#endif 1342#endif 1343#ifdef OBJ_ELF 1344# ifdef TE_VXWORKS 1345 return "elf32-powerpc-vxworks"; 1346# else 1347 return (target_big_endian 1348 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") 1349 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); 1350# endif 1351#endif 1352} 1353 1354/* Insert opcodes and macros into hash tables. Called at startup and 1355 for .cpu pseudo. */ 1356 1357static void 1358ppc_setup_opcodes (void) 1359{ 1360 const struct powerpc_opcode *op; 1361 const struct powerpc_opcode *op_end; 1362 const struct powerpc_macro *macro; 1363 const struct powerpc_macro *macro_end; 1364 bfd_boolean bad_insn = FALSE; 1365 1366 if (ppc_hash != NULL) 1367 hash_die (ppc_hash); 1368 if (ppc_macro_hash != NULL) 1369 hash_die (ppc_macro_hash); 1370 1371 /* Insert the opcodes into a hash table. */ 1372 ppc_hash = hash_new (); 1373 1374 if (ENABLE_CHECKING) 1375 { 1376 unsigned int i; 1377 1378 /* Check operand masks. Code here and in the disassembler assumes 1379 all the 1's in the mask are contiguous. */ 1380 for (i = 0; i < num_powerpc_operands; ++i) 1381 { 1382 unsigned long mask = powerpc_operands[i].bitm; 1383 unsigned long right_bit; 1384 unsigned int j; 1385 1386 right_bit = mask & -mask; 1387 mask += right_bit; 1388 right_bit = mask & -mask; 1389 if (mask != right_bit) 1390 { 1391 as_bad (_("powerpc_operands[%d].bitm invalid"), i); 1392 bad_insn = TRUE; 1393 } 1394 for (j = i + 1; j < num_powerpc_operands; ++j) 1395 if (memcmp (&powerpc_operands[i], &powerpc_operands[j], 1396 sizeof (powerpc_operands[0])) == 0) 1397 { 1398 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), 1399 j, i); 1400 bad_insn = TRUE; 1401 } 1402 } 1403 } 1404 1405 op_end = powerpc_opcodes + powerpc_num_opcodes; 1406 for (op = powerpc_opcodes; op < op_end; op++) 1407 { 1408 if (ENABLE_CHECKING) 1409 { 1410 const unsigned char *o; 1411 unsigned long omask = op->mask; 1412 1413 if (op != powerpc_opcodes) 1414 { 1415 /* The major opcodes had better be sorted. Code in the 1416 disassembler assumes the insns are sorted according to 1417 major opcode. */ 1418 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode)) 1419 { 1420 as_bad (_("major opcode is not sorted for %s"), 1421 op->name); 1422 bad_insn = TRUE; 1423 } 1424 1425 /* Warn if the table isn't more strictly ordered. 1426 Unfortunately it doesn't seem possible to order the 1427 table on much more than the major opcode, which makes 1428 it difficult to implement a binary search in the 1429 disassembler. The problem is that we have multiple 1430 ways to disassemble instructions, and we usually want 1431 to choose a more specific form (with more bits set in 1432 the opcode) than a more general form. eg. all of the 1433 following are equivalent: 1434 bne label # opcode = 0x40820000, mask = 0xff830003 1435 bf 2,label # opcode = 0x40800000, mask = 0xff800003 1436 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003 1437 1438 There are also cases where the table needs to be out 1439 of order to disassemble the correct instruction for 1440 processor variants. */ 1441 else if (0) 1442 { 1443 unsigned long t1 = op[0].opcode; 1444 unsigned long t2 = op[-1].opcode; 1445 1446 if (((t1 ^ t2) & 0xfc0007ff) == 0 1447 && (t1 & 0xfc0006df) == 0x7c000286) 1448 { 1449 /* spr field is split. */ 1450 t1 = ((t1 & ~0x1ff800) 1451 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5)); 1452 t2 = ((t2 & ~0x1ff800) 1453 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5)); 1454 } 1455 if (t1 < t2) 1456 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"), 1457 op[0].name, op[0].opcode, op[0].mask, 1458 op[-1].name, op[-1].opcode, op[-1].mask); 1459 } 1460 } 1461 1462 /* The mask had better not trim off opcode bits. */ 1463 if ((op->opcode & omask) != op->opcode) 1464 { 1465 as_bad (_("mask trims opcode bits for %s"), 1466 op->name); 1467 bad_insn = TRUE; 1468 } 1469 1470 /* The operands must not overlap the opcode or each other. */ 1471 for (o = op->operands; *o; ++o) 1472 if (*o >= num_powerpc_operands) 1473 { 1474 as_bad (_("operand index error for %s"), 1475 op->name); 1476 bad_insn = TRUE; 1477 } 1478 else 1479 { 1480 const struct powerpc_operand *operand = &powerpc_operands[*o]; 1481 if (operand->shift >= 0) 1482 { 1483 unsigned long mask = operand->bitm << operand->shift; 1484 if (omask & mask) 1485 { 1486 as_bad (_("operand %d overlap in %s"), 1487 (int) (o - op->operands), op->name); 1488 bad_insn = TRUE; 1489 } 1490 omask |= mask; 1491 } 1492 } 1493 } 1494 1495 if ((ppc_cpu & op->flags) != 0 1496 && !(ppc_cpu & op->deprecated)) 1497 { 1498 const char *retval; 1499 1500 retval = hash_insert (ppc_hash, op->name, (void *) op); 1501 if (retval != NULL) 1502 { 1503 as_bad (_("duplicate instruction %s"), 1504 op->name); 1505 bad_insn = TRUE; 1506 } 1507 } 1508 } 1509 1510 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1511 for (op = powerpc_opcodes; op < op_end; op++) 1512 hash_insert (ppc_hash, op->name, (void *) op); 1513 1514 /* Insert the macros into a hash table. */ 1515 ppc_macro_hash = hash_new (); 1516 1517 macro_end = powerpc_macros + powerpc_num_macros; 1518 for (macro = powerpc_macros; macro < macro_end; macro++) 1519 { 1520 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) 1521 { 1522 const char *retval; 1523 1524 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); 1525 if (retval != (const char *) NULL) 1526 { 1527 as_bad (_("duplicate macro %s"), macro->name); 1528 bad_insn = TRUE; 1529 } 1530 } 1531 } 1532 1533 if (bad_insn) 1534 abort (); 1535} 1536 1537/* This function is called when the assembler starts up. It is called 1538 after the options have been parsed and the output file has been 1539 opened. */ 1540 1541void 1542md_begin (void) 1543{ 1544 ppc_set_cpu (); 1545 1546 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; 1547 1548#ifdef OBJ_ELF 1549 /* Set the ELF flags if desired. */ 1550 if (ppc_flags && !msolaris) 1551 bfd_set_private_flags (stdoutput, ppc_flags); 1552#endif 1553 1554 ppc_setup_opcodes (); 1555 1556 /* Tell the main code what the endianness is if it is not overridden 1557 by the user. */ 1558 if (!set_target_endian) 1559 { 1560 set_target_endian = 1; 1561 target_big_endian = PPC_BIG_ENDIAN; 1562 } 1563 1564#ifdef OBJ_XCOFF 1565 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); 1566 1567 /* Create dummy symbols to serve as initial csects. This forces the 1568 text csects to precede the data csects. These symbols will not 1569 be output. */ 1570 ppc_text_csects = symbol_make ("dummy\001"); 1571 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; 1572 ppc_data_csects = symbol_make ("dummy\001"); 1573 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; 1574#endif 1575 1576#ifdef TE_PE 1577 1578 ppc_current_section = text_section; 1579 ppc_previous_section = 0; 1580 1581#endif 1582} 1583 1584void 1585ppc_cleanup (void) 1586{ 1587#ifdef OBJ_ELF 1588 if (ppc_apuinfo_list == NULL) 1589 return; 1590 1591 /* Ok, so write the section info out. We have this layout: 1592 1593 byte data what 1594 ---- ---- ---- 1595 0 8 length of "APUinfo\0" 1596 4 (n*4) number of APU's (4 bytes each) 1597 8 2 note type 2 1598 12 "APUinfo\0" name 1599 20 APU#1 first APU's info 1600 24 APU#2 second APU's info 1601 ... ... 1602 */ 1603 { 1604 char *p; 1605 asection *seg = now_seg; 1606 subsegT subseg = now_subseg; 1607 asection *apuinfo_secp = (asection *) NULL; 1608 unsigned int i; 1609 1610 /* Create the .PPC.EMB.apuinfo section. */ 1611 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0); 1612 bfd_set_section_flags (stdoutput, 1613 apuinfo_secp, 1614 SEC_HAS_CONTENTS | SEC_READONLY); 1615 1616 p = frag_more (4); 1617 md_number_to_chars (p, (valueT) 8, 4); 1618 1619 p = frag_more (4); 1620 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); 1621 1622 p = frag_more (4); 1623 md_number_to_chars (p, (valueT) 2, 4); 1624 1625 p = frag_more (8); 1626 strcpy (p, "APUinfo"); 1627 1628 for (i = 0; i < ppc_apuinfo_num; i++) 1629 { 1630 p = frag_more (4); 1631 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); 1632 } 1633 1634 frag_align (2, 0, 0); 1635 1636 /* We probably can't restore the current segment, for there likely 1637 isn't one yet... */ 1638 if (seg && subseg) 1639 subseg_set (seg, subseg); 1640 } 1641#endif 1642} 1643 1644/* Insert an operand value into an instruction. */ 1645 1646static unsigned long 1647ppc_insert_operand (unsigned long insn, 1648 const struct powerpc_operand *operand, 1649 offsetT val, 1650 ppc_cpu_t cpu, 1651 char *file, 1652 unsigned int line) 1653{ 1654 long min, max, right; 1655 1656 max = operand->bitm; 1657 right = max & -max; 1658 min = 0; 1659 1660 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 1661 { 1662 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0) 1663 max = (max >> 1) & -right; 1664 min = ~max & -right; 1665 } 1666 1667 if ((operand->flags & PPC_OPERAND_PLUS1) != 0) 1668 max++; 1669 1670 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 1671 { 1672 long tmp = min; 1673 min = -max; 1674 max = -tmp; 1675 } 1676 1677 if (min <= max) 1678 { 1679 /* Some people write constants with the sign extension done by 1680 hand but only up to 32 bits. This shouldn't really be valid, 1681 but, to permit this code to assemble on a 64-bit host, we 1682 sign extend the 32-bit value to 64 bits if so doing makes the 1683 value valid. */ 1684 if (val > max 1685 && (offsetT) (val - 0x80000000 - 0x80000000) >= min 1686 && (offsetT) (val - 0x80000000 - 0x80000000) <= max 1687 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) 1688 val = val - 0x80000000 - 0x80000000; 1689 1690 /* Similarly, people write expressions like ~(1<<15), and expect 1691 this to be OK for a 32-bit unsigned value. */ 1692 else if (val < min 1693 && (offsetT) (val + 0x80000000 + 0x80000000) >= min 1694 && (offsetT) (val + 0x80000000 + 0x80000000) <= max 1695 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) 1696 val = val + 0x80000000 + 0x80000000; 1697 1698 else if (val < min 1699 || val > max 1700 || (val & (right - 1)) != 0) 1701 as_bad_value_out_of_range (_("operand"), val, min, max, file, line); 1702 } 1703 1704 if (operand->insert) 1705 { 1706 const char *errmsg; 1707 1708 errmsg = NULL; 1709 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); 1710 if (errmsg != (const char *) NULL) 1711 as_bad_where (file, line, "%s", errmsg); 1712 } 1713 else 1714 insn |= ((long) val & operand->bitm) << operand->shift; 1715 1716 return insn; 1717} 1718 1719 1720#ifdef OBJ_ELF 1721/* Parse @got, etc. and return the desired relocation. */ 1722static bfd_reloc_code_real_type 1723ppc_elf_suffix (char **str_p, expressionS *exp_p) 1724{ 1725 struct map_bfd { 1726 char *string; 1727 unsigned int length : 8; 1728 unsigned int valid32 : 1; 1729 unsigned int valid64 : 1; 1730 unsigned int reloc; 1731 }; 1732 1733 char ident[20]; 1734 char *str = *str_p; 1735 char *str2; 1736 int ch; 1737 int len; 1738 const struct map_bfd *ptr; 1739 1740#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } 1741#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } 1742#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } 1743 1744 static const struct map_bfd mapping[] = { 1745 MAP ("l", BFD_RELOC_LO16), 1746 MAP ("h", BFD_RELOC_HI16), 1747 MAP ("ha", BFD_RELOC_HI16_S), 1748 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), 1749 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), 1750 MAP ("got", BFD_RELOC_16_GOTOFF), 1751 MAP ("got@l", BFD_RELOC_LO16_GOTOFF), 1752 MAP ("got@h", BFD_RELOC_HI16_GOTOFF), 1753 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), 1754 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), 1755 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), 1756 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), 1757 MAP ("copy", BFD_RELOC_PPC_COPY), 1758 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), 1759 MAP ("sectoff", BFD_RELOC_16_BASEREL), 1760 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), 1761 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), 1762 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), 1763 MAP ("tls", BFD_RELOC_PPC_TLS), 1764 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), 1765 MAP ("dtprel", BFD_RELOC_PPC_DTPREL), 1766 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), 1767 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), 1768 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), 1769 MAP ("tprel", BFD_RELOC_PPC_TPREL), 1770 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), 1771 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), 1772 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), 1773 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), 1774 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), 1775 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), 1776 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), 1777 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), 1778 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), 1779 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), 1780 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), 1781 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), 1782 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), 1783 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), 1784 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), 1785 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), 1786 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), 1787 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), 1788 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), 1789 MAP32 ("fixup", BFD_RELOC_CTOR), 1790 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), 1791 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), 1792 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), 1793 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), 1794 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), 1795 MAP32 ("sdarel", BFD_RELOC_GPREL16), 1796 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), 1797 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), 1798 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), 1799 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), 1800 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), 1801 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), 1802 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), 1803 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), 1804 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), 1805 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), 1806 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), 1807 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), 1808 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), 1809 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), 1810 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), 1811 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), 1812 MAP32 ("xgot", BFD_RELOC_PPC_TOC16), 1813 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), 1814 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), 1815 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), 1816 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), 1817 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), 1818 MAP64 ("toc", BFD_RELOC_PPC_TOC16), 1819 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), 1820 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), 1821 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), 1822 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), 1823 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), 1824 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), 1825 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), 1826 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), 1827 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), 1828 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), 1829 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), 1830 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED } 1831 }; 1832 1833 if (*str++ != '@') 1834 return BFD_RELOC_UNUSED; 1835 1836 for (ch = *str, str2 = ident; 1837 (str2 < ident + sizeof (ident) - 1 1838 && (ISALNUM (ch) || ch == '@')); 1839 ch = *++str) 1840 { 1841 *str2++ = TOLOWER (ch); 1842 } 1843 1844 *str2 = '\0'; 1845 len = str2 - ident; 1846 1847 ch = ident[0]; 1848 for (ptr = &mapping[0]; ptr->length > 0; ptr++) 1849 if (ch == ptr->string[0] 1850 && len == ptr->length 1851 && memcmp (ident, ptr->string, ptr->length) == 0 1852 && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) 1853 { 1854 int reloc = ptr->reloc; 1855 1856 if (!ppc_obj64 && exp_p->X_add_number != 0) 1857 { 1858 switch (reloc) 1859 { 1860 case BFD_RELOC_16_GOTOFF: 1861 case BFD_RELOC_LO16_GOTOFF: 1862 case BFD_RELOC_HI16_GOTOFF: 1863 case BFD_RELOC_HI16_S_GOTOFF: 1864 as_warn (_("identifier+constant@got means " 1865 "identifier@got+constant")); 1866 break; 1867 1868 case BFD_RELOC_PPC_GOT_TLSGD16: 1869 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 1870 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 1871 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 1872 case BFD_RELOC_PPC_GOT_TLSLD16: 1873 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 1874 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 1875 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 1876 case BFD_RELOC_PPC_GOT_DTPREL16: 1877 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 1878 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 1879 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 1880 case BFD_RELOC_PPC_GOT_TPREL16: 1881 case BFD_RELOC_PPC_GOT_TPREL16_LO: 1882 case BFD_RELOC_PPC_GOT_TPREL16_HI: 1883 case BFD_RELOC_PPC_GOT_TPREL16_HA: 1884 as_bad (_("symbol+offset not supported for got tls")); 1885 break; 1886 } 1887 } 1888 1889 /* Now check for identifier@suffix+constant. */ 1890 if (*str == '-' || *str == '+') 1891 { 1892 char *orig_line = input_line_pointer; 1893 expressionS new_exp; 1894 1895 input_line_pointer = str; 1896 expression (&new_exp); 1897 if (new_exp.X_op == O_constant) 1898 { 1899 exp_p->X_add_number += new_exp.X_add_number; 1900 str = input_line_pointer; 1901 } 1902 1903 if (&input_line_pointer != str_p) 1904 input_line_pointer = orig_line; 1905 } 1906 *str_p = str; 1907 1908 if (reloc == (int) BFD_RELOC_PPC64_TOC 1909 && exp_p->X_op == O_symbol 1910 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) 1911 { 1912 /* Change the symbol so that the dummy .TOC. symbol can be 1913 omitted from the object file. */ 1914 exp_p->X_add_symbol = &abs_symbol; 1915 } 1916 1917 return (bfd_reloc_code_real_type) reloc; 1918 } 1919 1920 return BFD_RELOC_UNUSED; 1921} 1922 1923/* Like normal .long/.short/.word, except support @got, etc. 1924 Clobbers input_line_pointer, checks end-of-line. */ 1925static void 1926ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */) 1927{ 1928 expressionS exp; 1929 bfd_reloc_code_real_type reloc; 1930 1931 if (is_it_end_of_statement ()) 1932 { 1933 demand_empty_rest_of_line (); 1934 return; 1935 } 1936 1937 do 1938 { 1939 expression (&exp); 1940 if (exp.X_op == O_symbol 1941 && *input_line_pointer == '@' 1942 && (reloc = ppc_elf_suffix (&input_line_pointer, 1943 &exp)) != BFD_RELOC_UNUSED) 1944 { 1945 reloc_howto_type *reloc_howto; 1946 int size; 1947 1948 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); 1949 size = bfd_get_reloc_size (reloc_howto); 1950 1951 if (size > nbytes) 1952 { 1953 as_bad (_("%s relocations do not fit in %d bytes\n"), 1954 reloc_howto->name, nbytes); 1955 } 1956 else 1957 { 1958 char *p; 1959 int offset; 1960 1961 p = frag_more (nbytes); 1962 memset (p, 0, nbytes); 1963 offset = 0; 1964 if (target_big_endian) 1965 offset = nbytes - size; 1966 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, 1967 &exp, 0, reloc); 1968 } 1969 } 1970 else 1971 emit_expr (&exp, (unsigned int) nbytes); 1972 } 1973 while (*input_line_pointer++ == ','); 1974 1975 /* Put terminator back into stream. */ 1976 input_line_pointer--; 1977 demand_empty_rest_of_line (); 1978} 1979 1980/* Solaris pseduo op to change to the .rodata section. */ 1981static void 1982ppc_elf_rdata (int xxx) 1983{ 1984 char *save_line = input_line_pointer; 1985 static char section[] = ".rodata\n"; 1986 1987 /* Just pretend this is .section .rodata */ 1988 input_line_pointer = section; 1989 obj_elf_section (xxx); 1990 1991 input_line_pointer = save_line; 1992} 1993 1994/* Pseudo op to make file scope bss items. */ 1995static void 1996ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) 1997{ 1998 char *name; 1999 char c; 2000 char *p; 2001 offsetT size; 2002 symbolS *symbolP; 2003 offsetT align; 2004 segT old_sec; 2005 int old_subsec; 2006 char *pfrag; 2007 int align2; 2008 2009 name = input_line_pointer; 2010 c = get_symbol_end (); 2011 2012 /* just after name is now '\0'. */ 2013 p = input_line_pointer; 2014 *p = c; 2015 SKIP_WHITESPACE (); 2016 if (*input_line_pointer != ',') 2017 { 2018 as_bad (_("Expected comma after symbol-name: rest of line ignored.")); 2019 ignore_rest_of_line (); 2020 return; 2021 } 2022 2023 input_line_pointer++; /* skip ',' */ 2024 if ((size = get_absolute_expression ()) < 0) 2025 { 2026 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); 2027 ignore_rest_of_line (); 2028 return; 2029 } 2030 2031 /* The third argument to .lcomm is the alignment. */ 2032 if (*input_line_pointer != ',') 2033 align = 8; 2034 else 2035 { 2036 ++input_line_pointer; 2037 align = get_absolute_expression (); 2038 if (align <= 0) 2039 { 2040 as_warn (_("ignoring bad alignment")); 2041 align = 8; 2042 } 2043 } 2044 2045 *p = 0; 2046 symbolP = symbol_find_or_make (name); 2047 *p = c; 2048 2049 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 2050 { 2051 as_bad (_("Ignoring attempt to re-define symbol `%s'."), 2052 S_GET_NAME (symbolP)); 2053 ignore_rest_of_line (); 2054 return; 2055 } 2056 2057 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) 2058 { 2059 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."), 2060 S_GET_NAME (symbolP), 2061 (long) S_GET_VALUE (symbolP), 2062 (long) size); 2063 2064 ignore_rest_of_line (); 2065 return; 2066 } 2067 2068 /* Allocate_bss. */ 2069 old_sec = now_seg; 2070 old_subsec = now_subseg; 2071 if (align) 2072 { 2073 /* Convert to a power of 2 alignment. */ 2074 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); 2075 if (align != 1) 2076 { 2077 as_bad (_("Common alignment not a power of 2")); 2078 ignore_rest_of_line (); 2079 return; 2080 } 2081 } 2082 else 2083 align2 = 0; 2084 2085 record_alignment (bss_section, align2); 2086 subseg_set (bss_section, 0); 2087 if (align2) 2088 frag_align (align2, 0, 0); 2089 if (S_GET_SEGMENT (symbolP) == bss_section) 2090 symbol_get_frag (symbolP)->fr_symbol = 0; 2091 symbol_set_frag (symbolP, frag_now); 2092 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, 2093 (char *) 0); 2094 *pfrag = 0; 2095 S_SET_SIZE (symbolP, size); 2096 S_SET_SEGMENT (symbolP, bss_section); 2097 subseg_set (old_sec, old_subsec); 2098 demand_empty_rest_of_line (); 2099} 2100 2101/* Validate any relocations emitted for -mrelocatable, possibly adding 2102 fixups for word relocations in writable segments, so we can adjust 2103 them at runtime. */ 2104static void 2105ppc_elf_validate_fix (fixS *fixp, segT seg) 2106{ 2107 if (fixp->fx_done || fixp->fx_pcrel) 2108 return; 2109 2110 switch (shlib) 2111 { 2112 case SHLIB_NONE: 2113 case SHLIB_PIC: 2114 return; 2115 2116 case SHLIB_MRELOCATABLE: 2117 if (fixp->fx_r_type <= BFD_RELOC_UNUSED 2118 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF 2119 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF 2120 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF 2121 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 2122 && fixp->fx_r_type != BFD_RELOC_16_BASEREL 2123 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL 2124 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL 2125 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL 2126 && (seg->flags & SEC_LOAD) != 0 2127 && strcmp (segment_name (seg), ".got2") != 0 2128 && strcmp (segment_name (seg), ".dtors") != 0 2129 && strcmp (segment_name (seg), ".ctors") != 0 2130 && strcmp (segment_name (seg), ".fixup") != 0 2131 && strcmp (segment_name (seg), ".gcc_except_table") != 0 2132 && strcmp (segment_name (seg), ".eh_frame") != 0 2133 && strcmp (segment_name (seg), ".ex_shared") != 0) 2134 { 2135 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 2136 || fixp->fx_r_type != BFD_RELOC_CTOR) 2137 { 2138 as_bad_where (fixp->fx_file, fixp->fx_line, 2139 _("Relocation cannot be done when using -mrelocatable")); 2140 } 2141 } 2142 return; 2143 } 2144} 2145 2146/* Prevent elf_frob_file_before_adjust removing a weak undefined 2147 function descriptor sym if the corresponding code sym is used. */ 2148 2149void 2150ppc_frob_file_before_adjust (void) 2151{ 2152 symbolS *symp; 2153 asection *toc; 2154 2155 if (!ppc_obj64) 2156 return; 2157 2158 for (symp = symbol_rootP; symp; symp = symbol_next (symp)) 2159 { 2160 const char *name; 2161 char *dotname; 2162 symbolS *dotsym; 2163 size_t len; 2164 2165 name = S_GET_NAME (symp); 2166 if (name[0] == '.') 2167 continue; 2168 2169 if (! S_IS_WEAK (symp) 2170 || S_IS_DEFINED (symp)) 2171 continue; 2172 2173 len = strlen (name) + 1; 2174 dotname = xmalloc (len + 1); 2175 dotname[0] = '.'; 2176 memcpy (dotname + 1, name, len); 2177 dotsym = symbol_find_noref (dotname, 1); 2178 free (dotname); 2179 if (dotsym != NULL && (symbol_used_p (dotsym) 2180 || symbol_used_in_reloc_p (dotsym))) 2181 symbol_mark_used (symp); 2182 2183 } 2184 2185 toc = bfd_get_section_by_name (stdoutput, ".toc"); 2186 if (toc != NULL 2187 && toc_reloc_types != has_large_toc_reloc 2188 && bfd_section_size (stdoutput, toc) > 0x10000) 2189 as_warn (_("TOC section size exceeds 64k")); 2190 2191 /* Don't emit .TOC. symbol. */ 2192 symp = symbol_find (".TOC."); 2193 if (symp != NULL) 2194 symbol_remove (symp, &symbol_rootP, &symbol_lastP); 2195} 2196#endif /* OBJ_ELF */ 2197 2198#ifdef TE_PE 2199 2200/* 2201 * Summary of parse_toc_entry. 2202 * 2203 * in: Input_line_pointer points to the '[' in one of: 2204 * 2205 * [toc] [tocv] [toc32] [toc64] 2206 * 2207 * Anything else is an error of one kind or another. 2208 * 2209 * out: 2210 * return value: success or failure 2211 * toc_kind: kind of toc reference 2212 * input_line_pointer: 2213 * success: first char after the ']' 2214 * failure: unchanged 2215 * 2216 * settings: 2217 * 2218 * [toc] - rv == success, toc_kind = default_toc 2219 * [tocv] - rv == success, toc_kind = data_in_toc 2220 * [toc32] - rv == success, toc_kind = must_be_32 2221 * [toc64] - rv == success, toc_kind = must_be_64 2222 * 2223 */ 2224 2225enum toc_size_qualifier 2226{ 2227 default_toc, /* The toc cell constructed should be the system default size */ 2228 data_in_toc, /* This is a direct reference to a toc cell */ 2229 must_be_32, /* The toc cell constructed must be 32 bits wide */ 2230 must_be_64 /* The toc cell constructed must be 64 bits wide */ 2231}; 2232 2233static int 2234parse_toc_entry (enum toc_size_qualifier *toc_kind) 2235{ 2236 char *start; 2237 char *toc_spec; 2238 char c; 2239 enum toc_size_qualifier t; 2240 2241 /* Save the input_line_pointer. */ 2242 start = input_line_pointer; 2243 2244 /* Skip over the '[' , and whitespace. */ 2245 ++input_line_pointer; 2246 SKIP_WHITESPACE (); 2247 2248 /* Find the spelling of the operand. */ 2249 toc_spec = input_line_pointer; 2250 c = get_symbol_end (); 2251 2252 if (strcmp (toc_spec, "toc") == 0) 2253 { 2254 t = default_toc; 2255 } 2256 else if (strcmp (toc_spec, "tocv") == 0) 2257 { 2258 t = data_in_toc; 2259 } 2260 else if (strcmp (toc_spec, "toc32") == 0) 2261 { 2262 t = must_be_32; 2263 } 2264 else if (strcmp (toc_spec, "toc64") == 0) 2265 { 2266 t = must_be_64; 2267 } 2268 else 2269 { 2270 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); 2271 *input_line_pointer = c; 2272 input_line_pointer = start; 2273 return 0; 2274 } 2275 2276 /* Now find the ']'. */ 2277 *input_line_pointer = c; 2278 2279 SKIP_WHITESPACE (); /* leading whitespace could be there. */ 2280 c = *input_line_pointer++; /* input_line_pointer->past char in c. */ 2281 2282 if (c != ']') 2283 { 2284 as_bad (_("syntax error: expected `]', found `%c'"), c); 2285 input_line_pointer = start; 2286 return 0; 2287 } 2288 2289 *toc_kind = t; 2290 return 1; 2291} 2292#endif 2293 2294 2295#ifdef OBJ_ELF 2296#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) 2297static void 2298ppc_apuinfo_section_add (unsigned int apu, unsigned int version) 2299{ 2300 unsigned int i; 2301 2302 /* Check we don't already exist. */ 2303 for (i = 0; i < ppc_apuinfo_num; i++) 2304 if (ppc_apuinfo_list[i] == APUID (apu, version)) 2305 return; 2306 2307 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) 2308 { 2309 if (ppc_apuinfo_num_alloc == 0) 2310 { 2311 ppc_apuinfo_num_alloc = 4; 2312 ppc_apuinfo_list = (unsigned long *) 2313 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc); 2314 } 2315 else 2316 { 2317 ppc_apuinfo_num_alloc += 4; 2318 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list, 2319 sizeof (unsigned long) * ppc_apuinfo_num_alloc); 2320 } 2321 } 2322 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); 2323} 2324#undef APUID 2325#endif 2326 2327 2328/* We need to keep a list of fixups. We can't simply generate them as 2329 we go, because that would require us to first create the frag, and 2330 that would screw up references to ``.''. */ 2331 2332struct ppc_fixup 2333{ 2334 expressionS exp; 2335 int opindex; 2336 bfd_reloc_code_real_type reloc; 2337}; 2338 2339#define MAX_INSN_FIXUPS (5) 2340 2341/* This routine is called for each instruction to be assembled. */ 2342 2343void 2344md_assemble (char *str) 2345{ 2346 char *s; 2347 const struct powerpc_opcode *opcode; 2348 unsigned long insn; 2349 const unsigned char *opindex_ptr; 2350 int skip_optional; 2351 int need_paren; 2352 int next_opindex; 2353 struct ppc_fixup fixups[MAX_INSN_FIXUPS]; 2354 int fc; 2355 char *f; 2356 int addr_mod; 2357 int i; 2358#ifdef OBJ_ELF 2359 bfd_reloc_code_real_type reloc; 2360#endif 2361 2362 /* Get the opcode. */ 2363 for (s = str; *s != '\0' && ! ISSPACE (*s); s++) 2364 ; 2365 if (*s != '\0') 2366 *s++ = '\0'; 2367 2368 /* Look up the opcode in the hash table. */ 2369 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); 2370 if (opcode == (const struct powerpc_opcode *) NULL) 2371 { 2372 const struct powerpc_macro *macro; 2373 2374 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); 2375 if (macro == (const struct powerpc_macro *) NULL) 2376 as_bad (_("Unrecognized opcode: `%s'"), str); 2377 else 2378 ppc_macro (s, macro); 2379 2380 return; 2381 } 2382 2383 insn = opcode->opcode; 2384 2385 str = s; 2386 while (ISSPACE (*str)) 2387 ++str; 2388 2389 /* PowerPC operands are just expressions. The only real issue is 2390 that a few operand types are optional. All cases which might use 2391 an optional operand separate the operands only with commas (in some 2392 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never 2393 have optional operands). Most instructions with optional operands 2394 have only one. Those that have more than one optional operand can 2395 take either all their operands or none. So, before we start seriously 2396 parsing the operands, we check to see if we have optional operands, 2397 and if we do, we count the number of commas to see which operands 2398 have been omitted. */ 2399 skip_optional = 0; 2400 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 2401 { 2402 const struct powerpc_operand *operand; 2403 2404 operand = &powerpc_operands[*opindex_ptr]; 2405 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) 2406 { 2407 unsigned int opcount; 2408 unsigned int num_operands_expected; 2409 2410 /* There is an optional operand. Count the number of 2411 commas in the input line. */ 2412 if (*str == '\0') 2413 opcount = 0; 2414 else 2415 { 2416 opcount = 1; 2417 s = str; 2418 while ((s = strchr (s, ',')) != (char *) NULL) 2419 { 2420 ++opcount; 2421 ++s; 2422 } 2423 } 2424 2425 /* Compute the number of expected operands. 2426 Do not count fake operands. */ 2427 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) 2428 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) 2429 ++ num_operands_expected; 2430 2431 /* If there are fewer operands in the line then are called 2432 for by the instruction, we want to skip the optional 2433 operands. */ 2434 if (opcount < num_operands_expected) 2435 skip_optional = 1; 2436 2437 break; 2438 } 2439 } 2440 2441 /* Gather the operands. */ 2442 need_paren = 0; 2443 next_opindex = 0; 2444 fc = 0; 2445 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 2446 { 2447 const struct powerpc_operand *operand; 2448 const char *errmsg; 2449 char *hold; 2450 expressionS ex; 2451 char endc; 2452 2453 if (next_opindex == 0) 2454 operand = &powerpc_operands[*opindex_ptr]; 2455 else 2456 { 2457 operand = &powerpc_operands[next_opindex]; 2458 next_opindex = 0; 2459 } 2460 errmsg = NULL; 2461 2462 /* If this is a fake operand, then we do not expect anything 2463 from the input. */ 2464 if ((operand->flags & PPC_OPERAND_FAKE) != 0) 2465 { 2466 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); 2467 if (errmsg != (const char *) NULL) 2468 as_bad ("%s", errmsg); 2469 continue; 2470 } 2471 2472 /* If this is an optional operand, and we are skipping it, just 2473 insert a zero. */ 2474 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 2475 && skip_optional) 2476 { 2477 if (operand->insert) 2478 { 2479 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); 2480 if (errmsg != (const char *) NULL) 2481 as_bad ("%s", errmsg); 2482 } 2483 if ((operand->flags & PPC_OPERAND_NEXT) != 0) 2484 next_opindex = *opindex_ptr + 1; 2485 continue; 2486 } 2487 2488 /* Gather the operand. */ 2489 hold = input_line_pointer; 2490 input_line_pointer = str; 2491 2492#ifdef TE_PE 2493 if (*input_line_pointer == '[') 2494 { 2495 /* We are expecting something like the second argument here: 2496 * 2497 * lwz r4,[toc].GS.0.static_int(rtoc) 2498 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ 2499 * The argument following the `]' must be a symbol name, and the 2500 * register must be the toc register: 'rtoc' or '2' 2501 * 2502 * The effect is to 0 as the displacement field 2503 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or 2504 * the appropriate variation) reloc against it based on the symbol. 2505 * The linker will build the toc, and insert the resolved toc offset. 2506 * 2507 * Note: 2508 * o The size of the toc entry is currently assumed to be 2509 * 32 bits. This should not be assumed to be a hard coded 2510 * number. 2511 * o In an effort to cope with a change from 32 to 64 bits, 2512 * there are also toc entries that are specified to be 2513 * either 32 or 64 bits: 2514 * lwz r4,[toc32].GS.0.static_int(rtoc) 2515 * lwz r4,[toc64].GS.0.static_int(rtoc) 2516 * These demand toc entries of the specified size, and the 2517 * instruction probably requires it. 2518 */ 2519 2520 int valid_toc; 2521 enum toc_size_qualifier toc_kind; 2522 bfd_reloc_code_real_type toc_reloc; 2523 2524 /* Go parse off the [tocXX] part. */ 2525 valid_toc = parse_toc_entry (&toc_kind); 2526 2527 if (!valid_toc) 2528 { 2529 /* Note: message has already been issued. 2530 FIXME: what sort of recovery should we do? 2531 demand_rest_of_line (); return; ? */ 2532 } 2533 2534 /* Now get the symbol following the ']'. */ 2535 expression (&ex); 2536 2537 switch (toc_kind) 2538 { 2539 case default_toc: 2540 /* In this case, we may not have seen the symbol yet, 2541 since it is allowed to appear on a .extern or .globl 2542 or just be a label in the .data section. */ 2543 toc_reloc = BFD_RELOC_PPC_TOC16; 2544 break; 2545 case data_in_toc: 2546 /* 1. The symbol must be defined and either in the toc 2547 section, or a global. 2548 2. The reloc generated must have the TOCDEFN flag set 2549 in upper bit mess of the reloc type. 2550 FIXME: It's a little confusing what the tocv 2551 qualifier can be used for. At the very least, I've 2552 seen three uses, only one of which I'm sure I can 2553 explain. */ 2554 if (ex.X_op == O_symbol) 2555 { 2556 gas_assert (ex.X_add_symbol != NULL); 2557 if (symbol_get_bfdsym (ex.X_add_symbol)->section 2558 != tocdata_section) 2559 { 2560 as_bad (_("[tocv] symbol is not a toc symbol")); 2561 } 2562 } 2563 2564 toc_reloc = BFD_RELOC_PPC_TOC16; 2565 break; 2566 case must_be_32: 2567 /* FIXME: these next two specifically specify 32/64 bit 2568 toc entries. We don't support them today. Is this 2569 the right way to say that? */ 2570 toc_reloc = BFD_RELOC_UNUSED; 2571 as_bad (_("Unimplemented toc32 expression modifier")); 2572 break; 2573 case must_be_64: 2574 /* FIXME: see above. */ 2575 toc_reloc = BFD_RELOC_UNUSED; 2576 as_bad (_("Unimplemented toc64 expression modifier")); 2577 break; 2578 default: 2579 fprintf (stderr, 2580 _("Unexpected return value [%d] from parse_toc_entry!\n"), 2581 toc_kind); 2582 abort (); 2583 break; 2584 } 2585 2586 /* We need to generate a fixup for this expression. */ 2587 if (fc >= MAX_INSN_FIXUPS) 2588 as_fatal (_("too many fixups")); 2589 2590 fixups[fc].reloc = toc_reloc; 2591 fixups[fc].exp = ex; 2592 fixups[fc].opindex = *opindex_ptr; 2593 ++fc; 2594 2595 /* Ok. We've set up the fixup for the instruction. Now make it 2596 look like the constant 0 was found here. */ 2597 ex.X_unsigned = 1; 2598 ex.X_op = O_constant; 2599 ex.X_add_number = 0; 2600 ex.X_add_symbol = NULL; 2601 ex.X_op_symbol = NULL; 2602 } 2603 2604 else 2605#endif /* TE_PE */ 2606 { 2607 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0) 2608 || !register_name (&ex)) 2609 { 2610 char save_lex = lex_type['%']; 2611 2612 if ((operand->flags & PPC_OPERAND_CR) != 0) 2613 { 2614 cr_operand = TRUE; 2615 lex_type['%'] |= LEX_BEGIN_NAME; 2616 } 2617 expression (&ex); 2618 cr_operand = FALSE; 2619 lex_type['%'] = save_lex; 2620 } 2621 } 2622 2623 str = input_line_pointer; 2624 input_line_pointer = hold; 2625 2626 if (ex.X_op == O_illegal) 2627 as_bad (_("illegal operand")); 2628 else if (ex.X_op == O_absent) 2629 as_bad (_("missing operand")); 2630 else if (ex.X_op == O_register) 2631 { 2632 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 2633 ppc_cpu, (char *) NULL, 0); 2634 } 2635 else if (ex.X_op == O_constant) 2636 { 2637#ifdef OBJ_ELF 2638 /* Allow @HA, @L, @H on constants. */ 2639 char *orig_str = str; 2640 2641 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) 2642 switch (reloc) 2643 { 2644 default: 2645 str = orig_str; 2646 break; 2647 2648 case BFD_RELOC_LO16: 2649 /* X_unsigned is the default, so if the user has done 2650 something which cleared it, we always produce a 2651 signed value. */ 2652 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) 2653 ex.X_add_number &= 0xffff; 2654 else 2655 ex.X_add_number = SEX16 (ex.X_add_number); 2656 break; 2657 2658 case BFD_RELOC_HI16: 2659 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) 2660 ex.X_add_number = PPC_HI (ex.X_add_number); 2661 else 2662 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number)); 2663 break; 2664 2665 case BFD_RELOC_HI16_S: 2666 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) 2667 ex.X_add_number = PPC_HA (ex.X_add_number); 2668 else 2669 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number)); 2670 break; 2671 2672 case BFD_RELOC_PPC64_HIGHER: 2673 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) 2674 ex.X_add_number = PPC_HIGHER (ex.X_add_number); 2675 else 2676 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number)); 2677 break; 2678 2679 case BFD_RELOC_PPC64_HIGHER_S: 2680 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) 2681 ex.X_add_number = PPC_HIGHERA (ex.X_add_number); 2682 else 2683 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number)); 2684 break; 2685 2686 case BFD_RELOC_PPC64_HIGHEST: 2687 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) 2688 ex.X_add_number = PPC_HIGHEST (ex.X_add_number); 2689 else 2690 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number)); 2691 break; 2692 2693 case BFD_RELOC_PPC64_HIGHEST_S: 2694 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) 2695 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); 2696 else 2697 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number)); 2698 break; 2699 } 2700#endif /* OBJ_ELF */ 2701 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 2702 ppc_cpu, (char *) NULL, 0); 2703 } 2704#ifdef OBJ_ELF 2705 else 2706 { 2707 if (ex.X_op == O_symbol && str[0] == '(') 2708 { 2709 const char *sym_name = S_GET_NAME (ex.X_add_symbol); 2710 if (sym_name[0] == '.') 2711 ++sym_name; 2712 2713 if (strcasecmp (sym_name, "__tls_get_addr") == 0) 2714 { 2715 expressionS tls_exp; 2716 2717 hold = input_line_pointer; 2718 input_line_pointer = str + 1; 2719 expression (&tls_exp); 2720 if (tls_exp.X_op == O_symbol) 2721 { 2722 reloc = BFD_RELOC_UNUSED; 2723 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) 2724 { 2725 reloc = BFD_RELOC_PPC_TLSGD; 2726 input_line_pointer += 7; 2727 } 2728 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) 2729 { 2730 reloc = BFD_RELOC_PPC_TLSLD; 2731 input_line_pointer += 7; 2732 } 2733 if (reloc != BFD_RELOC_UNUSED) 2734 { 2735 SKIP_WHITESPACE (); 2736 str = input_line_pointer; 2737 2738 if (fc >= MAX_INSN_FIXUPS) 2739 as_fatal (_("too many fixups")); 2740 fixups[fc].exp = tls_exp; 2741 fixups[fc].opindex = *opindex_ptr; 2742 fixups[fc].reloc = reloc; 2743 ++fc; 2744 } 2745 } 2746 input_line_pointer = hold; 2747 } 2748 } 2749 2750 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) 2751 { 2752 /* Some TLS tweaks. */ 2753 switch (reloc) 2754 { 2755 default: 2756 break; 2757 2758 case BFD_RELOC_PPC_TLS: 2759 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) 2760 as_bad (_("@tls may not be used with \"%s\" operands"), 2761 opcode->name); 2762 else if (operand->shift != 11) 2763 as_bad (_("@tls may only be used in last operand")); 2764 else 2765 insn = ppc_insert_operand (insn, operand, 2766 ppc_obj64 ? 13 : 2, 2767 ppc_cpu, (char *) NULL, 0); 2768 break; 2769 2770 /* We'll only use the 32 (or 64) bit form of these relocations 2771 in constants. Instructions get the 16 bit form. */ 2772 case BFD_RELOC_PPC_DTPREL: 2773 reloc = BFD_RELOC_PPC_DTPREL16; 2774 break; 2775 case BFD_RELOC_PPC_TPREL: 2776 reloc = BFD_RELOC_PPC_TPREL16; 2777 break; 2778 } 2779 2780 /* For the absolute forms of branches, convert the PC 2781 relative form back into the absolute. */ 2782 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) 2783 { 2784 switch (reloc) 2785 { 2786 case BFD_RELOC_PPC_B26: 2787 reloc = BFD_RELOC_PPC_BA26; 2788 break; 2789 case BFD_RELOC_PPC_B16: 2790 reloc = BFD_RELOC_PPC_BA16; 2791 break; 2792 case BFD_RELOC_PPC_B16_BRTAKEN: 2793 reloc = BFD_RELOC_PPC_BA16_BRTAKEN; 2794 break; 2795 case BFD_RELOC_PPC_B16_BRNTAKEN: 2796 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; 2797 break; 2798 default: 2799 break; 2800 } 2801 } 2802 2803 switch (reloc) 2804 { 2805 case BFD_RELOC_PPC_TOC16: 2806 toc_reloc_types |= has_small_toc_reloc; 2807 break; 2808 case BFD_RELOC_PPC64_TOC16_LO: 2809 case BFD_RELOC_PPC64_TOC16_HI: 2810 case BFD_RELOC_PPC64_TOC16_HA: 2811 toc_reloc_types |= has_large_toc_reloc; 2812 break; 2813 default: 2814 break; 2815 } 2816 2817 if (ppc_obj64 2818 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) 2819 { 2820 switch (reloc) 2821 { 2822 case BFD_RELOC_16: 2823 reloc = BFD_RELOC_PPC64_ADDR16_DS; 2824 break; 2825 case BFD_RELOC_LO16: 2826 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; 2827 break; 2828 case BFD_RELOC_16_GOTOFF: 2829 reloc = BFD_RELOC_PPC64_GOT16_DS; 2830 break; 2831 case BFD_RELOC_LO16_GOTOFF: 2832 reloc = BFD_RELOC_PPC64_GOT16_LO_DS; 2833 break; 2834 case BFD_RELOC_LO16_PLTOFF: 2835 reloc = BFD_RELOC_PPC64_PLT16_LO_DS; 2836 break; 2837 case BFD_RELOC_16_BASEREL: 2838 reloc = BFD_RELOC_PPC64_SECTOFF_DS; 2839 break; 2840 case BFD_RELOC_LO16_BASEREL: 2841 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; 2842 break; 2843 case BFD_RELOC_PPC_TOC16: 2844 reloc = BFD_RELOC_PPC64_TOC16_DS; 2845 break; 2846 case BFD_RELOC_PPC64_TOC16_LO: 2847 reloc = BFD_RELOC_PPC64_TOC16_LO_DS; 2848 break; 2849 case BFD_RELOC_PPC64_PLTGOT16: 2850 reloc = BFD_RELOC_PPC64_PLTGOT16_DS; 2851 break; 2852 case BFD_RELOC_PPC64_PLTGOT16_LO: 2853 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; 2854 break; 2855 case BFD_RELOC_PPC_DTPREL16: 2856 reloc = BFD_RELOC_PPC64_DTPREL16_DS; 2857 break; 2858 case BFD_RELOC_PPC_DTPREL16_LO: 2859 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; 2860 break; 2861 case BFD_RELOC_PPC_TPREL16: 2862 reloc = BFD_RELOC_PPC64_TPREL16_DS; 2863 break; 2864 case BFD_RELOC_PPC_TPREL16_LO: 2865 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; 2866 break; 2867 case BFD_RELOC_PPC_GOT_DTPREL16: 2868 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 2869 case BFD_RELOC_PPC_GOT_TPREL16: 2870 case BFD_RELOC_PPC_GOT_TPREL16_LO: 2871 break; 2872 default: 2873 as_bad (_("unsupported relocation for DS offset field")); 2874 break; 2875 } 2876 } 2877 } 2878 2879 /* We need to generate a fixup for this expression. */ 2880 if (fc >= MAX_INSN_FIXUPS) 2881 as_fatal (_("too many fixups")); 2882 fixups[fc].exp = ex; 2883 fixups[fc].opindex = *opindex_ptr; 2884 fixups[fc].reloc = reloc; 2885 ++fc; 2886 } 2887#else /* OBJ_ELF */ 2888 else 2889 { 2890 /* We need to generate a fixup for this expression. */ 2891 if (fc >= MAX_INSN_FIXUPS) 2892 as_fatal (_("too many fixups")); 2893 fixups[fc].exp = ex; 2894 fixups[fc].opindex = *opindex_ptr; 2895 fixups[fc].reloc = BFD_RELOC_UNUSED; 2896 ++fc; 2897 } 2898#endif /* OBJ_ELF */ 2899 2900 if (need_paren) 2901 { 2902 endc = ')'; 2903 need_paren = 0; 2904 /* If expecting more operands, then we want to see "),". */ 2905 if (*str == endc && opindex_ptr[1] != 0) 2906 { 2907 do 2908 ++str; 2909 while (ISSPACE (*str)); 2910 endc = ','; 2911 } 2912 } 2913 else if ((operand->flags & PPC_OPERAND_PARENS) != 0) 2914 { 2915 endc = '('; 2916 need_paren = 1; 2917 } 2918 else 2919 endc = ','; 2920 2921 /* The call to expression should have advanced str past any 2922 whitespace. */ 2923 if (*str != endc 2924 && (endc != ',' || *str != '\0')) 2925 { 2926 if (*str == '\0') 2927 as_bad (_("syntax error; end of line, expected `%c'"), endc); 2928 else 2929 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); 2930 break; 2931 } 2932 2933 if (*str != '\0') 2934 ++str; 2935 } 2936 2937 while (ISSPACE (*str)) 2938 ++str; 2939 2940 if (*str != '\0') 2941 as_bad (_("junk at end of line: `%s'"), str); 2942 2943#ifdef OBJ_ELF 2944 /* Do we need/want a APUinfo section? */ 2945 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0) 2946 { 2947 /* These are all version "1". */ 2948 if (opcode->flags & PPC_OPCODE_SPE) 2949 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); 2950 if (opcode->flags & PPC_OPCODE_ISEL) 2951 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); 2952 if (opcode->flags & PPC_OPCODE_EFS) 2953 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); 2954 if (opcode->flags & PPC_OPCODE_BRLOCK) 2955 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); 2956 if (opcode->flags & PPC_OPCODE_PMR) 2957 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); 2958 if (opcode->flags & PPC_OPCODE_CACHELCK) 2959 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); 2960 if (opcode->flags & PPC_OPCODE_RFMCI) 2961 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); 2962 } 2963#endif 2964 2965 /* Write out the instruction. */ 2966 f = frag_more (4); 2967 addr_mod = frag_now_fix () & 3; 2968 if (frag_now->has_code && frag_now->insn_addr != addr_mod) 2969 as_bad (_("instruction address is not a multiple of 4")); 2970 frag_now->insn_addr = addr_mod; 2971 frag_now->has_code = 1; 2972 md_number_to_chars (f, insn, 4); 2973 2974#ifdef OBJ_ELF 2975 dwarf2_emit_insn (4); 2976#endif 2977 2978 /* Create any fixups. At this point we do not use a 2979 bfd_reloc_code_real_type, but instead just use the 2980 BFD_RELOC_UNUSED plus the operand index. This lets us easily 2981 handle fixups for any operand type, although that is admittedly 2982 not a very exciting feature. We pick a BFD reloc type in 2983 md_apply_fix. */ 2984 for (i = 0; i < fc; i++) 2985 { 2986 if (fixups[i].reloc != BFD_RELOC_UNUSED) 2987 { 2988 reloc_howto_type *reloc_howto; 2989 int size; 2990 int offset; 2991 fixS *fixP; 2992 2993 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); 2994 if (!reloc_howto) 2995 abort (); 2996 2997 size = bfd_get_reloc_size (reloc_howto); 2998 offset = target_big_endian ? (4 - size) : 0; 2999 3000 if (size < 1 || size > 4) 3001 abort (); 3002 3003 fixP = fix_new_exp (frag_now, 3004 f - frag_now->fr_literal + offset, 3005 size, 3006 &fixups[i].exp, 3007 reloc_howto->pc_relative, 3008 fixups[i].reloc); 3009 3010 /* Turn off complaints that the addend is too large for things like 3011 foo+100000@ha. */ 3012 switch (fixups[i].reloc) 3013 { 3014 case BFD_RELOC_16_GOTOFF: 3015 case BFD_RELOC_PPC_TOC16: 3016 case BFD_RELOC_LO16: 3017 case BFD_RELOC_HI16: 3018 case BFD_RELOC_HI16_S: 3019#ifdef OBJ_ELF 3020 case BFD_RELOC_PPC64_HIGHER: 3021 case BFD_RELOC_PPC64_HIGHER_S: 3022 case BFD_RELOC_PPC64_HIGHEST: 3023 case BFD_RELOC_PPC64_HIGHEST_S: 3024#endif 3025 fixP->fx_no_overflow = 1; 3026 break; 3027 default: 3028 break; 3029 } 3030 } 3031 else 3032 { 3033 const struct powerpc_operand *operand; 3034 3035 operand = &powerpc_operands[fixups[i].opindex]; 3036 fix_new_exp (frag_now, 3037 f - frag_now->fr_literal, 3038 4, 3039 &fixups[i].exp, 3040 (operand->flags & PPC_OPERAND_RELATIVE) != 0, 3041 ((bfd_reloc_code_real_type) 3042 (fixups[i].opindex + (int) BFD_RELOC_UNUSED))); 3043 } 3044 } 3045} 3046 3047/* Handle a macro. Gather all the operands, transform them as 3048 described by the macro, and call md_assemble recursively. All the 3049 operands are separated by commas; we don't accept parentheses 3050 around operands here. */ 3051 3052static void 3053ppc_macro (char *str, const struct powerpc_macro *macro) 3054{ 3055 char *operands[10]; 3056 unsigned int count; 3057 char *s; 3058 unsigned int len; 3059 const char *format; 3060 unsigned int arg; 3061 char *send; 3062 char *complete; 3063 3064 /* Gather the users operands into the operands array. */ 3065 count = 0; 3066 s = str; 3067 while (1) 3068 { 3069 if (count >= sizeof operands / sizeof operands[0]) 3070 break; 3071 operands[count++] = s; 3072 s = strchr (s, ','); 3073 if (s == (char *) NULL) 3074 break; 3075 *s++ = '\0'; 3076 } 3077 3078 if (count != macro->operands) 3079 { 3080 as_bad (_("wrong number of operands")); 3081 return; 3082 } 3083 3084 /* Work out how large the string must be (the size is unbounded 3085 because it includes user input). */ 3086 len = 0; 3087 format = macro->format; 3088 while (*format != '\0') 3089 { 3090 if (*format != '%') 3091 { 3092 ++len; 3093 ++format; 3094 } 3095 else 3096 { 3097 arg = strtol (format + 1, &send, 10); 3098 know (send != format && arg < count); 3099 len += strlen (operands[arg]); 3100 format = send; 3101 } 3102 } 3103 3104 /* Put the string together. */ 3105 complete = s = (char *) alloca (len + 1); 3106 format = macro->format; 3107 while (*format != '\0') 3108 { 3109 if (*format != '%') 3110 *s++ = *format++; 3111 else 3112 { 3113 arg = strtol (format + 1, &send, 10); 3114 strcpy (s, operands[arg]); 3115 s += strlen (s); 3116 format = send; 3117 } 3118 } 3119 *s = '\0'; 3120 3121 /* Assemble the constructed instruction. */ 3122 md_assemble (complete); 3123} 3124 3125#ifdef OBJ_ELF 3126/* For ELF, add support for SHT_ORDERED. */ 3127 3128int 3129ppc_section_type (char *str, size_t len) 3130{ 3131 if (len == 7 && strncmp (str, "ordered", 7) == 0) 3132 return SHT_ORDERED; 3133 3134 return -1; 3135} 3136 3137int 3138ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) 3139{ 3140 if (type == SHT_ORDERED) 3141 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; 3142 3143 return flags; 3144} 3145#endif /* OBJ_ELF */ 3146 3147 3148/* Pseudo-op handling. */ 3149 3150/* The .byte pseudo-op. This is similar to the normal .byte 3151 pseudo-op, but it can also take a single ASCII string. */ 3152 3153static void 3154ppc_byte (int ignore ATTRIBUTE_UNUSED) 3155{ 3156 if (*input_line_pointer != '\"') 3157 { 3158 cons (1); 3159 return; 3160 } 3161 3162 /* Gather characters. A real double quote is doubled. Unusual 3163 characters are not permitted. */ 3164 ++input_line_pointer; 3165 while (1) 3166 { 3167 char c; 3168 3169 c = *input_line_pointer++; 3170 3171 if (c == '\"') 3172 { 3173 if (*input_line_pointer != '\"') 3174 break; 3175 ++input_line_pointer; 3176 } 3177 3178 FRAG_APPEND_1_CHAR (c); 3179 } 3180 3181 demand_empty_rest_of_line (); 3182} 3183 3184#ifdef OBJ_XCOFF 3185 3186/* XCOFF specific pseudo-op handling. */ 3187 3188/* This is set if we are creating a .stabx symbol, since we don't want 3189 to handle symbol suffixes for such symbols. */ 3190static bfd_boolean ppc_stab_symbol; 3191 3192/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common 3193 symbols in the .bss segment as though they were local common 3194 symbols, and uses a different smclas. The native Aix 4.3.3 assembler 3195 aligns .comm and .lcomm to 4 bytes. */ 3196 3197static void 3198ppc_comm (int lcomm) 3199{ 3200 asection *current_seg = now_seg; 3201 subsegT current_subseg = now_subseg; 3202 char *name; 3203 char endc; 3204 char *end_name; 3205 offsetT size; 3206 offsetT align; 3207 symbolS *lcomm_sym = NULL; 3208 symbolS *sym; 3209 char *pfrag; 3210 3211 name = input_line_pointer; 3212 endc = get_symbol_end (); 3213 end_name = input_line_pointer; 3214 *end_name = endc; 3215 3216 if (*input_line_pointer != ',') 3217 { 3218 as_bad (_("missing size")); 3219 ignore_rest_of_line (); 3220 return; 3221 } 3222 ++input_line_pointer; 3223 3224 size = get_absolute_expression (); 3225 if (size < 0) 3226 { 3227 as_bad (_("negative size")); 3228 ignore_rest_of_line (); 3229 return; 3230 } 3231 3232 if (! lcomm) 3233 { 3234 /* The third argument to .comm is the alignment. */ 3235 if (*input_line_pointer != ',') 3236 align = 2; 3237 else 3238 { 3239 ++input_line_pointer; 3240 align = get_absolute_expression (); 3241 if (align <= 0) 3242 { 3243 as_warn (_("ignoring bad alignment")); 3244 align = 2; 3245 } 3246 } 3247 } 3248 else 3249 { 3250 char *lcomm_name; 3251 char lcomm_endc; 3252 3253 if (size <= 4) 3254 align = 2; 3255 else 3256 align = 3; 3257 3258 /* The third argument to .lcomm appears to be the real local 3259 common symbol to create. References to the symbol named in 3260 the first argument are turned into references to the third 3261 argument. */ 3262 if (*input_line_pointer != ',') 3263 { 3264 as_bad (_("missing real symbol name")); 3265 ignore_rest_of_line (); 3266 return; 3267 } 3268 ++input_line_pointer; 3269 3270 lcomm_name = input_line_pointer; 3271 lcomm_endc = get_symbol_end (); 3272 3273 lcomm_sym = symbol_find_or_make (lcomm_name); 3274 3275 *input_line_pointer = lcomm_endc; 3276 } 3277 3278 *end_name = '\0'; 3279 sym = symbol_find_or_make (name); 3280 *end_name = endc; 3281 3282 if (S_IS_DEFINED (sym) 3283 || S_GET_VALUE (sym) != 0) 3284 { 3285 as_bad (_("attempt to redefine symbol")); 3286 ignore_rest_of_line (); 3287 return; 3288 } 3289 3290 record_alignment (bss_section, align); 3291 3292 if (! lcomm 3293 || ! S_IS_DEFINED (lcomm_sym)) 3294 { 3295 symbolS *def_sym; 3296 offsetT def_size; 3297 3298 if (! lcomm) 3299 { 3300 def_sym = sym; 3301 def_size = size; 3302 S_SET_EXTERNAL (sym); 3303 } 3304 else 3305 { 3306 symbol_get_tc (lcomm_sym)->output = 1; 3307 def_sym = lcomm_sym; 3308 def_size = 0; 3309 } 3310 3311 subseg_set (bss_section, 1); 3312 frag_align (align, 0, 0); 3313 3314 symbol_set_frag (def_sym, frag_now); 3315 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, 3316 def_size, (char *) NULL); 3317 *pfrag = 0; 3318 S_SET_SEGMENT (def_sym, bss_section); 3319 symbol_get_tc (def_sym)->align = align; 3320 } 3321 else if (lcomm) 3322 { 3323 /* Align the size of lcomm_sym. */ 3324 symbol_get_frag (lcomm_sym)->fr_offset = 3325 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) 3326 &~ ((1 << align) - 1)); 3327 if (align > symbol_get_tc (lcomm_sym)->align) 3328 symbol_get_tc (lcomm_sym)->align = align; 3329 } 3330 3331 if (lcomm) 3332 { 3333 /* Make sym an offset from lcomm_sym. */ 3334 S_SET_SEGMENT (sym, bss_section); 3335 symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); 3336 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); 3337 symbol_get_frag (lcomm_sym)->fr_offset += size; 3338 } 3339 3340 subseg_set (current_seg, current_subseg); 3341 3342 demand_empty_rest_of_line (); 3343} 3344 3345/* The .csect pseudo-op. This switches us into a different 3346 subsegment. The first argument is a symbol whose value is the 3347 start of the .csect. In COFF, csect symbols get special aux 3348 entries defined by the x_csect field of union internal_auxent. The 3349 optional second argument is the alignment (the default is 2). */ 3350 3351static void 3352ppc_csect (int ignore ATTRIBUTE_UNUSED) 3353{ 3354 char *name; 3355 char endc; 3356 symbolS *sym; 3357 offsetT align; 3358 3359 name = input_line_pointer; 3360 endc = get_symbol_end (); 3361 3362 sym = symbol_find_or_make (name); 3363 3364 *input_line_pointer = endc; 3365 3366 if (S_GET_NAME (sym)[0] == '\0') 3367 { 3368 /* An unnamed csect is assumed to be [PR]. */ 3369 symbol_get_tc (sym)->symbol_class = XMC_PR; 3370 } 3371 3372 align = 2; 3373 if (*input_line_pointer == ',') 3374 { 3375 ++input_line_pointer; 3376 align = get_absolute_expression (); 3377 } 3378 3379 ppc_change_csect (sym, align); 3380 3381 demand_empty_rest_of_line (); 3382} 3383 3384/* Change to a different csect. */ 3385 3386static void 3387ppc_change_csect (symbolS *sym, offsetT align) 3388{ 3389 if (S_IS_DEFINED (sym)) 3390 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); 3391 else 3392 { 3393 symbolS **list_ptr; 3394 int after_toc; 3395 int hold_chunksize; 3396 symbolS *list; 3397 int is_code; 3398 segT sec; 3399 3400 /* This is a new csect. We need to look at the symbol class to 3401 figure out whether it should go in the text section or the 3402 data section. */ 3403 after_toc = 0; 3404 is_code = 0; 3405 switch (symbol_get_tc (sym)->symbol_class) 3406 { 3407 case XMC_PR: 3408 case XMC_RO: 3409 case XMC_DB: 3410 case XMC_GL: 3411 case XMC_XO: 3412 case XMC_SV: 3413 case XMC_TI: 3414 case XMC_TB: 3415 S_SET_SEGMENT (sym, text_section); 3416 symbol_get_tc (sym)->subseg = ppc_text_subsegment; 3417 ++ppc_text_subsegment; 3418 list_ptr = &ppc_text_csects; 3419 is_code = 1; 3420 break; 3421 case XMC_RW: 3422 case XMC_TC0: 3423 case XMC_TC: 3424 case XMC_DS: 3425 case XMC_UA: 3426 case XMC_BS: 3427 case XMC_UC: 3428 if (ppc_toc_csect != NULL 3429 && (symbol_get_tc (ppc_toc_csect)->subseg + 1 3430 == ppc_data_subsegment)) 3431 after_toc = 1; 3432 S_SET_SEGMENT (sym, data_section); 3433 symbol_get_tc (sym)->subseg = ppc_data_subsegment; 3434 ++ppc_data_subsegment; 3435 list_ptr = &ppc_data_csects; 3436 break; 3437 default: 3438 abort (); 3439 } 3440 3441 /* We set the obstack chunk size to a small value before 3442 changing subsegments, so that we don't use a lot of memory 3443 space for what may be a small section. */ 3444 hold_chunksize = chunksize; 3445 chunksize = 64; 3446 3447 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), 3448 symbol_get_tc (sym)->subseg); 3449 3450 chunksize = hold_chunksize; 3451 3452 if (after_toc) 3453 ppc_after_toc_frag = frag_now; 3454 3455 record_alignment (sec, align); 3456 if (is_code) 3457 frag_align_code (align, 0); 3458 else 3459 frag_align (align, 0, 0); 3460 3461 symbol_set_frag (sym, frag_now); 3462 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 3463 3464 symbol_get_tc (sym)->align = align; 3465 symbol_get_tc (sym)->output = 1; 3466 symbol_get_tc (sym)->within = sym; 3467 3468 for (list = *list_ptr; 3469 symbol_get_tc (list)->next != (symbolS *) NULL; 3470 list = symbol_get_tc (list)->next) 3471 ; 3472 symbol_get_tc (list)->next = sym; 3473 3474 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 3475 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 3476 &symbol_lastP); 3477 } 3478 3479 ppc_current_csect = sym; 3480} 3481 3482/* This function handles the .text and .data pseudo-ops. These 3483 pseudo-ops aren't really used by XCOFF; we implement them for the 3484 convenience of people who aren't used to XCOFF. */ 3485 3486static void 3487ppc_section (int type) 3488{ 3489 const char *name; 3490 symbolS *sym; 3491 3492 if (type == 't') 3493 name = ".text[PR]"; 3494 else if (type == 'd') 3495 name = ".data[RW]"; 3496 else 3497 abort (); 3498 3499 sym = symbol_find_or_make (name); 3500 3501 ppc_change_csect (sym, 2); 3502 3503 demand_empty_rest_of_line (); 3504} 3505 3506/* This function handles the .section pseudo-op. This is mostly to 3507 give an error, since XCOFF only supports .text, .data and .bss, but 3508 we do permit the user to name the text or data section. */ 3509 3510static void 3511ppc_named_section (int ignore ATTRIBUTE_UNUSED) 3512{ 3513 char *user_name; 3514 const char *real_name; 3515 char c; 3516 symbolS *sym; 3517 3518 user_name = input_line_pointer; 3519 c = get_symbol_end (); 3520 3521 if (strcmp (user_name, ".text") == 0) 3522 real_name = ".text[PR]"; 3523 else if (strcmp (user_name, ".data") == 0) 3524 real_name = ".data[RW]"; 3525 else 3526 { 3527 as_bad (_("The XCOFF file format does not support arbitrary sections")); 3528 *input_line_pointer = c; 3529 ignore_rest_of_line (); 3530 return; 3531 } 3532 3533 *input_line_pointer = c; 3534 3535 sym = symbol_find_or_make (real_name); 3536 3537 ppc_change_csect (sym, 2); 3538 3539 demand_empty_rest_of_line (); 3540} 3541 3542/* The .extern pseudo-op. We create an undefined symbol. */ 3543 3544static void 3545ppc_extern (int ignore ATTRIBUTE_UNUSED) 3546{ 3547 char *name; 3548 char endc; 3549 3550 name = input_line_pointer; 3551 endc = get_symbol_end (); 3552 3553 (void) symbol_find_or_make (name); 3554 3555 *input_line_pointer = endc; 3556 3557 demand_empty_rest_of_line (); 3558} 3559 3560/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ 3561 3562static void 3563ppc_lglobl (int ignore ATTRIBUTE_UNUSED) 3564{ 3565 char *name; 3566 char endc; 3567 symbolS *sym; 3568 3569 name = input_line_pointer; 3570 endc = get_symbol_end (); 3571 3572 sym = symbol_find_or_make (name); 3573 3574 *input_line_pointer = endc; 3575 3576 symbol_get_tc (sym)->output = 1; 3577 3578 demand_empty_rest_of_line (); 3579} 3580 3581/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF 3582 relocations at the beginning of the current csect. 3583 3584 (In principle, there's no reason why the relocations _have_ to be at 3585 the beginning. Anywhere in the csect would do. However, inserting 3586 at the beginning is what the native assmebler does, and it helps to 3587 deal with cases where the .ref statements follow the section contents.) 3588 3589 ??? .refs don't work for empty .csects. However, the native assembler 3590 doesn't report an error in this case, and neither yet do we. */ 3591 3592static void 3593ppc_ref (int ignore ATTRIBUTE_UNUSED) 3594{ 3595 char *name; 3596 char c; 3597 3598 if (ppc_current_csect == NULL) 3599 { 3600 as_bad (_(".ref outside .csect")); 3601 ignore_rest_of_line (); 3602 return; 3603 } 3604 3605 do 3606 { 3607 name = input_line_pointer; 3608 c = get_symbol_end (); 3609 3610 fix_at_start (symbol_get_frag (ppc_current_csect), 0, 3611 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); 3612 3613 *input_line_pointer = c; 3614 SKIP_WHITESPACE (); 3615 c = *input_line_pointer; 3616 if (c == ',') 3617 { 3618 input_line_pointer++; 3619 SKIP_WHITESPACE (); 3620 if (is_end_of_line[(unsigned char) *input_line_pointer]) 3621 { 3622 as_bad (_("missing symbol name")); 3623 ignore_rest_of_line (); 3624 return; 3625 } 3626 } 3627 } 3628 while (c == ','); 3629 3630 demand_empty_rest_of_line (); 3631} 3632 3633/* The .rename pseudo-op. The RS/6000 assembler can rename symbols, 3634 although I don't know why it bothers. */ 3635 3636static void 3637ppc_rename (int ignore ATTRIBUTE_UNUSED) 3638{ 3639 char *name; 3640 char endc; 3641 symbolS *sym; 3642 int len; 3643 3644 name = input_line_pointer; 3645 endc = get_symbol_end (); 3646 3647 sym = symbol_find_or_make (name); 3648 3649 *input_line_pointer = endc; 3650 3651 if (*input_line_pointer != ',') 3652 { 3653 as_bad (_("missing rename string")); 3654 ignore_rest_of_line (); 3655 return; 3656 } 3657 ++input_line_pointer; 3658 3659 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); 3660 3661 demand_empty_rest_of_line (); 3662} 3663 3664/* The .stabx pseudo-op. This is similar to a normal .stabs 3665 pseudo-op, but slightly different. A sample is 3666 .stabx "main:F-1",.main,142,0 3667 The first argument is the symbol name to create. The second is the 3668 value, and the third is the storage class. The fourth seems to be 3669 always zero, and I am assuming it is the type. */ 3670 3671static void 3672ppc_stabx (int ignore ATTRIBUTE_UNUSED) 3673{ 3674 char *name; 3675 int len; 3676 symbolS *sym; 3677 expressionS exp; 3678 3679 name = demand_copy_C_string (&len); 3680 3681 if (*input_line_pointer != ',') 3682 { 3683 as_bad (_("missing value")); 3684 return; 3685 } 3686 ++input_line_pointer; 3687 3688 ppc_stab_symbol = TRUE; 3689 sym = symbol_make (name); 3690 ppc_stab_symbol = FALSE; 3691 3692 symbol_get_tc (sym)->real_name = name; 3693 3694 (void) expression (&exp); 3695 3696 switch (exp.X_op) 3697 { 3698 case O_illegal: 3699 case O_absent: 3700 case O_big: 3701 as_bad (_("illegal .stabx expression; zero assumed")); 3702 exp.X_add_number = 0; 3703 /* Fall through. */ 3704 case O_constant: 3705 S_SET_VALUE (sym, (valueT) exp.X_add_number); 3706 symbol_set_frag (sym, &zero_address_frag); 3707 break; 3708 3709 case O_symbol: 3710 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) 3711 symbol_set_value_expression (sym, &exp); 3712 else 3713 { 3714 S_SET_VALUE (sym, 3715 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); 3716 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); 3717 } 3718 break; 3719 3720 default: 3721 /* The value is some complex expression. This will probably 3722 fail at some later point, but this is probably the right 3723 thing to do here. */ 3724 symbol_set_value_expression (sym, &exp); 3725 break; 3726 } 3727 3728 S_SET_SEGMENT (sym, ppc_coff_debug_section); 3729 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 3730 3731 if (*input_line_pointer != ',') 3732 { 3733 as_bad (_("missing class")); 3734 return; 3735 } 3736 ++input_line_pointer; 3737 3738 S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); 3739 3740 if (*input_line_pointer != ',') 3741 { 3742 as_bad (_("missing type")); 3743 return; 3744 } 3745 ++input_line_pointer; 3746 3747 S_SET_DATA_TYPE (sym, get_absolute_expression ()); 3748 3749 symbol_get_tc (sym)->output = 1; 3750 3751 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) { 3752 3753 symbol_get_tc (sym)->within = ppc_current_block; 3754 3755 /* In this case : 3756 3757 .bs name 3758 .stabx "z",arrays_,133,0 3759 .es 3760 3761 .comm arrays_,13768,3 3762 3763 resolve_symbol_value will copy the exp's "within" into sym's when the 3764 offset is 0. Since this seems to be corner case problem, 3765 only do the correction for storage class C_STSYM. A better solution 3766 would be to have the tc field updated in ppc_symbol_new_hook. */ 3767 3768 if (exp.X_op == O_symbol) 3769 { 3770 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; 3771 } 3772 } 3773 3774 if (exp.X_op != O_symbol 3775 || ! S_IS_EXTERNAL (exp.X_add_symbol) 3776 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) 3777 ppc_frob_label (sym); 3778 else 3779 { 3780 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 3781 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); 3782 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) 3783 symbol_get_tc (ppc_current_csect)->within = sym; 3784 } 3785 3786 demand_empty_rest_of_line (); 3787} 3788 3789/* The .function pseudo-op. This takes several arguments. The first 3790 argument seems to be the external name of the symbol. The second 3791 argument seems to be the label for the start of the function. gcc 3792 uses the same name for both. I have no idea what the third and 3793 fourth arguments are meant to be. The optional fifth argument is 3794 an expression for the size of the function. In COFF this symbol 3795 gets an aux entry like that used for a csect. */ 3796 3797static void 3798ppc_function (int ignore ATTRIBUTE_UNUSED) 3799{ 3800 char *name; 3801 char endc; 3802 char *s; 3803 symbolS *ext_sym; 3804 symbolS *lab_sym; 3805 3806 name = input_line_pointer; 3807 endc = get_symbol_end (); 3808 3809 /* Ignore any [PR] suffix. */ 3810 name = ppc_canonicalize_symbol_name (name); 3811 s = strchr (name, '['); 3812 if (s != (char *) NULL 3813 && strcmp (s + 1, "PR]") == 0) 3814 *s = '\0'; 3815 3816 ext_sym = symbol_find_or_make (name); 3817 3818 *input_line_pointer = endc; 3819 3820 if (*input_line_pointer != ',') 3821 { 3822 as_bad (_("missing symbol name")); 3823 ignore_rest_of_line (); 3824 return; 3825 } 3826 ++input_line_pointer; 3827 3828 name = input_line_pointer; 3829 endc = get_symbol_end (); 3830 3831 lab_sym = symbol_find_or_make (name); 3832 3833 *input_line_pointer = endc; 3834 3835 if (ext_sym != lab_sym) 3836 { 3837 expressionS exp; 3838 3839 exp.X_op = O_symbol; 3840 exp.X_add_symbol = lab_sym; 3841 exp.X_op_symbol = NULL; 3842 exp.X_add_number = 0; 3843 exp.X_unsigned = 0; 3844 symbol_set_value_expression (ext_sym, &exp); 3845 } 3846 3847 if (symbol_get_tc (ext_sym)->symbol_class == -1) 3848 symbol_get_tc (ext_sym)->symbol_class = XMC_PR; 3849 symbol_get_tc (ext_sym)->output = 1; 3850 3851 if (*input_line_pointer == ',') 3852 { 3853 expressionS exp; 3854 3855 /* Ignore the third argument. */ 3856 ++input_line_pointer; 3857 expression (& exp); 3858 if (*input_line_pointer == ',') 3859 { 3860 /* Ignore the fourth argument. */ 3861 ++input_line_pointer; 3862 expression (& exp); 3863 if (*input_line_pointer == ',') 3864 { 3865 /* The fifth argument is the function size. */ 3866 ++input_line_pointer; 3867 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001", 3868 absolute_section, 3869 (valueT) 0, 3870 &zero_address_frag); 3871 pseudo_set (symbol_get_tc (ext_sym)->size); 3872 } 3873 } 3874 } 3875 3876 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 3877 SF_SET_FUNCTION (ext_sym); 3878 SF_SET_PROCESS (ext_sym); 3879 coff_add_linesym (ext_sym); 3880 3881 demand_empty_rest_of_line (); 3882} 3883 3884/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named 3885 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym 3886 with the correct line number */ 3887 3888static symbolS *saved_bi_sym = 0; 3889 3890static void 3891ppc_bf (int ignore ATTRIBUTE_UNUSED) 3892{ 3893 symbolS *sym; 3894 3895 sym = symbol_make (".bf"); 3896 S_SET_SEGMENT (sym, text_section); 3897 symbol_set_frag (sym, frag_now); 3898 S_SET_VALUE (sym, frag_now_fix ()); 3899 S_SET_STORAGE_CLASS (sym, C_FCN); 3900 3901 coff_line_base = get_absolute_expression (); 3902 3903 S_SET_NUMBER_AUXILIARY (sym, 1); 3904 SA_SET_SYM_LNNO (sym, coff_line_base); 3905 3906 /* Line number for bi. */ 3907 if (saved_bi_sym) 3908 { 3909 S_SET_VALUE (saved_bi_sym, coff_n_line_nos); 3910 saved_bi_sym = 0; 3911 } 3912 3913 3914 symbol_get_tc (sym)->output = 1; 3915 3916 ppc_frob_label (sym); 3917 3918 demand_empty_rest_of_line (); 3919} 3920 3921/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named 3922 ".ef", except that the line number is absolute, not relative to the 3923 most recent ".bf" symbol. */ 3924 3925static void 3926ppc_ef (int ignore ATTRIBUTE_UNUSED) 3927{ 3928 symbolS *sym; 3929 3930 sym = symbol_make (".ef"); 3931 S_SET_SEGMENT (sym, text_section); 3932 symbol_set_frag (sym, frag_now); 3933 S_SET_VALUE (sym, frag_now_fix ()); 3934 S_SET_STORAGE_CLASS (sym, C_FCN); 3935 S_SET_NUMBER_AUXILIARY (sym, 1); 3936 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 3937 symbol_get_tc (sym)->output = 1; 3938 3939 ppc_frob_label (sym); 3940 3941 demand_empty_rest_of_line (); 3942} 3943 3944/* The .bi and .ei pseudo-ops. These take a string argument and 3945 generates a C_BINCL or C_EINCL symbol, which goes at the start of 3946 the symbol list. The value of .bi will be know when the next .bf 3947 is encountered. */ 3948 3949static void 3950ppc_biei (int ei) 3951{ 3952 static symbolS *last_biei; 3953 3954 char *name; 3955 int len; 3956 symbolS *sym; 3957 symbolS *look; 3958 3959 name = demand_copy_C_string (&len); 3960 3961 /* The value of these symbols is actually file offset. Here we set 3962 the value to the index into the line number entries. In 3963 ppc_frob_symbols we set the fix_line field, which will cause BFD 3964 to do the right thing. */ 3965 3966 sym = symbol_make (name); 3967 /* obj-coff.c currently only handles line numbers correctly in the 3968 .text section. */ 3969 S_SET_SEGMENT (sym, text_section); 3970 S_SET_VALUE (sym, coff_n_line_nos); 3971 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 3972 3973 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); 3974 symbol_get_tc (sym)->output = 1; 3975 3976 /* Save bi. */ 3977 if (ei) 3978 saved_bi_sym = 0; 3979 else 3980 saved_bi_sym = sym; 3981 3982 for (look = last_biei ? last_biei : symbol_rootP; 3983 (look != (symbolS *) NULL 3984 && (S_GET_STORAGE_CLASS (look) == C_FILE 3985 || S_GET_STORAGE_CLASS (look) == C_BINCL 3986 || S_GET_STORAGE_CLASS (look) == C_EINCL)); 3987 look = symbol_next (look)) 3988 ; 3989 if (look != (symbolS *) NULL) 3990 { 3991 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 3992 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); 3993 last_biei = sym; 3994 } 3995 3996 demand_empty_rest_of_line (); 3997} 3998 3999/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". 4000 There is one argument, which is a csect symbol. The value of the 4001 .bs symbol is the index of this csect symbol. */ 4002 4003static void 4004ppc_bs (int ignore ATTRIBUTE_UNUSED) 4005{ 4006 char *name; 4007 char endc; 4008 symbolS *csect; 4009 symbolS *sym; 4010 4011 if (ppc_current_block != NULL) 4012 as_bad (_("nested .bs blocks")); 4013 4014 name = input_line_pointer; 4015 endc = get_symbol_end (); 4016 4017 csect = symbol_find_or_make (name); 4018 4019 *input_line_pointer = endc; 4020 4021 sym = symbol_make (".bs"); 4022 S_SET_SEGMENT (sym, now_seg); 4023 S_SET_STORAGE_CLASS (sym, C_BSTAT); 4024 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4025 symbol_get_tc (sym)->output = 1; 4026 4027 symbol_get_tc (sym)->within = csect; 4028 4029 ppc_frob_label (sym); 4030 4031 ppc_current_block = sym; 4032 4033 demand_empty_rest_of_line (); 4034} 4035 4036/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ 4037 4038static void 4039ppc_es (int ignore ATTRIBUTE_UNUSED) 4040{ 4041 symbolS *sym; 4042 4043 if (ppc_current_block == NULL) 4044 as_bad (_(".es without preceding .bs")); 4045 4046 sym = symbol_make (".es"); 4047 S_SET_SEGMENT (sym, now_seg); 4048 S_SET_STORAGE_CLASS (sym, C_ESTAT); 4049 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4050 symbol_get_tc (sym)->output = 1; 4051 4052 ppc_frob_label (sym); 4053 4054 ppc_current_block = NULL; 4055 4056 demand_empty_rest_of_line (); 4057} 4058 4059/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a 4060 line number. */ 4061 4062static void 4063ppc_bb (int ignore ATTRIBUTE_UNUSED) 4064{ 4065 symbolS *sym; 4066 4067 sym = symbol_make (".bb"); 4068 S_SET_SEGMENT (sym, text_section); 4069 symbol_set_frag (sym, frag_now); 4070 S_SET_VALUE (sym, frag_now_fix ()); 4071 S_SET_STORAGE_CLASS (sym, C_BLOCK); 4072 4073 S_SET_NUMBER_AUXILIARY (sym, 1); 4074 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4075 4076 symbol_get_tc (sym)->output = 1; 4077 4078 SF_SET_PROCESS (sym); 4079 4080 ppc_frob_label (sym); 4081 4082 demand_empty_rest_of_line (); 4083} 4084 4085/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a 4086 line number. */ 4087 4088static void 4089ppc_eb (int ignore ATTRIBUTE_UNUSED) 4090{ 4091 symbolS *sym; 4092 4093 sym = symbol_make (".eb"); 4094 S_SET_SEGMENT (sym, text_section); 4095 symbol_set_frag (sym, frag_now); 4096 S_SET_VALUE (sym, frag_now_fix ()); 4097 S_SET_STORAGE_CLASS (sym, C_BLOCK); 4098 S_SET_NUMBER_AUXILIARY (sym, 1); 4099 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4100 symbol_get_tc (sym)->output = 1; 4101 4102 SF_SET_PROCESS (sym); 4103 4104 ppc_frob_label (sym); 4105 4106 demand_empty_rest_of_line (); 4107} 4108 4109/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a 4110 specified name. */ 4111 4112static void 4113ppc_bc (int ignore ATTRIBUTE_UNUSED) 4114{ 4115 char *name; 4116 int len; 4117 symbolS *sym; 4118 4119 name = demand_copy_C_string (&len); 4120 sym = symbol_make (name); 4121 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4122 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4123 S_SET_STORAGE_CLASS (sym, C_BCOMM); 4124 S_SET_VALUE (sym, 0); 4125 symbol_get_tc (sym)->output = 1; 4126 4127 ppc_frob_label (sym); 4128 4129 demand_empty_rest_of_line (); 4130} 4131 4132/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ 4133 4134static void 4135ppc_ec (int ignore ATTRIBUTE_UNUSED) 4136{ 4137 symbolS *sym; 4138 4139 sym = symbol_make (".ec"); 4140 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4141 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4142 S_SET_STORAGE_CLASS (sym, C_ECOMM); 4143 S_SET_VALUE (sym, 0); 4144 symbol_get_tc (sym)->output = 1; 4145 4146 ppc_frob_label (sym); 4147 4148 demand_empty_rest_of_line (); 4149} 4150 4151/* The .toc pseudo-op. Switch to the .toc subsegment. */ 4152 4153static void 4154ppc_toc (int ignore ATTRIBUTE_UNUSED) 4155{ 4156 if (ppc_toc_csect != (symbolS *) NULL) 4157 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); 4158 else 4159 { 4160 subsegT subseg; 4161 symbolS *sym; 4162 symbolS *list; 4163 4164 subseg = ppc_data_subsegment; 4165 ++ppc_data_subsegment; 4166 4167 subseg_new (segment_name (data_section), subseg); 4168 ppc_toc_frag = frag_now; 4169 4170 sym = symbol_find_or_make ("TOC[TC0]"); 4171 symbol_set_frag (sym, frag_now); 4172 S_SET_SEGMENT (sym, data_section); 4173 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4174 symbol_get_tc (sym)->subseg = subseg; 4175 symbol_get_tc (sym)->output = 1; 4176 symbol_get_tc (sym)->within = sym; 4177 4178 ppc_toc_csect = sym; 4179 4180 for (list = ppc_data_csects; 4181 symbol_get_tc (list)->next != (symbolS *) NULL; 4182 list = symbol_get_tc (list)->next) 4183 ; 4184 symbol_get_tc (list)->next = sym; 4185 4186 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4187 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 4188 &symbol_lastP); 4189 } 4190 4191 ppc_current_csect = ppc_toc_csect; 4192 4193 demand_empty_rest_of_line (); 4194} 4195 4196/* The AIX assembler automatically aligns the operands of a .long or 4197 .short pseudo-op, and we want to be compatible. */ 4198 4199static void 4200ppc_xcoff_cons (int log_size) 4201{ 4202 frag_align (log_size, 0, 0); 4203 record_alignment (now_seg, log_size); 4204 cons (1 << log_size); 4205} 4206 4207static void 4208ppc_vbyte (int dummy ATTRIBUTE_UNUSED) 4209{ 4210 expressionS exp; 4211 int byte_count; 4212 4213 (void) expression (&exp); 4214 4215 if (exp.X_op != O_constant) 4216 { 4217 as_bad (_("non-constant byte count")); 4218 return; 4219 } 4220 4221 byte_count = exp.X_add_number; 4222 4223 if (*input_line_pointer != ',') 4224 { 4225 as_bad (_("missing value")); 4226 return; 4227 } 4228 4229 ++input_line_pointer; 4230 cons (byte_count); 4231} 4232 4233#endif /* OBJ_XCOFF */ 4234#if defined (OBJ_XCOFF) || defined (OBJ_ELF) 4235 4236/* The .tc pseudo-op. This is used when generating either XCOFF or 4237 ELF. This takes two or more arguments. 4238 4239 When generating XCOFF output, the first argument is the name to 4240 give to this location in the toc; this will be a symbol with class 4241 TC. The rest of the arguments are N-byte values to actually put at 4242 this location in the TOC; often there is just one more argument, a 4243 relocatable symbol reference. The size of the value to store 4244 depends on target word size. A 32-bit target uses 4-byte values, a 4245 64-bit target uses 8-byte values. 4246 4247 When not generating XCOFF output, the arguments are the same, but 4248 the first argument is simply ignored. */ 4249 4250static void 4251ppc_tc (int ignore ATTRIBUTE_UNUSED) 4252{ 4253#ifdef OBJ_XCOFF 4254 4255 /* Define the TOC symbol name. */ 4256 { 4257 char *name; 4258 char endc; 4259 symbolS *sym; 4260 4261 if (ppc_toc_csect == (symbolS *) NULL 4262 || ppc_toc_csect != ppc_current_csect) 4263 { 4264 as_bad (_(".tc not in .toc section")); 4265 ignore_rest_of_line (); 4266 return; 4267 } 4268 4269 name = input_line_pointer; 4270 endc = get_symbol_end (); 4271 4272 sym = symbol_find_or_make (name); 4273 4274 *input_line_pointer = endc; 4275 4276 if (S_IS_DEFINED (sym)) 4277 { 4278 symbolS *label; 4279 4280 label = symbol_get_tc (ppc_current_csect)->within; 4281 if (symbol_get_tc (label)->symbol_class != XMC_TC0) 4282 { 4283 as_bad (_(".tc with no label")); 4284 ignore_rest_of_line (); 4285 return; 4286 } 4287 4288 S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); 4289 symbol_set_frag (label, symbol_get_frag (sym)); 4290 S_SET_VALUE (label, S_GET_VALUE (sym)); 4291 4292 while (! is_end_of_line[(unsigned char) *input_line_pointer]) 4293 ++input_line_pointer; 4294 4295 return; 4296 } 4297 4298 S_SET_SEGMENT (sym, now_seg); 4299 symbol_set_frag (sym, frag_now); 4300 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4301 symbol_get_tc (sym)->symbol_class = XMC_TC; 4302 symbol_get_tc (sym)->output = 1; 4303 4304 ppc_frob_label (sym); 4305 } 4306 4307#endif /* OBJ_XCOFF */ 4308#ifdef OBJ_ELF 4309 int align; 4310 4311 /* Skip the TOC symbol name. */ 4312 while (is_part_of_name (*input_line_pointer) 4313 || *input_line_pointer == ' ' 4314 || *input_line_pointer == '[' 4315 || *input_line_pointer == ']' 4316 || *input_line_pointer == '{' 4317 || *input_line_pointer == '}') 4318 ++input_line_pointer; 4319 4320 /* Align to a four/eight byte boundary. */ 4321 align = ppc_obj64 ? 3 : 2; 4322 frag_align (align, 0, 0); 4323 record_alignment (now_seg, align); 4324#endif /* OBJ_ELF */ 4325 4326 if (*input_line_pointer != ',') 4327 demand_empty_rest_of_line (); 4328 else 4329 { 4330 ++input_line_pointer; 4331 cons (ppc_obj64 ? 8 : 4); 4332 } 4333} 4334 4335/* Pseudo-op .machine. */ 4336 4337static void 4338ppc_machine (int ignore ATTRIBUTE_UNUSED) 4339{ 4340 char *cpu_string; 4341#define MAX_HISTORY 100 4342 static ppc_cpu_t *cpu_history; 4343 static int curr_hist; 4344 4345 SKIP_WHITESPACE (); 4346 4347 if (*input_line_pointer == '"') 4348 { 4349 int len; 4350 cpu_string = demand_copy_C_string (&len); 4351 } 4352 else 4353 { 4354 char c; 4355 cpu_string = input_line_pointer; 4356 c = get_symbol_end (); 4357 cpu_string = xstrdup (cpu_string); 4358 *input_line_pointer = c; 4359 } 4360 4361 if (cpu_string != NULL) 4362 { 4363 ppc_cpu_t old_cpu = ppc_cpu; 4364 ppc_cpu_t new_cpu; 4365 char *p; 4366 4367 for (p = cpu_string; *p != 0; p++) 4368 *p = TOLOWER (*p); 4369 4370 if (strcmp (cpu_string, "push") == 0) 4371 { 4372 if (cpu_history == NULL) 4373 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history)); 4374 4375 if (curr_hist >= MAX_HISTORY) 4376 as_bad (_(".machine stack overflow")); 4377 else 4378 cpu_history[curr_hist++] = ppc_cpu; 4379 } 4380 else if (strcmp (cpu_string, "pop") == 0) 4381 { 4382 if (curr_hist <= 0) 4383 as_bad (_(".machine stack underflow")); 4384 else 4385 ppc_cpu = cpu_history[--curr_hist]; 4386 } 4387 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0) 4388 ppc_cpu = new_cpu; 4389 else 4390 as_bad (_("invalid machine `%s'"), cpu_string); 4391 4392 if (ppc_cpu != old_cpu) 4393 ppc_setup_opcodes (); 4394 } 4395 4396 demand_empty_rest_of_line (); 4397} 4398 4399/* See whether a symbol is in the TOC section. */ 4400 4401static int 4402ppc_is_toc_sym (symbolS *sym) 4403{ 4404#ifdef OBJ_XCOFF 4405 return symbol_get_tc (sym)->symbol_class == XMC_TC; 4406#endif 4407#ifdef OBJ_ELF 4408 const char *sname = segment_name (S_GET_SEGMENT (sym)); 4409 if (ppc_obj64) 4410 return strcmp (sname, ".toc") == 0; 4411 else 4412 return strcmp (sname, ".got") == 0; 4413#endif 4414} 4415#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 4416 4417#ifdef TE_PE 4418 4419/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 4420 4421/* Set the current section. */ 4422static void 4423ppc_set_current_section (segT new) 4424{ 4425 ppc_previous_section = ppc_current_section; 4426 ppc_current_section = new; 4427} 4428 4429/* pseudo-op: .previous 4430 behaviour: toggles the current section with the previous section. 4431 errors: None 4432 warnings: "No previous section" */ 4433 4434static void 4435ppc_previous (int ignore ATTRIBUTE_UNUSED) 4436{ 4437 symbolS *tmp; 4438 4439 if (ppc_previous_section == NULL) 4440 { 4441 as_warn (_("No previous section to return to. Directive ignored.")); 4442 return; 4443 } 4444 4445 subseg_set (ppc_previous_section, 0); 4446 4447 ppc_set_current_section (ppc_previous_section); 4448} 4449 4450/* pseudo-op: .pdata 4451 behaviour: predefined read only data section 4452 double word aligned 4453 errors: None 4454 warnings: None 4455 initial: .section .pdata "adr3" 4456 a - don't know -- maybe a misprint 4457 d - initialized data 4458 r - readable 4459 3 - double word aligned (that would be 4 byte boundary) 4460 4461 commentary: 4462 Tag index tables (also known as the function table) for exception 4463 handling, debugging, etc. */ 4464 4465static void 4466ppc_pdata (int ignore ATTRIBUTE_UNUSED) 4467{ 4468 if (pdata_section == 0) 4469 { 4470 pdata_section = subseg_new (".pdata", 0); 4471 4472 bfd_set_section_flags (stdoutput, pdata_section, 4473 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 4474 | SEC_READONLY | SEC_DATA )); 4475 4476 bfd_set_section_alignment (stdoutput, pdata_section, 2); 4477 } 4478 else 4479 { 4480 pdata_section = subseg_new (".pdata", 0); 4481 } 4482 ppc_set_current_section (pdata_section); 4483} 4484 4485/* pseudo-op: .ydata 4486 behaviour: predefined read only data section 4487 double word aligned 4488 errors: None 4489 warnings: None 4490 initial: .section .ydata "drw3" 4491 a - don't know -- maybe a misprint 4492 d - initialized data 4493 r - readable 4494 3 - double word aligned (that would be 4 byte boundary) 4495 commentary: 4496 Tag tables (also known as the scope table) for exception handling, 4497 debugging, etc. */ 4498 4499static void 4500ppc_ydata (int ignore ATTRIBUTE_UNUSED) 4501{ 4502 if (ydata_section == 0) 4503 { 4504 ydata_section = subseg_new (".ydata", 0); 4505 bfd_set_section_flags (stdoutput, ydata_section, 4506 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 4507 | SEC_READONLY | SEC_DATA )); 4508 4509 bfd_set_section_alignment (stdoutput, ydata_section, 3); 4510 } 4511 else 4512 { 4513 ydata_section = subseg_new (".ydata", 0); 4514 } 4515 ppc_set_current_section (ydata_section); 4516} 4517 4518/* pseudo-op: .reldata 4519 behaviour: predefined read write data section 4520 double word aligned (4-byte) 4521 FIXME: relocation is applied to it 4522 FIXME: what's the difference between this and .data? 4523 errors: None 4524 warnings: None 4525 initial: .section .reldata "drw3" 4526 d - initialized data 4527 r - readable 4528 w - writeable 4529 3 - double word aligned (that would be 8 byte boundary) 4530 4531 commentary: 4532 Like .data, but intended to hold data subject to relocation, such as 4533 function descriptors, etc. */ 4534 4535static void 4536ppc_reldata (int ignore ATTRIBUTE_UNUSED) 4537{ 4538 if (reldata_section == 0) 4539 { 4540 reldata_section = subseg_new (".reldata", 0); 4541 4542 bfd_set_section_flags (stdoutput, reldata_section, 4543 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 4544 | SEC_DATA)); 4545 4546 bfd_set_section_alignment (stdoutput, reldata_section, 2); 4547 } 4548 else 4549 { 4550 reldata_section = subseg_new (".reldata", 0); 4551 } 4552 ppc_set_current_section (reldata_section); 4553} 4554 4555/* pseudo-op: .rdata 4556 behaviour: predefined read only data section 4557 double word aligned 4558 errors: None 4559 warnings: None 4560 initial: .section .rdata "dr3" 4561 d - initialized data 4562 r - readable 4563 3 - double word aligned (that would be 4 byte boundary) */ 4564 4565static void 4566ppc_rdata (int ignore ATTRIBUTE_UNUSED) 4567{ 4568 if (rdata_section == 0) 4569 { 4570 rdata_section = subseg_new (".rdata", 0); 4571 bfd_set_section_flags (stdoutput, rdata_section, 4572 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 4573 | SEC_READONLY | SEC_DATA )); 4574 4575 bfd_set_section_alignment (stdoutput, rdata_section, 2); 4576 } 4577 else 4578 { 4579 rdata_section = subseg_new (".rdata", 0); 4580 } 4581 ppc_set_current_section (rdata_section); 4582} 4583 4584/* pseudo-op: .ualong 4585 behaviour: much like .int, with the exception that no alignment is 4586 performed. 4587 FIXME: test the alignment statement 4588 errors: None 4589 warnings: None */ 4590 4591static void 4592ppc_ualong (int ignore ATTRIBUTE_UNUSED) 4593{ 4594 /* Try for long. */ 4595 cons (4); 4596} 4597 4598/* pseudo-op: .znop <symbol name> 4599 behaviour: Issue a nop instruction 4600 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using 4601 the supplied symbol name. 4602 errors: None 4603 warnings: Missing symbol name */ 4604 4605static void 4606ppc_znop (int ignore ATTRIBUTE_UNUSED) 4607{ 4608 unsigned long insn; 4609 const struct powerpc_opcode *opcode; 4610 expressionS ex; 4611 char *f; 4612 symbolS *sym; 4613 char *symbol_name; 4614 char c; 4615 char *name; 4616 unsigned int exp; 4617 flagword flags; 4618 asection *sec; 4619 4620 /* Strip out the symbol name. */ 4621 symbol_name = input_line_pointer; 4622 c = get_symbol_end (); 4623 4624 name = xmalloc (input_line_pointer - symbol_name + 1); 4625 strcpy (name, symbol_name); 4626 4627 sym = symbol_find_or_make (name); 4628 4629 *input_line_pointer = c; 4630 4631 SKIP_WHITESPACE (); 4632 4633 /* Look up the opcode in the hash table. */ 4634 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); 4635 4636 /* Stick in the nop. */ 4637 insn = opcode->opcode; 4638 4639 /* Write out the instruction. */ 4640 f = frag_more (4); 4641 md_number_to_chars (f, insn, 4); 4642 fix_new (frag_now, 4643 f - frag_now->fr_literal, 4644 4, 4645 sym, 4646 0, 4647 0, 4648 BFD_RELOC_16_GOT_PCREL); 4649 4650} 4651 4652/* pseudo-op: 4653 behaviour: 4654 errors: 4655 warnings: */ 4656 4657static void 4658ppc_pe_comm (int lcomm) 4659{ 4660 char *name; 4661 char c; 4662 char *p; 4663 offsetT temp; 4664 symbolS *symbolP; 4665 offsetT align; 4666 4667 name = input_line_pointer; 4668 c = get_symbol_end (); 4669 4670 /* just after name is now '\0'. */ 4671 p = input_line_pointer; 4672 *p = c; 4673 SKIP_WHITESPACE (); 4674 if (*input_line_pointer != ',') 4675 { 4676 as_bad (_("Expected comma after symbol-name: rest of line ignored.")); 4677 ignore_rest_of_line (); 4678 return; 4679 } 4680 4681 input_line_pointer++; /* skip ',' */ 4682 if ((temp = get_absolute_expression ()) < 0) 4683 { 4684 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); 4685 ignore_rest_of_line (); 4686 return; 4687 } 4688 4689 if (! lcomm) 4690 { 4691 /* The third argument to .comm is the alignment. */ 4692 if (*input_line_pointer != ',') 4693 align = 3; 4694 else 4695 { 4696 ++input_line_pointer; 4697 align = get_absolute_expression (); 4698 if (align <= 0) 4699 { 4700 as_warn (_("ignoring bad alignment")); 4701 align = 3; 4702 } 4703 } 4704 } 4705 4706 *p = 0; 4707 symbolP = symbol_find_or_make (name); 4708 4709 *p = c; 4710 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 4711 { 4712 as_bad (_("Ignoring attempt to re-define symbol `%s'."), 4713 S_GET_NAME (symbolP)); 4714 ignore_rest_of_line (); 4715 return; 4716 } 4717 4718 if (S_GET_VALUE (symbolP)) 4719 { 4720 if (S_GET_VALUE (symbolP) != (valueT) temp) 4721 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."), 4722 S_GET_NAME (symbolP), 4723 (long) S_GET_VALUE (symbolP), 4724 (long) temp); 4725 } 4726 else 4727 { 4728 S_SET_VALUE (symbolP, (valueT) temp); 4729 S_SET_EXTERNAL (symbolP); 4730 S_SET_SEGMENT (symbolP, bfd_com_section_ptr); 4731 } 4732 4733 demand_empty_rest_of_line (); 4734} 4735 4736/* 4737 * implement the .section pseudo op: 4738 * .section name {, "flags"} 4739 * ^ ^ 4740 * | +--- optional flags: 'b' for bss 4741 * | 'i' for info 4742 * +-- section name 'l' for lib 4743 * 'n' for noload 4744 * 'o' for over 4745 * 'w' for data 4746 * 'd' (apparently m88k for data) 4747 * 'x' for text 4748 * But if the argument is not a quoted string, treat it as a 4749 * subsegment number. 4750 * 4751 * FIXME: this is a copy of the section processing from obj-coff.c, with 4752 * additions/changes for the moto-pas assembler support. There are three 4753 * categories: 4754 * 4755 * FIXME: I just noticed this. This doesn't work at all really. It it 4756 * setting bits that bfd probably neither understands or uses. The 4757 * correct approach (?) will have to incorporate extra fields attached 4758 * to the section to hold the system specific stuff. (krk) 4759 * 4760 * Section Contents: 4761 * 'a' - unknown - referred to in documentation, but no definition supplied 4762 * 'c' - section has code 4763 * 'd' - section has initialized data 4764 * 'u' - section has uninitialized data 4765 * 'i' - section contains directives (info) 4766 * 'n' - section can be discarded 4767 * 'R' - remove section at link time 4768 * 4769 * Section Protection: 4770 * 'r' - section is readable 4771 * 'w' - section is writeable 4772 * 'x' - section is executable 4773 * 's' - section is sharable 4774 * 4775 * Section Alignment: 4776 * '0' - align to byte boundary 4777 * '1' - align to halfword undary 4778 * '2' - align to word boundary 4779 * '3' - align to doubleword boundary 4780 * '4' - align to quadword boundary 4781 * '5' - align to 32 byte boundary 4782 * '6' - align to 64 byte boundary 4783 * 4784 */ 4785 4786void 4787ppc_pe_section (int ignore ATTRIBUTE_UNUSED) 4788{ 4789 /* Strip out the section name. */ 4790 char *section_name; 4791 char c; 4792 char *name; 4793 unsigned int exp; 4794 flagword flags; 4795 segT sec; 4796 int align; 4797 4798 section_name = input_line_pointer; 4799 c = get_symbol_end (); 4800 4801 name = xmalloc (input_line_pointer - section_name + 1); 4802 strcpy (name, section_name); 4803 4804 *input_line_pointer = c; 4805 4806 SKIP_WHITESPACE (); 4807 4808 exp = 0; 4809 flags = SEC_NO_FLAGS; 4810 4811 if (strcmp (name, ".idata$2") == 0) 4812 { 4813 align = 0; 4814 } 4815 else if (strcmp (name, ".idata$3") == 0) 4816 { 4817 align = 0; 4818 } 4819 else if (strcmp (name, ".idata$4") == 0) 4820 { 4821 align = 2; 4822 } 4823 else if (strcmp (name, ".idata$5") == 0) 4824 { 4825 align = 2; 4826 } 4827 else if (strcmp (name, ".idata$6") == 0) 4828 { 4829 align = 1; 4830 } 4831 else 4832 /* Default alignment to 16 byte boundary. */ 4833 align = 4; 4834 4835 if (*input_line_pointer == ',') 4836 { 4837 ++input_line_pointer; 4838 SKIP_WHITESPACE (); 4839 if (*input_line_pointer != '"') 4840 exp = get_absolute_expression (); 4841 else 4842 { 4843 ++input_line_pointer; 4844 while (*input_line_pointer != '"' 4845 && ! is_end_of_line[(unsigned char) *input_line_pointer]) 4846 { 4847 switch (*input_line_pointer) 4848 { 4849 /* Section Contents */ 4850 case 'a': /* unknown */ 4851 as_bad (_("Unsupported section attribute -- 'a'")); 4852 break; 4853 case 'c': /* code section */ 4854 flags |= SEC_CODE; 4855 break; 4856 case 'd': /* section has initialized data */ 4857 flags |= SEC_DATA; 4858 break; 4859 case 'u': /* section has uninitialized data */ 4860 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA 4861 in winnt.h */ 4862 flags |= SEC_ROM; 4863 break; 4864 case 'i': /* section contains directives (info) */ 4865 /* FIXME: This is IMAGE_SCN_LNK_INFO 4866 in winnt.h */ 4867 flags |= SEC_HAS_CONTENTS; 4868 break; 4869 case 'n': /* section can be discarded */ 4870 flags &=~ SEC_LOAD; 4871 break; 4872 case 'R': /* Remove section at link time */ 4873 flags |= SEC_NEVER_LOAD; 4874 break; 4875#if IFLICT_BRAIN_DAMAGE 4876 /* Section Protection */ 4877 case 'r': /* section is readable */ 4878 flags |= IMAGE_SCN_MEM_READ; 4879 break; 4880 case 'w': /* section is writeable */ 4881 flags |= IMAGE_SCN_MEM_WRITE; 4882 break; 4883 case 'x': /* section is executable */ 4884 flags |= IMAGE_SCN_MEM_EXECUTE; 4885 break; 4886 case 's': /* section is sharable */ 4887 flags |= IMAGE_SCN_MEM_SHARED; 4888 break; 4889 4890 /* Section Alignment */ 4891 case '0': /* align to byte boundary */ 4892 flags |= IMAGE_SCN_ALIGN_1BYTES; 4893 align = 0; 4894 break; 4895 case '1': /* align to halfword boundary */ 4896 flags |= IMAGE_SCN_ALIGN_2BYTES; 4897 align = 1; 4898 break; 4899 case '2': /* align to word boundary */ 4900 flags |= IMAGE_SCN_ALIGN_4BYTES; 4901 align = 2; 4902 break; 4903 case '3': /* align to doubleword boundary */ 4904 flags |= IMAGE_SCN_ALIGN_8BYTES; 4905 align = 3; 4906 break; 4907 case '4': /* align to quadword boundary */ 4908 flags |= IMAGE_SCN_ALIGN_16BYTES; 4909 align = 4; 4910 break; 4911 case '5': /* align to 32 byte boundary */ 4912 flags |= IMAGE_SCN_ALIGN_32BYTES; 4913 align = 5; 4914 break; 4915 case '6': /* align to 64 byte boundary */ 4916 flags |= IMAGE_SCN_ALIGN_64BYTES; 4917 align = 6; 4918 break; 4919#endif 4920 default: 4921 as_bad (_("unknown section attribute '%c'"), 4922 *input_line_pointer); 4923 break; 4924 } 4925 ++input_line_pointer; 4926 } 4927 if (*input_line_pointer == '"') 4928 ++input_line_pointer; 4929 } 4930 } 4931 4932 sec = subseg_new (name, (subsegT) exp); 4933 4934 ppc_set_current_section (sec); 4935 4936 if (flags != SEC_NO_FLAGS) 4937 { 4938 if (! bfd_set_section_flags (stdoutput, sec, flags)) 4939 as_bad (_("error setting flags for \"%s\": %s"), 4940 bfd_section_name (stdoutput, sec), 4941 bfd_errmsg (bfd_get_error ())); 4942 } 4943 4944 bfd_set_section_alignment (stdoutput, sec, align); 4945} 4946 4947static void 4948ppc_pe_function (int ignore ATTRIBUTE_UNUSED) 4949{ 4950 char *name; 4951 char endc; 4952 symbolS *ext_sym; 4953 4954 name = input_line_pointer; 4955 endc = get_symbol_end (); 4956 4957 ext_sym = symbol_find_or_make (name); 4958 4959 *input_line_pointer = endc; 4960 4961 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 4962 SF_SET_FUNCTION (ext_sym); 4963 SF_SET_PROCESS (ext_sym); 4964 coff_add_linesym (ext_sym); 4965 4966 demand_empty_rest_of_line (); 4967} 4968 4969static void 4970ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) 4971{ 4972 if (tocdata_section == 0) 4973 { 4974 tocdata_section = subseg_new (".tocd", 0); 4975 /* FIXME: section flags won't work. */ 4976 bfd_set_section_flags (stdoutput, tocdata_section, 4977 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 4978 | SEC_READONLY | SEC_DATA)); 4979 4980 bfd_set_section_alignment (stdoutput, tocdata_section, 2); 4981 } 4982 else 4983 { 4984 rdata_section = subseg_new (".tocd", 0); 4985 } 4986 4987 ppc_set_current_section (tocdata_section); 4988 4989 demand_empty_rest_of_line (); 4990} 4991 4992/* Don't adjust TOC relocs to use the section symbol. */ 4993 4994int 4995ppc_pe_fix_adjustable (fixS *fix) 4996{ 4997 return fix->fx_r_type != BFD_RELOC_PPC_TOC16; 4998} 4999 5000#endif 5001 5002#ifdef OBJ_XCOFF 5003 5004/* XCOFF specific symbol and file handling. */ 5005 5006/* Canonicalize the symbol name. We use the to force the suffix, if 5007 any, to use square brackets, and to be in upper case. */ 5008 5009char * 5010ppc_canonicalize_symbol_name (char *name) 5011{ 5012 char *s; 5013 5014 if (ppc_stab_symbol) 5015 return name; 5016 5017 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) 5018 ; 5019 if (*s != '\0') 5020 { 5021 char brac; 5022 5023 if (*s == '[') 5024 brac = ']'; 5025 else 5026 { 5027 *s = '['; 5028 brac = '}'; 5029 } 5030 5031 for (s++; *s != '\0' && *s != brac; s++) 5032 *s = TOUPPER (*s); 5033 5034 if (*s == '\0' || s[1] != '\0') 5035 as_bad (_("bad symbol suffix")); 5036 5037 *s = ']'; 5038 } 5039 5040 return name; 5041} 5042 5043/* Set the class of a symbol based on the suffix, if any. This is 5044 called whenever a new symbol is created. */ 5045 5046void 5047ppc_symbol_new_hook (symbolS *sym) 5048{ 5049 struct ppc_tc_sy *tc; 5050 const char *s; 5051 5052 tc = symbol_get_tc (sym); 5053 tc->next = NULL; 5054 tc->output = 0; 5055 tc->symbol_class = -1; 5056 tc->real_name = NULL; 5057 tc->subseg = 0; 5058 tc->align = 0; 5059 tc->size = NULL; 5060 tc->within = NULL; 5061 5062 if (ppc_stab_symbol) 5063 return; 5064 5065 s = strchr (S_GET_NAME (sym), '['); 5066 if (s == (const char *) NULL) 5067 { 5068 /* There is no suffix. */ 5069 return; 5070 } 5071 5072 ++s; 5073 5074 switch (s[0]) 5075 { 5076 case 'B': 5077 if (strcmp (s, "BS]") == 0) 5078 tc->symbol_class = XMC_BS; 5079 break; 5080 case 'D': 5081 if (strcmp (s, "DB]") == 0) 5082 tc->symbol_class = XMC_DB; 5083 else if (strcmp (s, "DS]") == 0) 5084 tc->symbol_class = XMC_DS; 5085 break; 5086 case 'G': 5087 if (strcmp (s, "GL]") == 0) 5088 tc->symbol_class = XMC_GL; 5089 break; 5090 case 'P': 5091 if (strcmp (s, "PR]") == 0) 5092 tc->symbol_class = XMC_PR; 5093 break; 5094 case 'R': 5095 if (strcmp (s, "RO]") == 0) 5096 tc->symbol_class = XMC_RO; 5097 else if (strcmp (s, "RW]") == 0) 5098 tc->symbol_class = XMC_RW; 5099 break; 5100 case 'S': 5101 if (strcmp (s, "SV]") == 0) 5102 tc->symbol_class = XMC_SV; 5103 break; 5104 case 'T': 5105 if (strcmp (s, "TC]") == 0) 5106 tc->symbol_class = XMC_TC; 5107 else if (strcmp (s, "TI]") == 0) 5108 tc->symbol_class = XMC_TI; 5109 else if (strcmp (s, "TB]") == 0) 5110 tc->symbol_class = XMC_TB; 5111 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) 5112 tc->symbol_class = XMC_TC0; 5113 break; 5114 case 'U': 5115 if (strcmp (s, "UA]") == 0) 5116 tc->symbol_class = XMC_UA; 5117 else if (strcmp (s, "UC]") == 0) 5118 tc->symbol_class = XMC_UC; 5119 break; 5120 case 'X': 5121 if (strcmp (s, "XO]") == 0) 5122 tc->symbol_class = XMC_XO; 5123 break; 5124 } 5125 5126 if (tc->symbol_class == -1) 5127 as_bad (_("Unrecognized symbol suffix")); 5128} 5129 5130/* Set the class of a label based on where it is defined. This 5131 handles symbols without suffixes. Also, move the symbol so that it 5132 follows the csect symbol. */ 5133 5134void 5135ppc_frob_label (symbolS *sym) 5136{ 5137 if (ppc_current_csect != (symbolS *) NULL) 5138 { 5139 if (symbol_get_tc (sym)->symbol_class == -1) 5140 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; 5141 5142 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5143 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, 5144 &symbol_rootP, &symbol_lastP); 5145 symbol_get_tc (ppc_current_csect)->within = sym; 5146 } 5147 5148#ifdef OBJ_ELF 5149 dwarf2_emit_label (sym); 5150#endif 5151} 5152 5153/* This variable is set by ppc_frob_symbol if any absolute symbols are 5154 seen. It tells ppc_adjust_symtab whether it needs to look through 5155 the symbols. */ 5156 5157static bfd_boolean ppc_saw_abs; 5158 5159/* Change the name of a symbol just before writing it out. Set the 5160 real name if the .rename pseudo-op was used. Otherwise, remove any 5161 class suffix. Return 1 if the symbol should not be included in the 5162 symbol table. */ 5163 5164int 5165ppc_frob_symbol (symbolS *sym) 5166{ 5167 static symbolS *ppc_last_function; 5168 static symbolS *set_end; 5169 5170 /* Discard symbols that should not be included in the output symbol 5171 table. */ 5172 if (! symbol_used_in_reloc_p (sym) 5173 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 5174 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 5175 && ! symbol_get_tc (sym)->output 5176 && S_GET_STORAGE_CLASS (sym) != C_FILE))) 5177 return 1; 5178 5179 /* This one will disappear anyway. Don't make a csect sym for it. */ 5180 if (sym == abs_section_sym) 5181 return 1; 5182 5183 if (symbol_get_tc (sym)->real_name != (char *) NULL) 5184 S_SET_NAME (sym, symbol_get_tc (sym)->real_name); 5185 else 5186 { 5187 const char *name; 5188 const char *s; 5189 5190 name = S_GET_NAME (sym); 5191 s = strchr (name, '['); 5192 if (s != (char *) NULL) 5193 { 5194 unsigned int len; 5195 char *snew; 5196 5197 len = s - name; 5198 snew = xmalloc (len + 1); 5199 memcpy (snew, name, len); 5200 snew[len] = '\0'; 5201 5202 S_SET_NAME (sym, snew); 5203 } 5204 } 5205 5206 if (set_end != (symbolS *) NULL) 5207 { 5208 SA_SET_SYM_ENDNDX (set_end, sym); 5209 set_end = NULL; 5210 } 5211 5212 if (SF_GET_FUNCTION (sym)) 5213 { 5214 if (ppc_last_function != (symbolS *) NULL) 5215 as_bad (_("two .function pseudo-ops with no intervening .ef")); 5216 ppc_last_function = sym; 5217 if (symbol_get_tc (sym)->size != (symbolS *) NULL) 5218 { 5219 resolve_symbol_value (symbol_get_tc (sym)->size); 5220 SA_SET_SYM_FSIZE (sym, 5221 (long) S_GET_VALUE (symbol_get_tc (sym)->size)); 5222 } 5223 } 5224 else if (S_GET_STORAGE_CLASS (sym) == C_FCN 5225 && strcmp (S_GET_NAME (sym), ".ef") == 0) 5226 { 5227 if (ppc_last_function == (symbolS *) NULL) 5228 as_bad (_(".ef with no preceding .function")); 5229 else 5230 { 5231 set_end = ppc_last_function; 5232 ppc_last_function = NULL; 5233 5234 /* We don't have a C_EFCN symbol, but we need to force the 5235 COFF backend to believe that it has seen one. */ 5236 coff_last_function = NULL; 5237 } 5238 } 5239 5240 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 5241 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 5242 && S_GET_STORAGE_CLASS (sym) != C_FILE 5243 && S_GET_STORAGE_CLASS (sym) != C_FCN 5244 && S_GET_STORAGE_CLASS (sym) != C_BLOCK 5245 && S_GET_STORAGE_CLASS (sym) != C_BSTAT 5246 && S_GET_STORAGE_CLASS (sym) != C_ESTAT 5247 && S_GET_STORAGE_CLASS (sym) != C_BINCL 5248 && S_GET_STORAGE_CLASS (sym) != C_EINCL 5249 && S_GET_SEGMENT (sym) != ppc_coff_debug_section) 5250 S_SET_STORAGE_CLASS (sym, C_HIDEXT); 5251 5252 if (S_GET_STORAGE_CLASS (sym) == C_EXT 5253 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT 5254 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) 5255 { 5256 int i; 5257 union internal_auxent *a; 5258 5259 /* Create a csect aux. */ 5260 i = S_GET_NUMBER_AUXILIARY (sym); 5261 S_SET_NUMBER_AUXILIARY (sym, i + 1); 5262 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; 5263 if (symbol_get_tc (sym)->symbol_class == XMC_TC0) 5264 { 5265 /* This is the TOC table. */ 5266 know (strcmp (S_GET_NAME (sym), "TOC") == 0); 5267 a->x_csect.x_scnlen.l = 0; 5268 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 5269 } 5270 else if (symbol_get_tc (sym)->subseg != 0) 5271 { 5272 /* This is a csect symbol. x_scnlen is the size of the 5273 csect. */ 5274 if (symbol_get_tc (sym)->next == (symbolS *) NULL) 5275 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, 5276 S_GET_SEGMENT (sym)) 5277 - S_GET_VALUE (sym)); 5278 else 5279 { 5280 resolve_symbol_value (symbol_get_tc (sym)->next); 5281 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) 5282 - S_GET_VALUE (sym)); 5283 } 5284 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; 5285 } 5286 else if (S_GET_SEGMENT (sym) == bss_section) 5287 { 5288 /* This is a common symbol. */ 5289 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; 5290 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; 5291 if (S_IS_EXTERNAL (sym)) 5292 symbol_get_tc (sym)->symbol_class = XMC_RW; 5293 else 5294 symbol_get_tc (sym)->symbol_class = XMC_BS; 5295 } 5296 else if (S_GET_SEGMENT (sym) == absolute_section) 5297 { 5298 /* This is an absolute symbol. The csect will be created by 5299 ppc_adjust_symtab. */ 5300 ppc_saw_abs = TRUE; 5301 a->x_csect.x_smtyp = XTY_LD; 5302 if (symbol_get_tc (sym)->symbol_class == -1) 5303 symbol_get_tc (sym)->symbol_class = XMC_XO; 5304 } 5305 else if (! S_IS_DEFINED (sym)) 5306 { 5307 /* This is an external symbol. */ 5308 a->x_csect.x_scnlen.l = 0; 5309 a->x_csect.x_smtyp = XTY_ER; 5310 } 5311 else if (symbol_get_tc (sym)->symbol_class == XMC_TC) 5312 { 5313 symbolS *next; 5314 5315 /* This is a TOC definition. x_scnlen is the size of the 5316 TOC entry. */ 5317 next = symbol_next (sym); 5318 while (symbol_get_tc (next)->symbol_class == XMC_TC0) 5319 next = symbol_next (next); 5320 if (next == (symbolS *) NULL 5321 || symbol_get_tc (next)->symbol_class != XMC_TC) 5322 { 5323 if (ppc_after_toc_frag == (fragS *) NULL) 5324 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, 5325 data_section) 5326 - S_GET_VALUE (sym)); 5327 else 5328 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address 5329 - S_GET_VALUE (sym)); 5330 } 5331 else 5332 { 5333 resolve_symbol_value (next); 5334 a->x_csect.x_scnlen.l = (S_GET_VALUE (next) 5335 - S_GET_VALUE (sym)); 5336 } 5337 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 5338 } 5339 else 5340 { 5341 symbolS *csect; 5342 5343 /* This is a normal symbol definition. x_scnlen is the 5344 symbol index of the containing csect. */ 5345 if (S_GET_SEGMENT (sym) == text_section) 5346 csect = ppc_text_csects; 5347 else if (S_GET_SEGMENT (sym) == data_section) 5348 csect = ppc_data_csects; 5349 else 5350 abort (); 5351 5352 /* Skip the initial dummy symbol. */ 5353 csect = symbol_get_tc (csect)->next; 5354 5355 if (csect == (symbolS *) NULL) 5356 { 5357 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); 5358 a->x_csect.x_scnlen.l = 0; 5359 } 5360 else 5361 { 5362 while (symbol_get_tc (csect)->next != (symbolS *) NULL) 5363 { 5364 resolve_symbol_value (symbol_get_tc (csect)->next); 5365 if (S_GET_VALUE (symbol_get_tc (csect)->next) 5366 > S_GET_VALUE (sym)) 5367 break; 5368 csect = symbol_get_tc (csect)->next; 5369 } 5370 5371 a->x_csect.x_scnlen.p = 5372 coffsymbol (symbol_get_bfdsym (csect))->native; 5373 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = 5374 1; 5375 } 5376 a->x_csect.x_smtyp = XTY_LD; 5377 } 5378 5379 a->x_csect.x_parmhash = 0; 5380 a->x_csect.x_snhash = 0; 5381 if (symbol_get_tc (sym)->symbol_class == -1) 5382 a->x_csect.x_smclas = XMC_PR; 5383 else 5384 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; 5385 a->x_csect.x_stab = 0; 5386 a->x_csect.x_snstab = 0; 5387 5388 /* Don't let the COFF backend resort these symbols. */ 5389 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; 5390 } 5391 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) 5392 { 5393 /* We want the value to be the symbol index of the referenced 5394 csect symbol. BFD will do that for us if we set the right 5395 flags. */ 5396 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); 5397 combined_entry_type *c = coffsymbol (bsym)->native; 5398 5399 S_SET_VALUE (sym, (valueT) (size_t) c); 5400 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; 5401 } 5402 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 5403 { 5404 symbolS *block; 5405 symbolS *csect; 5406 5407 /* The value is the offset from the enclosing csect. */ 5408 block = symbol_get_tc (sym)->within; 5409 csect = symbol_get_tc (block)->within; 5410 resolve_symbol_value (csect); 5411 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect)); 5412 } 5413 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL 5414 || S_GET_STORAGE_CLASS (sym) == C_EINCL) 5415 { 5416 /* We want the value to be a file offset into the line numbers. 5417 BFD will do that for us if we set the right flags. We have 5418 already set the value correctly. */ 5419 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; 5420 } 5421 5422 return 0; 5423} 5424 5425/* Adjust the symbol table. This creates csect symbols for all 5426 absolute symbols. */ 5427 5428void 5429ppc_adjust_symtab (void) 5430{ 5431 symbolS *sym; 5432 5433 if (! ppc_saw_abs) 5434 return; 5435 5436 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) 5437 { 5438 symbolS *csect; 5439 int i; 5440 union internal_auxent *a; 5441 5442 if (S_GET_SEGMENT (sym) != absolute_section) 5443 continue; 5444 5445 csect = symbol_create (".abs[XO]", absolute_section, 5446 S_GET_VALUE (sym), &zero_address_frag); 5447 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); 5448 S_SET_STORAGE_CLASS (csect, C_HIDEXT); 5449 i = S_GET_NUMBER_AUXILIARY (csect); 5450 S_SET_NUMBER_AUXILIARY (csect, i + 1); 5451 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; 5452 a->x_csect.x_scnlen.l = 0; 5453 a->x_csect.x_smtyp = XTY_SD; 5454 a->x_csect.x_parmhash = 0; 5455 a->x_csect.x_snhash = 0; 5456 a->x_csect.x_smclas = XMC_XO; 5457 a->x_csect.x_stab = 0; 5458 a->x_csect.x_snstab = 0; 5459 5460 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); 5461 5462 i = S_GET_NUMBER_AUXILIARY (sym); 5463 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; 5464 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; 5465 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; 5466 } 5467 5468 ppc_saw_abs = FALSE; 5469} 5470 5471/* Set the VMA for a section. This is called on all the sections in 5472 turn. */ 5473 5474void 5475ppc_frob_section (asection *sec) 5476{ 5477 static bfd_vma vma = 0; 5478 5479 vma = md_section_align (sec, vma); 5480 bfd_set_section_vma (stdoutput, sec, vma); 5481 vma += bfd_section_size (stdoutput, sec); 5482} 5483 5484#endif /* OBJ_XCOFF */ 5485 5486char * 5487md_atof (int type, char *litp, int *sizep) 5488{ 5489 return ieee_md_atof (type, litp, sizep, target_big_endian); 5490} 5491 5492/* Write a value out to the object file, using the appropriate 5493 endianness. */ 5494 5495void 5496md_number_to_chars (char *buf, valueT val, int n) 5497{ 5498 if (target_big_endian) 5499 number_to_chars_bigendian (buf, val, n); 5500 else 5501 number_to_chars_littleendian (buf, val, n); 5502} 5503 5504/* Align a section (I don't know why this is machine dependent). */ 5505 5506valueT 5507md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) 5508{ 5509#ifdef OBJ_ELF 5510 return addr; 5511#else 5512 int align = bfd_get_section_alignment (stdoutput, seg); 5513 5514 return ((addr + (1 << align) - 1) & (-1 << align)); 5515#endif 5516} 5517 5518/* We don't have any form of relaxing. */ 5519 5520int 5521md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 5522 asection *seg ATTRIBUTE_UNUSED) 5523{ 5524 abort (); 5525 return 0; 5526} 5527 5528/* Convert a machine dependent frag. We never generate these. */ 5529 5530void 5531md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 5532 asection *sec ATTRIBUTE_UNUSED, 5533 fragS *fragp ATTRIBUTE_UNUSED) 5534{ 5535 abort (); 5536} 5537 5538/* We have no need to default values of symbols. */ 5539 5540symbolS * 5541md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 5542{ 5543 return 0; 5544} 5545 5546/* Functions concerning relocs. */ 5547 5548/* The location from which a PC relative jump should be calculated, 5549 given a PC relative reloc. */ 5550 5551long 5552md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) 5553{ 5554 return fixp->fx_frag->fr_address + fixp->fx_where; 5555} 5556 5557#ifdef OBJ_XCOFF 5558 5559/* This is called to see whether a fixup should be adjusted to use a 5560 section symbol. We take the opportunity to change a fixup against 5561 a symbol in the TOC subsegment into a reloc against the 5562 corresponding .tc symbol. */ 5563 5564int 5565ppc_fix_adjustable (fixS *fix) 5566{ 5567 valueT val = resolve_symbol_value (fix->fx_addsy); 5568 segT symseg = S_GET_SEGMENT (fix->fx_addsy); 5569 TC_SYMFIELD_TYPE *tc; 5570 5571 if (symseg == absolute_section) 5572 return 0; 5573 5574 if (ppc_toc_csect != (symbolS *) NULL 5575 && fix->fx_addsy != ppc_toc_csect 5576 && symseg == data_section 5577 && val >= ppc_toc_frag->fr_address 5578 && (ppc_after_toc_frag == (fragS *) NULL 5579 || val < ppc_after_toc_frag->fr_address)) 5580 { 5581 symbolS *sy; 5582 5583 for (sy = symbol_next (ppc_toc_csect); 5584 sy != (symbolS *) NULL; 5585 sy = symbol_next (sy)) 5586 { 5587 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); 5588 5589 if (sy_tc->symbol_class == XMC_TC0) 5590 continue; 5591 if (sy_tc->symbol_class != XMC_TC) 5592 break; 5593 if (val == resolve_symbol_value (sy)) 5594 { 5595 fix->fx_addsy = sy; 5596 fix->fx_addnumber = val - ppc_toc_frag->fr_address; 5597 return 0; 5598 } 5599 } 5600 5601 as_bad_where (fix->fx_file, fix->fx_line, 5602 _("symbol in .toc does not match any .tc")); 5603 } 5604 5605 /* Possibly adjust the reloc to be against the csect. */ 5606 tc = symbol_get_tc (fix->fx_addsy); 5607 if (tc->subseg == 0 5608 && tc->symbol_class != XMC_TC0 5609 && tc->symbol_class != XMC_TC 5610 && symseg != bss_section 5611 /* Don't adjust if this is a reloc in the toc section. */ 5612 && (symseg != data_section 5613 || ppc_toc_csect == NULL 5614 || val < ppc_toc_frag->fr_address 5615 || (ppc_after_toc_frag != NULL 5616 && val >= ppc_after_toc_frag->fr_address))) 5617 { 5618 symbolS *csect; 5619 symbolS *next_csect; 5620 5621 if (symseg == text_section) 5622 csect = ppc_text_csects; 5623 else if (symseg == data_section) 5624 csect = ppc_data_csects; 5625 else 5626 abort (); 5627 5628 /* Skip the initial dummy symbol. */ 5629 csect = symbol_get_tc (csect)->next; 5630 5631 if (csect != (symbolS *) NULL) 5632 { 5633 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL 5634 && (symbol_get_frag (next_csect)->fr_address <= val)) 5635 { 5636 /* If the csect address equals the symbol value, then we 5637 have to look through the full symbol table to see 5638 whether this is the csect we want. Note that we will 5639 only get here if the csect has zero length. */ 5640 if (symbol_get_frag (csect)->fr_address == val 5641 && S_GET_VALUE (csect) == val) 5642 { 5643 symbolS *scan; 5644 5645 for (scan = symbol_next (csect); 5646 scan != NULL; 5647 scan = symbol_next (scan)) 5648 { 5649 if (symbol_get_tc (scan)->subseg != 0) 5650 break; 5651 if (scan == fix->fx_addsy) 5652 break; 5653 } 5654 5655 /* If we found the symbol before the next csect 5656 symbol, then this is the csect we want. */ 5657 if (scan == fix->fx_addsy) 5658 break; 5659 } 5660 5661 csect = next_csect; 5662 } 5663 5664 fix->fx_offset += val - symbol_get_frag (csect)->fr_address; 5665 fix->fx_addsy = csect; 5666 } 5667 return 0; 5668 } 5669 5670 /* Adjust a reloc against a .lcomm symbol to be against the base 5671 .lcomm. */ 5672 if (symseg == bss_section 5673 && ! S_IS_EXTERNAL (fix->fx_addsy)) 5674 { 5675 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; 5676 5677 fix->fx_offset += val - resolve_symbol_value (sy); 5678 fix->fx_addsy = sy; 5679 } 5680 5681 return 0; 5682} 5683 5684/* A reloc from one csect to another must be kept. The assembler 5685 will, of course, keep relocs between sections, and it will keep 5686 absolute relocs, but we need to force it to keep PC relative relocs 5687 between two csects in the same section. */ 5688 5689int 5690ppc_force_relocation (fixS *fix) 5691{ 5692 /* At this point fix->fx_addsy should already have been converted to 5693 a csect symbol. If the csect does not include the fragment, then 5694 we need to force the relocation. */ 5695 if (fix->fx_pcrel 5696 && fix->fx_addsy != NULL 5697 && symbol_get_tc (fix->fx_addsy)->subseg != 0 5698 && ((symbol_get_frag (fix->fx_addsy)->fr_address 5699 > fix->fx_frag->fr_address) 5700 || (symbol_get_tc (fix->fx_addsy)->next != NULL 5701 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address 5702 <= fix->fx_frag->fr_address)))) 5703 return 1; 5704 5705 return generic_force_reloc (fix); 5706} 5707 5708#endif /* OBJ_XCOFF */ 5709 5710#ifdef OBJ_ELF 5711/* If this function returns non-zero, it guarantees that a relocation 5712 will be emitted for a fixup. */ 5713 5714int 5715ppc_force_relocation (fixS *fix) 5716{ 5717 /* Branch prediction relocations must force a relocation, as must 5718 the vtable description relocs. */ 5719 switch (fix->fx_r_type) 5720 { 5721 case BFD_RELOC_PPC_B16_BRTAKEN: 5722 case BFD_RELOC_PPC_B16_BRNTAKEN: 5723 case BFD_RELOC_PPC_BA16_BRTAKEN: 5724 case BFD_RELOC_PPC_BA16_BRNTAKEN: 5725 case BFD_RELOC_24_PLT_PCREL: 5726 case BFD_RELOC_PPC64_TOC: 5727 return 1; 5728 default: 5729 break; 5730 } 5731 5732 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS 5733 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) 5734 return 1; 5735 5736 return generic_force_reloc (fix); 5737} 5738 5739int 5740ppc_fix_adjustable (fixS *fix) 5741{ 5742 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF 5743 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF 5744 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF 5745 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 5746 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS 5747 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS 5748 && fix->fx_r_type != BFD_RELOC_GPREL16 5749 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT 5750 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY 5751 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS 5752 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); 5753} 5754#endif 5755 5756/* Implement HANDLE_ALIGN. This writes the NOP pattern into an 5757 rs_align_code frag. */ 5758 5759void 5760ppc_handle_align (struct frag *fragP) 5761{ 5762 valueT count = (fragP->fr_next->fr_address 5763 - (fragP->fr_address + fragP->fr_fix)); 5764 5765 if (count != 0 && (count & 3) == 0) 5766 { 5767 char *dest = fragP->fr_literal + fragP->fr_fix; 5768 5769 fragP->fr_var = 4; 5770 5771 if (count > 4 * nop_limit && count < 0x2000000) 5772 { 5773 struct frag *rest; 5774 5775 /* Make a branch, then follow with nops. Insert another 5776 frag to handle the nops. */ 5777 md_number_to_chars (dest, 0x48000000 + count, 4); 5778 count -= 4; 5779 if (count == 0) 5780 return; 5781 5782 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); 5783 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); 5784 fragP->fr_next = rest; 5785 fragP = rest; 5786 rest->fr_address += rest->fr_fix + 4; 5787 rest->fr_fix = 0; 5788 /* If we leave the next frag as rs_align_code we'll come here 5789 again, resulting in a bunch of branches rather than a 5790 branch followed by nops. */ 5791 rest->fr_type = rs_align; 5792 dest = rest->fr_literal; 5793 } 5794 5795 md_number_to_chars (dest, 0x60000000, 4); 5796 5797 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0 5798 || (ppc_cpu & PPC_OPCODE_POWER7) != 0) 5799 { 5800 /* For power6 and power7, we want the last nop to be a group 5801 terminating one. Do this by inserting an rs_fill frag immediately 5802 after this one, with its address set to the last nop location. 5803 This will automatically reduce the number of nops in the current 5804 frag by one. */ 5805 if (count > 4) 5806 { 5807 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); 5808 5809 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); 5810 group_nop->fr_address = group_nop->fr_next->fr_address - 4; 5811 group_nop->fr_fix = 0; 5812 group_nop->fr_offset = 1; 5813 group_nop->fr_type = rs_fill; 5814 fragP->fr_next = group_nop; 5815 dest = group_nop->fr_literal; 5816 } 5817 5818 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0) 5819 /* power7 group terminating nop: "ori 2,2,0". */ 5820 md_number_to_chars (dest, 0x60420000, 4); 5821 else 5822 /* power6 group terminating nop: "ori 1,1,0". */ 5823 md_number_to_chars (dest, 0x60210000, 4); 5824 } 5825 } 5826} 5827 5828/* Apply a fixup to the object code. This is called for all the 5829 fixups we generated by the call to fix_new_exp, above. In the call 5830 above we used a reloc code which was the largest legal reloc code 5831 plus the operand index. Here we undo that to recover the operand 5832 index. At this point all symbol values should be fully resolved, 5833 and we attempt to completely resolve the reloc. If we can not do 5834 that, we determine the correct reloc code and put it back in the 5835 fixup. */ 5836 5837void 5838md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 5839{ 5840 valueT value = * valP; 5841 5842#ifdef OBJ_ELF 5843 if (fixP->fx_addsy != NULL) 5844 { 5845 /* Hack around bfd_install_relocation brain damage. */ 5846 if (fixP->fx_pcrel) 5847 value += fixP->fx_frag->fr_address + fixP->fx_where; 5848 } 5849 else 5850 fixP->fx_done = 1; 5851#else 5852 /* FIXME FIXME FIXME: The value we are passed in *valP includes 5853 the symbol values. If we are doing this relocation the code in 5854 write.c is going to call bfd_install_relocation, which is also 5855 going to use the symbol value. That means that if the reloc is 5856 fully resolved we want to use *valP since bfd_install_relocation is 5857 not being used. 5858 However, if the reloc is not fully resolved we do not want to 5859 use *valP, and must use fx_offset instead. If the relocation 5860 is PC-relative, we then need to re-apply md_pcrel_from_section 5861 to this new relocation value. */ 5862 if (fixP->fx_addsy == (symbolS *) NULL) 5863 fixP->fx_done = 1; 5864 5865 else 5866 { 5867 value = fixP->fx_offset; 5868 if (fixP->fx_pcrel) 5869 value -= md_pcrel_from_section (fixP, seg); 5870 } 5871#endif 5872 5873 if (fixP->fx_subsy != (symbolS *) NULL) 5874 { 5875 /* We can't actually support subtracting a symbol. */ 5876 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); 5877 } 5878 5879 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) 5880 { 5881 int opindex; 5882 const struct powerpc_operand *operand; 5883 char *where; 5884 unsigned long insn; 5885 5886 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; 5887 5888 operand = &powerpc_operands[opindex]; 5889 5890#ifdef OBJ_XCOFF 5891 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol 5892 does not generate a reloc. It uses the offset of `sym' within its 5893 csect. Other usages, such as `.long sym', generate relocs. This 5894 is the documented behaviour of non-TOC symbols. */ 5895 if ((operand->flags & PPC_OPERAND_PARENS) != 0 5896 && (operand->bitm & 0xfff0) == 0xfff0 5897 && operand->shift == 0 5898 && (operand->insert == NULL || ppc_obj64) 5899 && fixP->fx_addsy != NULL 5900 && symbol_get_tc (fixP->fx_addsy)->subseg != 0 5901 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC 5902 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 5903 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) 5904 { 5905 value = fixP->fx_offset; 5906 fixP->fx_done = 1; 5907 } 5908#endif 5909 5910 /* Fetch the instruction, insert the fully resolved operand 5911 value, and stuff the instruction back again. */ 5912 where = fixP->fx_frag->fr_literal + fixP->fx_where; 5913 if (target_big_endian) 5914 insn = bfd_getb32 ((unsigned char *) where); 5915 else 5916 insn = bfd_getl32 ((unsigned char *) where); 5917 insn = ppc_insert_operand (insn, operand, (offsetT) value, 5918 fixP->tc_fix_data.ppc_cpu, 5919 fixP->fx_file, fixP->fx_line); 5920 if (target_big_endian) 5921 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); 5922 else 5923 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); 5924 5925 if (fixP->fx_done) 5926 /* Nothing else to do here. */ 5927 return; 5928 5929 gas_assert (fixP->fx_addsy != NULL); 5930 5931 /* Determine a BFD reloc value based on the operand information. 5932 We are only prepared to turn a few of the operands into 5933 relocs. */ 5934 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 5935 && operand->bitm == 0x3fffffc 5936 && operand->shift == 0) 5937 fixP->fx_r_type = BFD_RELOC_PPC_B26; 5938 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 5939 && operand->bitm == 0xfffc 5940 && operand->shift == 0) 5941 { 5942 fixP->fx_r_type = BFD_RELOC_PPC_B16; 5943#ifdef OBJ_XCOFF 5944 fixP->fx_size = 2; 5945 if (target_big_endian) 5946 fixP->fx_where += 2; 5947#endif 5948 } 5949 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 5950 && operand->bitm == 0x3fffffc 5951 && operand->shift == 0) 5952 fixP->fx_r_type = BFD_RELOC_PPC_BA26; 5953 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 5954 && operand->bitm == 0xfffc 5955 && operand->shift == 0) 5956 { 5957 fixP->fx_r_type = BFD_RELOC_PPC_BA16; 5958#ifdef OBJ_XCOFF 5959 fixP->fx_size = 2; 5960 if (target_big_endian) 5961 fixP->fx_where += 2; 5962#endif 5963 } 5964#if defined (OBJ_XCOFF) || defined (OBJ_ELF) 5965 else if ((operand->flags & PPC_OPERAND_PARENS) != 0 5966 && (operand->bitm & 0xfff0) == 0xfff0 5967 && operand->shift == 0) 5968 { 5969 if (ppc_is_toc_sym (fixP->fx_addsy)) 5970 { 5971 fixP->fx_r_type = BFD_RELOC_PPC_TOC16; 5972#ifdef OBJ_ELF 5973 if (ppc_obj64 5974 && (operand->flags & PPC_OPERAND_DS) != 0) 5975 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS; 5976#endif 5977 } 5978 else 5979 { 5980 fixP->fx_r_type = BFD_RELOC_16; 5981#ifdef OBJ_ELF 5982 if (ppc_obj64 5983 && (operand->flags & PPC_OPERAND_DS) != 0) 5984 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS; 5985#endif 5986 } 5987 fixP->fx_size = 2; 5988 if (target_big_endian) 5989 fixP->fx_where += 2; 5990 } 5991#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 5992 else 5993 { 5994 char *sfile; 5995 unsigned int sline; 5996 5997 /* Use expr_symbol_where to see if this is an expression 5998 symbol. */ 5999 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) 6000 as_bad_where (fixP->fx_file, fixP->fx_line, 6001 _("unresolved expression that must be resolved")); 6002 else 6003 as_bad_where (fixP->fx_file, fixP->fx_line, 6004 _("unsupported relocation against %s"), 6005 S_GET_NAME (fixP->fx_addsy)); 6006 fixP->fx_done = 1; 6007 return; 6008 } 6009 } 6010 else 6011 { 6012#ifdef OBJ_ELF 6013 ppc_elf_validate_fix (fixP, seg); 6014#endif 6015 switch (fixP->fx_r_type) 6016 { 6017 case BFD_RELOC_CTOR: 6018 if (ppc_obj64) 6019 goto ctor64; 6020 /* fall through */ 6021 6022 case BFD_RELOC_32: 6023 if (fixP->fx_pcrel) 6024 fixP->fx_r_type = BFD_RELOC_32_PCREL; 6025 /* fall through */ 6026 6027 case BFD_RELOC_RVA: 6028 case BFD_RELOC_32_PCREL: 6029 case BFD_RELOC_PPC_EMB_NADDR32: 6030 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6031 value, 4); 6032 break; 6033 6034 case BFD_RELOC_64: 6035 ctor64: 6036 if (fixP->fx_pcrel) 6037 fixP->fx_r_type = BFD_RELOC_64_PCREL; 6038 /* fall through */ 6039 6040 case BFD_RELOC_64_PCREL: 6041 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6042 value, 8); 6043 break; 6044 6045 case BFD_RELOC_GPREL16: 6046 case BFD_RELOC_16_GOT_PCREL: 6047 case BFD_RELOC_16_GOTOFF: 6048 case BFD_RELOC_LO16_GOTOFF: 6049 case BFD_RELOC_HI16_GOTOFF: 6050 case BFD_RELOC_HI16_S_GOTOFF: 6051 case BFD_RELOC_16_BASEREL: 6052 case BFD_RELOC_LO16_BASEREL: 6053 case BFD_RELOC_HI16_BASEREL: 6054 case BFD_RELOC_HI16_S_BASEREL: 6055 case BFD_RELOC_PPC_EMB_NADDR16: 6056 case BFD_RELOC_PPC_EMB_NADDR16_LO: 6057 case BFD_RELOC_PPC_EMB_NADDR16_HI: 6058 case BFD_RELOC_PPC_EMB_NADDR16_HA: 6059 case BFD_RELOC_PPC_EMB_SDAI16: 6060 case BFD_RELOC_PPC_EMB_SDA2REL: 6061 case BFD_RELOC_PPC_EMB_SDA2I16: 6062 case BFD_RELOC_PPC_EMB_RELSEC16: 6063 case BFD_RELOC_PPC_EMB_RELST_LO: 6064 case BFD_RELOC_PPC_EMB_RELST_HI: 6065 case BFD_RELOC_PPC_EMB_RELST_HA: 6066 case BFD_RELOC_PPC_EMB_RELSDA: 6067 case BFD_RELOC_PPC_TOC16: 6068#ifdef OBJ_ELF 6069 case BFD_RELOC_PPC64_TOC16_LO: 6070 case BFD_RELOC_PPC64_TOC16_HI: 6071 case BFD_RELOC_PPC64_TOC16_HA: 6072#endif 6073 if (fixP->fx_pcrel) 6074 { 6075 if (fixP->fx_addsy != NULL) 6076 as_bad_where (fixP->fx_file, fixP->fx_line, 6077 _("cannot emit PC relative %s relocation against %s"), 6078 bfd_get_reloc_code_name (fixP->fx_r_type), 6079 S_GET_NAME (fixP->fx_addsy)); 6080 else 6081 as_bad_where (fixP->fx_file, fixP->fx_line, 6082 _("cannot emit PC relative %s relocation"), 6083 bfd_get_reloc_code_name (fixP->fx_r_type)); 6084 } 6085 6086 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6087 value, 2); 6088 break; 6089 6090 case BFD_RELOC_16: 6091 if (fixP->fx_pcrel) 6092 fixP->fx_r_type = BFD_RELOC_16_PCREL; 6093 /* fall through */ 6094 6095 case BFD_RELOC_16_PCREL: 6096 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6097 value, 2); 6098 break; 6099 6100 case BFD_RELOC_LO16: 6101 if (fixP->fx_pcrel) 6102 fixP->fx_r_type = BFD_RELOC_LO16_PCREL; 6103 /* fall through */ 6104 6105 case BFD_RELOC_LO16_PCREL: 6106 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6107 value, 2); 6108 break; 6109 6110 /* This case happens when you write, for example, 6111 lis %r3,(L1-L2)@ha 6112 where L1 and L2 are defined later. */ 6113 case BFD_RELOC_HI16: 6114 if (fixP->fx_pcrel) 6115 fixP->fx_r_type = BFD_RELOC_HI16_PCREL; 6116 /* fall through */ 6117 6118 case BFD_RELOC_HI16_PCREL: 6119 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6120 PPC_HI (value), 2); 6121 break; 6122 6123 case BFD_RELOC_HI16_S: 6124 if (fixP->fx_pcrel) 6125 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; 6126 /* fall through */ 6127 6128 case BFD_RELOC_HI16_S_PCREL: 6129 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6130 PPC_HA (value), 2); 6131 break; 6132 6133#ifdef OBJ_XCOFF 6134 case BFD_RELOC_NONE: 6135 break; 6136#endif 6137 6138#ifdef OBJ_ELF 6139 case BFD_RELOC_PPC64_HIGHER: 6140 if (fixP->fx_pcrel) 6141 abort (); 6142 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6143 PPC_HIGHER (value), 2); 6144 break; 6145 6146 case BFD_RELOC_PPC64_HIGHER_S: 6147 if (fixP->fx_pcrel) 6148 abort (); 6149 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6150 PPC_HIGHERA (value), 2); 6151 break; 6152 6153 case BFD_RELOC_PPC64_HIGHEST: 6154 if (fixP->fx_pcrel) 6155 abort (); 6156 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6157 PPC_HIGHEST (value), 2); 6158 break; 6159 6160 case BFD_RELOC_PPC64_HIGHEST_S: 6161 if (fixP->fx_pcrel) 6162 abort (); 6163 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6164 PPC_HIGHESTA (value), 2); 6165 break; 6166 6167 case BFD_RELOC_PPC64_ADDR16_DS: 6168 case BFD_RELOC_PPC64_ADDR16_LO_DS: 6169 case BFD_RELOC_PPC64_GOT16_DS: 6170 case BFD_RELOC_PPC64_GOT16_LO_DS: 6171 case BFD_RELOC_PPC64_PLT16_LO_DS: 6172 case BFD_RELOC_PPC64_SECTOFF_DS: 6173 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 6174 case BFD_RELOC_PPC64_TOC16_DS: 6175 case BFD_RELOC_PPC64_TOC16_LO_DS: 6176 case BFD_RELOC_PPC64_PLTGOT16_DS: 6177 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 6178 if (fixP->fx_pcrel) 6179 abort (); 6180 { 6181 char *where = fixP->fx_frag->fr_literal + fixP->fx_where; 6182 unsigned long val, mask; 6183 6184 if (target_big_endian) 6185 val = bfd_getb32 (where - 2); 6186 else 6187 val = bfd_getl32 (where); 6188 mask = 0xfffc; 6189 /* lq insns reserve the four lsbs. */ 6190 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0 6191 && (val & (0x3f << 26)) == (56u << 26)) 6192 mask = 0xfff0; 6193 val |= value & mask; 6194 if (target_big_endian) 6195 bfd_putb16 ((bfd_vma) val, where); 6196 else 6197 bfd_putl16 ((bfd_vma) val, where); 6198 } 6199 break; 6200 6201 case BFD_RELOC_PPC_B16_BRTAKEN: 6202 case BFD_RELOC_PPC_B16_BRNTAKEN: 6203 case BFD_RELOC_PPC_BA16_BRTAKEN: 6204 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6205 break; 6206 6207 case BFD_RELOC_PPC_TLS: 6208 case BFD_RELOC_PPC_TLSGD: 6209 case BFD_RELOC_PPC_TLSLD: 6210 break; 6211 6212 case BFD_RELOC_PPC_DTPMOD: 6213 case BFD_RELOC_PPC_TPREL16: 6214 case BFD_RELOC_PPC_TPREL16_LO: 6215 case BFD_RELOC_PPC_TPREL16_HI: 6216 case BFD_RELOC_PPC_TPREL16_HA: 6217 case BFD_RELOC_PPC_TPREL: 6218 case BFD_RELOC_PPC_DTPREL16: 6219 case BFD_RELOC_PPC_DTPREL16_LO: 6220 case BFD_RELOC_PPC_DTPREL16_HI: 6221 case BFD_RELOC_PPC_DTPREL16_HA: 6222 case BFD_RELOC_PPC_DTPREL: 6223 case BFD_RELOC_PPC_GOT_TLSGD16: 6224 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 6225 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 6226 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 6227 case BFD_RELOC_PPC_GOT_TLSLD16: 6228 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 6229 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 6230 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 6231 case BFD_RELOC_PPC_GOT_TPREL16: 6232 case BFD_RELOC_PPC_GOT_TPREL16_LO: 6233 case BFD_RELOC_PPC_GOT_TPREL16_HI: 6234 case BFD_RELOC_PPC_GOT_TPREL16_HA: 6235 case BFD_RELOC_PPC_GOT_DTPREL16: 6236 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 6237 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 6238 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 6239 case BFD_RELOC_PPC64_TPREL16_DS: 6240 case BFD_RELOC_PPC64_TPREL16_LO_DS: 6241 case BFD_RELOC_PPC64_TPREL16_HIGHER: 6242 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 6243 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 6244 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 6245 case BFD_RELOC_PPC64_DTPREL16_DS: 6246 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 6247 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 6248 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 6249 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 6250 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 6251 S_SET_THREAD_LOCAL (fixP->fx_addsy); 6252 break; 6253#endif 6254 /* Because SDA21 modifies the register field, the size is set to 4 6255 bytes, rather than 2, so offset it here appropriately. */ 6256 case BFD_RELOC_PPC_EMB_SDA21: 6257 if (fixP->fx_pcrel) 6258 abort (); 6259 6260 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where 6261 + ((target_big_endian) ? 2 : 0), 6262 value, 2); 6263 break; 6264 6265 case BFD_RELOC_8: 6266 if (fixP->fx_pcrel) 6267 { 6268 /* This can occur if there is a bug in the input assembler, eg: 6269 ".byte <undefined_symbol> - ." */ 6270 if (fixP->fx_addsy) 6271 as_bad (_("Unable to handle reference to symbol %s"), 6272 S_GET_NAME (fixP->fx_addsy)); 6273 else 6274 as_bad (_("Unable to resolve expression")); 6275 fixP->fx_done = 1; 6276 } 6277 else 6278 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 6279 value, 1); 6280 break; 6281 6282 case BFD_RELOC_24_PLT_PCREL: 6283 case BFD_RELOC_PPC_LOCAL24PC: 6284 if (!fixP->fx_pcrel && !fixP->fx_done) 6285 abort (); 6286 6287 if (fixP->fx_done) 6288 { 6289 char *where; 6290 unsigned long insn; 6291 6292 /* Fetch the instruction, insert the fully resolved operand 6293 value, and stuff the instruction back again. */ 6294 where = fixP->fx_frag->fr_literal + fixP->fx_where; 6295 if (target_big_endian) 6296 insn = bfd_getb32 ((unsigned char *) where); 6297 else 6298 insn = bfd_getl32 ((unsigned char *) where); 6299 if ((value & 3) != 0) 6300 as_bad_where (fixP->fx_file, fixP->fx_line, 6301 _("must branch to an address a multiple of 4")); 6302 if ((offsetT) value < -0x40000000 6303 || (offsetT) value >= 0x40000000) 6304 as_bad_where (fixP->fx_file, fixP->fx_line, 6305 _("@local or @plt branch destination is too far away, %ld bytes"), 6306 (long) value); 6307 insn = insn | (value & 0x03fffffc); 6308 if (target_big_endian) 6309 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); 6310 else 6311 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); 6312 } 6313 break; 6314 6315 case BFD_RELOC_VTABLE_INHERIT: 6316 fixP->fx_done = 0; 6317 if (fixP->fx_addsy 6318 && !S_IS_DEFINED (fixP->fx_addsy) 6319 && !S_IS_WEAK (fixP->fx_addsy)) 6320 S_SET_WEAK (fixP->fx_addsy); 6321 break; 6322 6323 case BFD_RELOC_VTABLE_ENTRY: 6324 fixP->fx_done = 0; 6325 break; 6326 6327#ifdef OBJ_ELF 6328 /* Generated by reference to `sym@tocbase'. The sym is 6329 ignored by the linker. */ 6330 case BFD_RELOC_PPC64_TOC: 6331 fixP->fx_done = 0; 6332 break; 6333#endif 6334 default: 6335 fprintf (stderr, 6336 _("Gas failure, reloc value %d\n"), fixP->fx_r_type); 6337 fflush (stderr); 6338 abort (); 6339 } 6340 } 6341 6342#ifdef OBJ_ELF 6343 fixP->fx_addnumber = value; 6344 6345 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately 6346 from the section contents. If we are going to be emitting a reloc 6347 then the section contents are immaterial, so don't warn if they 6348 happen to overflow. Leave such warnings to ld. */ 6349 if (!fixP->fx_done) 6350 fixP->fx_no_overflow = 1; 6351#else 6352 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) 6353 fixP->fx_addnumber = 0; 6354 else 6355 { 6356#ifdef TE_PE 6357 fixP->fx_addnumber = 0; 6358#else 6359 /* We want to use the offset within the toc, not the actual VMA 6360 of the symbol. */ 6361 fixP->fx_addnumber = 6362 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) 6363 - S_GET_VALUE (ppc_toc_csect); 6364#endif 6365 } 6366#endif 6367} 6368 6369/* Generate a reloc for a fixup. */ 6370 6371arelent * 6372tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 6373{ 6374 arelent *reloc; 6375 6376 reloc = (arelent *) xmalloc (sizeof (arelent)); 6377 6378 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 6379 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 6380 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 6381 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 6382 if (reloc->howto == (reloc_howto_type *) NULL) 6383 { 6384 as_bad_where (fixp->fx_file, fixp->fx_line, 6385 _("reloc %d not supported by object file format"), 6386 (int) fixp->fx_r_type); 6387 return NULL; 6388 } 6389 reloc->addend = fixp->fx_addnumber; 6390 6391 return reloc; 6392} 6393 6394void 6395ppc_cfi_frame_initial_instructions (void) 6396{ 6397 cfi_add_CFA_def_cfa (1, 0); 6398} 6399 6400int 6401tc_ppc_regname_to_dw2regnum (char *regname) 6402{ 6403 unsigned int regnum = -1; 6404 unsigned int i; 6405 const char *p; 6406 char *q; 6407 static struct { char *name; int dw2regnum; } regnames[] = 6408 { 6409 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, 6410 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, 6411 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, 6412 { "spe_acc", 111 }, { "spefscr", 112 } 6413 }; 6414 6415 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 6416 if (strcmp (regnames[i].name, regname) == 0) 6417 return regnames[i].dw2regnum; 6418 6419 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') 6420 { 6421 p = regname + 1 + (regname[1] == '.'); 6422 regnum = strtoul (p, &q, 10); 6423 if (p == q || *q || regnum >= 32) 6424 return -1; 6425 if (regname[0] == 'f') 6426 regnum += 32; 6427 else if (regname[0] == 'v') 6428 regnum += 77; 6429 } 6430 else if (regname[0] == 'c' && regname[1] == 'r') 6431 { 6432 p = regname + 2 + (regname[2] == '.'); 6433 if (p[0] < '0' || p[0] > '7' || p[1]) 6434 return -1; 6435 regnum = p[0] - '0' + 68; 6436 } 6437 return regnum; 6438} 6439