1//===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This class wraps target description classes used by the various code 11// generation TableGen backends. This makes it easier to access the data and 12// provides a single place that needs to check it for validity. All of these 13// classes throw exceptions on error conditions. 14// 15//===----------------------------------------------------------------------===// 16 17#include "CodeGenTarget.h" 18#include "CodeGenIntrinsics.h" 19#include "CodeGenSchedule.h" 20#include "llvm/TableGen/Record.h" 21#include "llvm/ADT/StringExtras.h" 22#include "llvm/ADT/STLExtras.h" 23#include "llvm/Support/CommandLine.h" 24#include <algorithm> 25using namespace llvm; 26 27static cl::opt<unsigned> 28AsmParserNum("asmparsernum", cl::init(0), 29 cl::desc("Make -gen-asm-parser emit assembly parser #N")); 30 31static cl::opt<unsigned> 32AsmWriterNum("asmwriternum", cl::init(0), 33 cl::desc("Make -gen-asm-writer emit assembly writer #N")); 34 35/// getValueType - Return the MVT::SimpleValueType that the specified TableGen 36/// record corresponds to. 37MVT::SimpleValueType llvm::getValueType(Record *Rec) { 38 return (MVT::SimpleValueType)Rec->getValueAsInt("Value"); 39} 40 41std::string llvm::getName(MVT::SimpleValueType T) { 42 switch (T) { 43 case MVT::Other: return "UNKNOWN"; 44 case MVT::iPTR: return "TLI.getPointerTy()"; 45 case MVT::iPTRAny: return "TLI.getPointerTy()"; 46 default: return getEnumName(T); 47 } 48} 49 50std::string llvm::getEnumName(MVT::SimpleValueType T) { 51 switch (T) { 52 case MVT::Other: return "MVT::Other"; 53 case MVT::i1: return "MVT::i1"; 54 case MVT::i8: return "MVT::i8"; 55 case MVT::i16: return "MVT::i16"; 56 case MVT::i32: return "MVT::i32"; 57 case MVT::i64: return "MVT::i64"; 58 case MVT::i128: return "MVT::i128"; 59 case MVT::iAny: return "MVT::iAny"; 60 case MVT::fAny: return "MVT::fAny"; 61 case MVT::vAny: return "MVT::vAny"; 62 case MVT::f16: return "MVT::f16"; 63 case MVT::f32: return "MVT::f32"; 64 case MVT::f64: return "MVT::f64"; 65 case MVT::f80: return "MVT::f80"; 66 case MVT::f128: return "MVT::f128"; 67 case MVT::ppcf128: return "MVT::ppcf128"; 68 case MVT::x86mmx: return "MVT::x86mmx"; 69 case MVT::Glue: return "MVT::Glue"; 70 case MVT::isVoid: return "MVT::isVoid"; 71 case MVT::v2i1: return "MVT::v2i1"; 72 case MVT::v4i1: return "MVT::v4i1"; 73 case MVT::v8i1: return "MVT::v8i1"; 74 case MVT::v16i1: return "MVT::v16i1"; 75 case MVT::v2i8: return "MVT::v2i8"; 76 case MVT::v4i8: return "MVT::v4i8"; 77 case MVT::v8i8: return "MVT::v8i8"; 78 case MVT::v16i8: return "MVT::v16i8"; 79 case MVT::v32i8: return "MVT::v32i8"; 80 case MVT::v1i16: return "MVT::v1i16"; 81 case MVT::v2i16: return "MVT::v2i16"; 82 case MVT::v4i16: return "MVT::v4i16"; 83 case MVT::v8i16: return "MVT::v8i16"; 84 case MVT::v16i16: return "MVT::v16i16"; 85 case MVT::v1i32: return "MVT::v1i32"; 86 case MVT::v2i32: return "MVT::v2i32"; 87 case MVT::v4i32: return "MVT::v4i32"; 88 case MVT::v8i32: return "MVT::v8i32"; 89 case MVT::v16i32: return "MVT::v16i32"; 90 case MVT::v1i64: return "MVT::v1i64"; 91 case MVT::v2i64: return "MVT::v2i64"; 92 case MVT::v4i64: return "MVT::v4i64"; 93 case MVT::v8i64: return "MVT::v8i64"; 94 case MVT::v16i64: return "MVT::v16i64"; 95 case MVT::v2f16: return "MVT::v2f16"; 96 case MVT::v2f32: return "MVT::v2f32"; 97 case MVT::v4f32: return "MVT::v4f32"; 98 case MVT::v8f32: return "MVT::v8f32"; 99 case MVT::v2f64: return "MVT::v2f64"; 100 case MVT::v4f64: return "MVT::v4f64"; 101 case MVT::Metadata: return "MVT::Metadata"; 102 case MVT::iPTR: return "MVT::iPTR"; 103 case MVT::iPTRAny: return "MVT::iPTRAny"; 104 case MVT::Untyped: return "MVT::Untyped"; 105 default: llvm_unreachable("ILLEGAL VALUE TYPE!"); 106 } 107} 108 109/// getQualifiedName - Return the name of the specified record, with a 110/// namespace qualifier if the record contains one. 111/// 112std::string llvm::getQualifiedName(const Record *R) { 113 std::string Namespace; 114 if (R->getValue("Namespace")) 115 Namespace = R->getValueAsString("Namespace"); 116 if (Namespace.empty()) return R->getName(); 117 return Namespace + "::" + R->getName(); 118} 119 120 121/// getTarget - Return the current instance of the Target class. 122/// 123CodeGenTarget::CodeGenTarget(RecordKeeper &records) 124 : Records(records), RegBank(0), SchedModels(0) { 125 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); 126 if (Targets.size() == 0) 127 throw std::string("ERROR: No 'Target' subclasses defined!"); 128 if (Targets.size() != 1) 129 throw std::string("ERROR: Multiple subclasses of Target defined!"); 130 TargetRec = Targets[0]; 131} 132 133CodeGenTarget::~CodeGenTarget() { 134 delete RegBank; 135 delete SchedModels; 136} 137 138const std::string &CodeGenTarget::getName() const { 139 return TargetRec->getName(); 140} 141 142std::string CodeGenTarget::getInstNamespace() const { 143 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) { 144 // Make sure not to pick up "TargetOpcode" by accidentally getting 145 // the namespace off the PHI instruction or something. 146 if ((*i)->Namespace != "TargetOpcode") 147 return (*i)->Namespace; 148 } 149 150 return ""; 151} 152 153Record *CodeGenTarget::getInstructionSet() const { 154 return TargetRec->getValueAsDef("InstructionSet"); 155} 156 157 158/// getAsmParser - Return the AssemblyParser definition for this target. 159/// 160Record *CodeGenTarget::getAsmParser() const { 161 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers"); 162 if (AsmParserNum >= LI.size()) 163 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!"; 164 return LI[AsmParserNum]; 165} 166 167/// getAsmParserVariant - Return the AssmblyParserVariant definition for 168/// this target. 169/// 170Record *CodeGenTarget::getAsmParserVariant(unsigned i) const { 171 std::vector<Record*> LI = 172 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 173 if (i >= LI.size()) 174 throw "Target does not have an AsmParserVariant #" + utostr(i) + "!"; 175 return LI[i]; 176} 177 178/// getAsmParserVariantCount - Return the AssmblyParserVariant definition 179/// available for this target. 180/// 181unsigned CodeGenTarget::getAsmParserVariantCount() const { 182 std::vector<Record*> LI = 183 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 184 return LI.size(); 185} 186 187/// getAsmWriter - Return the AssemblyWriter definition for this target. 188/// 189Record *CodeGenTarget::getAsmWriter() const { 190 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters"); 191 if (AsmWriterNum >= LI.size()) 192 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!"; 193 return LI[AsmWriterNum]; 194} 195 196CodeGenRegBank &CodeGenTarget::getRegBank() const { 197 if (!RegBank) 198 RegBank = new CodeGenRegBank(Records); 199 return *RegBank; 200} 201 202void CodeGenTarget::ReadRegAltNameIndices() const { 203 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex"); 204 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord()); 205} 206 207/// getRegisterByName - If there is a register with the specific AsmName, 208/// return it. 209const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const { 210 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName(); 211 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name); 212 if (I == Regs.end()) 213 return 0; 214 return I->second; 215} 216 217std::vector<MVT::SimpleValueType> CodeGenTarget:: 218getRegisterVTs(Record *R) const { 219 const CodeGenRegister *Reg = getRegBank().getReg(R); 220 std::vector<MVT::SimpleValueType> Result; 221 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses(); 222 for (unsigned i = 0, e = RCs.size(); i != e; ++i) { 223 const CodeGenRegisterClass &RC = *RCs[i]; 224 if (RC.contains(Reg)) { 225 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes(); 226 Result.insert(Result.end(), InVTs.begin(), InVTs.end()); 227 } 228 } 229 230 // Remove duplicates. 231 array_pod_sort(Result.begin(), Result.end()); 232 Result.erase(std::unique(Result.begin(), Result.end()), Result.end()); 233 return Result; 234} 235 236 237void CodeGenTarget::ReadLegalValueTypes() const { 238 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses(); 239 for (unsigned i = 0, e = RCs.size(); i != e; ++i) 240 for (unsigned ri = 0, re = RCs[i]->VTs.size(); ri != re; ++ri) 241 LegalValueTypes.push_back(RCs[i]->VTs[ri]); 242 243 // Remove duplicates. 244 std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); 245 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), 246 LegalValueTypes.end()), 247 LegalValueTypes.end()); 248} 249 250CodeGenSchedModels &CodeGenTarget::getSchedModels() const { 251 if (!SchedModels) 252 SchedModels = new CodeGenSchedModels(Records, *this); 253 return *SchedModels; 254} 255 256void CodeGenTarget::ReadInstructions() const { 257 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 258 if (Insts.size() <= 2) 259 throw std::string("No 'Instruction' subclasses defined!"); 260 261 // Parse the instructions defined in the .td file. 262 for (unsigned i = 0, e = Insts.size(); i != e; ++i) 263 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]); 264} 265 266static const CodeGenInstruction * 267GetInstByName(const char *Name, 268 const DenseMap<const Record*, CodeGenInstruction*> &Insts, 269 RecordKeeper &Records) { 270 const Record *Rec = Records.getDef(Name); 271 272 DenseMap<const Record*, CodeGenInstruction*>::const_iterator 273 I = Insts.find(Rec); 274 if (Rec == 0 || I == Insts.end()) 275 throw std::string("Could not find '") + Name + "' instruction!"; 276 return I->second; 277} 278 279namespace { 280/// SortInstByName - Sorting predicate to sort instructions by name. 281/// 282struct SortInstByName { 283 bool operator()(const CodeGenInstruction *Rec1, 284 const CodeGenInstruction *Rec2) const { 285 return Rec1->TheDef->getName() < Rec2->TheDef->getName(); 286 } 287}; 288} 289 290/// getInstructionsByEnumValue - Return all of the instructions defined by the 291/// target, ordered by their enum value. 292void CodeGenTarget::ComputeInstrsByEnum() const { 293 // The ordering here must match the ordering in TargetOpcodes.h. 294 const char *const FixedInstrs[] = { 295 "PHI", 296 "INLINEASM", 297 "PROLOG_LABEL", 298 "EH_LABEL", 299 "GC_LABEL", 300 "KILL", 301 "EXTRACT_SUBREG", 302 "INSERT_SUBREG", 303 "IMPLICIT_DEF", 304 "SUBREG_TO_REG", 305 "COPY_TO_REGCLASS", 306 "DBG_VALUE", 307 "REG_SEQUENCE", 308 "COPY", 309 "BUNDLE", 310 "LIFETIME_START", 311 "LIFETIME_END", 312 0 313 }; 314 const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions(); 315 for (const char *const *p = FixedInstrs; *p; ++p) { 316 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); 317 assert(Instr && "Missing target independent instruction"); 318 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace"); 319 InstrsByEnum.push_back(Instr); 320 } 321 unsigned EndOfPredefines = InstrsByEnum.size(); 322 323 for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator 324 I = Insts.begin(), E = Insts.end(); I != E; ++I) { 325 const CodeGenInstruction *CGI = I->second; 326 if (CGI->Namespace != "TargetOpcode") 327 InstrsByEnum.push_back(CGI); 328 } 329 330 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr"); 331 332 // All of the instructions are now in random order based on the map iteration. 333 // Sort them by name. 334 std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(), 335 SortInstByName()); 336} 337 338 339/// isLittleEndianEncoding - Return whether this target encodes its instruction 340/// in little-endian format, i.e. bits laid out in the order [0..n] 341/// 342bool CodeGenTarget::isLittleEndianEncoding() const { 343 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); 344} 345 346/// guessInstructionProperties - Return true if it's OK to guess instruction 347/// properties instead of raising an error. 348/// 349/// This is configurable as a temporary migration aid. It will eventually be 350/// permanently false. 351bool CodeGenTarget::guessInstructionProperties() const { 352 return getInstructionSet()->getValueAsBit("guessInstructionProperties"); 353} 354 355//===----------------------------------------------------------------------===// 356// ComplexPattern implementation 357// 358ComplexPattern::ComplexPattern(Record *R) { 359 Ty = ::getValueType(R->getValueAsDef("Ty")); 360 NumOperands = R->getValueAsInt("NumOperands"); 361 SelectFunc = R->getValueAsString("SelectFunc"); 362 RootNodes = R->getValueAsListOfDefs("RootNodes"); 363 364 // Parse the properties. 365 Properties = 0; 366 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties"); 367 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 368 if (PropList[i]->getName() == "SDNPHasChain") { 369 Properties |= 1 << SDNPHasChain; 370 } else if (PropList[i]->getName() == "SDNPOptInGlue") { 371 Properties |= 1 << SDNPOptInGlue; 372 } else if (PropList[i]->getName() == "SDNPMayStore") { 373 Properties |= 1 << SDNPMayStore; 374 } else if (PropList[i]->getName() == "SDNPMayLoad") { 375 Properties |= 1 << SDNPMayLoad; 376 } else if (PropList[i]->getName() == "SDNPSideEffect") { 377 Properties |= 1 << SDNPSideEffect; 378 } else if (PropList[i]->getName() == "SDNPMemOperand") { 379 Properties |= 1 << SDNPMemOperand; 380 } else if (PropList[i]->getName() == "SDNPVariadic") { 381 Properties |= 1 << SDNPVariadic; 382 } else if (PropList[i]->getName() == "SDNPWantRoot") { 383 Properties |= 1 << SDNPWantRoot; 384 } else if (PropList[i]->getName() == "SDNPWantParent") { 385 Properties |= 1 << SDNPWantParent; 386 } else { 387 errs() << "Unsupported SD Node property '" << PropList[i]->getName() 388 << "' on ComplexPattern '" << R->getName() << "'!\n"; 389 exit(1); 390 } 391} 392 393//===----------------------------------------------------------------------===// 394// CodeGenIntrinsic Implementation 395//===----------------------------------------------------------------------===// 396 397std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC, 398 bool TargetOnly) { 399 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); 400 401 std::vector<CodeGenIntrinsic> Result; 402 403 for (unsigned i = 0, e = I.size(); i != e; ++i) { 404 bool isTarget = I[i]->getValueAsBit("isTarget"); 405 if (isTarget == TargetOnly) 406 Result.push_back(CodeGenIntrinsic(I[i])); 407 } 408 return Result; 409} 410 411CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { 412 TheDef = R; 413 std::string DefName = R->getName(); 414 ModRef = ReadWriteMem; 415 isOverloaded = false; 416 isCommutative = false; 417 canThrow = false; 418 isNoReturn = false; 419 420 if (DefName.size() <= 4 || 421 std::string(DefName.begin(), DefName.begin() + 4) != "int_") 422 throw "Intrinsic '" + DefName + "' does not start with 'int_'!"; 423 424 EnumName = std::string(DefName.begin()+4, DefName.end()); 425 426 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. 427 GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); 428 429 TargetPrefix = R->getValueAsString("TargetPrefix"); 430 Name = R->getValueAsString("LLVMName"); 431 432 if (Name == "") { 433 // If an explicit name isn't specified, derive one from the DefName. 434 Name = "llvm."; 435 436 for (unsigned i = 0, e = EnumName.size(); i != e; ++i) 437 Name += (EnumName[i] == '_') ? '.' : EnumName[i]; 438 } else { 439 // Verify it starts with "llvm.". 440 if (Name.size() <= 5 || 441 std::string(Name.begin(), Name.begin() + 5) != "llvm.") 442 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!"; 443 } 444 445 // If TargetPrefix is specified, make sure that Name starts with 446 // "llvm.<targetprefix>.". 447 if (!TargetPrefix.empty()) { 448 if (Name.size() < 6+TargetPrefix.size() || 449 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size()) 450 != (TargetPrefix + ".")) 451 throw "Intrinsic '" + DefName + "' does not start with 'llvm." + 452 TargetPrefix + ".'!"; 453 } 454 455 // Parse the list of return types. 456 std::vector<MVT::SimpleValueType> OverloadedVTs; 457 ListInit *TypeList = R->getValueAsListInit("RetTypes"); 458 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 459 Record *TyEl = TypeList->getElementAsRecord(i); 460 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 461 MVT::SimpleValueType VT; 462 if (TyEl->isSubClassOf("LLVMMatchType")) { 463 unsigned MatchTy = TyEl->getValueAsInt("Number"); 464 assert(MatchTy < OverloadedVTs.size() && 465 "Invalid matching number!"); 466 VT = OverloadedVTs[MatchTy]; 467 // It only makes sense to use the extended and truncated vector element 468 // variants with iAny types; otherwise, if the intrinsic is not 469 // overloaded, all the types can be specified directly. 470 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 471 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 472 VT == MVT::iAny || VT == MVT::vAny) && 473 "Expected iAny or vAny type"); 474 } else { 475 VT = getValueType(TyEl->getValueAsDef("VT")); 476 } 477 if (EVT(VT).isOverloaded()) { 478 OverloadedVTs.push_back(VT); 479 isOverloaded = true; 480 } 481 482 // Reject invalid types. 483 if (VT == MVT::isVoid) 484 throw "Intrinsic '" + DefName + " has void in result type list!"; 485 486 IS.RetVTs.push_back(VT); 487 IS.RetTypeDefs.push_back(TyEl); 488 } 489 490 // Parse the list of parameter types. 491 TypeList = R->getValueAsListInit("ParamTypes"); 492 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 493 Record *TyEl = TypeList->getElementAsRecord(i); 494 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 495 MVT::SimpleValueType VT; 496 if (TyEl->isSubClassOf("LLVMMatchType")) { 497 unsigned MatchTy = TyEl->getValueAsInt("Number"); 498 assert(MatchTy < OverloadedVTs.size() && 499 "Invalid matching number!"); 500 VT = OverloadedVTs[MatchTy]; 501 // It only makes sense to use the extended and truncated vector element 502 // variants with iAny types; otherwise, if the intrinsic is not 503 // overloaded, all the types can be specified directly. 504 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 505 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 506 VT == MVT::iAny || VT == MVT::vAny) && 507 "Expected iAny or vAny type"); 508 } else 509 VT = getValueType(TyEl->getValueAsDef("VT")); 510 511 if (EVT(VT).isOverloaded()) { 512 OverloadedVTs.push_back(VT); 513 isOverloaded = true; 514 } 515 516 // Reject invalid types. 517 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/) 518 throw "Intrinsic '" + DefName + " has void in result type list!"; 519 520 IS.ParamVTs.push_back(VT); 521 IS.ParamTypeDefs.push_back(TyEl); 522 } 523 524 // Parse the intrinsic properties. 525 ListInit *PropList = R->getValueAsListInit("Properties"); 526 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { 527 Record *Property = PropList->getElementAsRecord(i); 528 assert(Property->isSubClassOf("IntrinsicProperty") && 529 "Expected a property!"); 530 531 if (Property->getName() == "IntrNoMem") 532 ModRef = NoMem; 533 else if (Property->getName() == "IntrReadArgMem") 534 ModRef = ReadArgMem; 535 else if (Property->getName() == "IntrReadMem") 536 ModRef = ReadMem; 537 else if (Property->getName() == "IntrReadWriteArgMem") 538 ModRef = ReadWriteArgMem; 539 else if (Property->getName() == "Commutative") 540 isCommutative = true; 541 else if (Property->getName() == "Throws") 542 canThrow = true; 543 else if (Property->getName() == "IntrNoReturn") 544 isNoReturn = true; 545 else if (Property->isSubClassOf("NoCapture")) { 546 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 547 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture)); 548 } else 549 llvm_unreachable("Unknown property!"); 550 } 551 552 // Sort the argument attributes for later benefit. 553 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end()); 554} 555