1//===-- NVPTXMCTargetDesc.cpp - NVPTX Target Descriptions -------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file provides NVPTX specific target descriptions.
11//
12//===----------------------------------------------------------------------===//
13
14#include "NVPTXMCTargetDesc.h"
15#include "NVPTXMCAsmInfo.h"
16#include "llvm/MC/MCCodeGenInfo.h"
17#include "llvm/MC/MCInstrInfo.h"
18#include "llvm/MC/MCRegisterInfo.h"
19#include "llvm/MC/MCSubtargetInfo.h"
20#include "llvm/Support/TargetRegistry.h"
21
22#define GET_INSTRINFO_MC_DESC
23#include "NVPTXGenInstrInfo.inc"
24
25#define GET_SUBTARGETINFO_MC_DESC
26#include "NVPTXGenSubtargetInfo.inc"
27
28#define GET_REGINFO_MC_DESC
29#include "NVPTXGenRegisterInfo.inc"
30
31
32using namespace llvm;
33
34static MCInstrInfo *createNVPTXMCInstrInfo() {
35  MCInstrInfo *X = new MCInstrInfo();
36  InitNVPTXMCInstrInfo(X);
37  return X;
38}
39
40static MCRegisterInfo *createNVPTXMCRegisterInfo(StringRef TT) {
41  MCRegisterInfo *X = new MCRegisterInfo();
42  // PTX does not have a return address register.
43  InitNVPTXMCRegisterInfo(X, 0);
44  return X;
45}
46
47static MCSubtargetInfo *createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
48                                                   StringRef FS) {
49  MCSubtargetInfo *X = new MCSubtargetInfo();
50  InitNVPTXMCSubtargetInfo(X, TT, CPU, FS);
51  return X;
52}
53
54static MCCodeGenInfo *createNVPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
55                                               CodeModel::Model CM,
56                                               CodeGenOpt::Level OL) {
57  MCCodeGenInfo *X = new MCCodeGenInfo();
58  X->InitMCCodeGenInfo(RM, CM, OL);
59  return X;
60}
61
62
63// Force static initialization.
64extern "C" void LLVMInitializeNVPTXTargetMC() {
65  // Register the MC asm info.
66  RegisterMCAsmInfo<NVPTXMCAsmInfo> X(TheNVPTXTarget32);
67  RegisterMCAsmInfo<NVPTXMCAsmInfo> Y(TheNVPTXTarget64);
68
69  // Register the MC codegen info.
70  TargetRegistry::RegisterMCCodeGenInfo(TheNVPTXTarget32,
71                                        createNVPTXMCCodeGenInfo);
72  TargetRegistry::RegisterMCCodeGenInfo(TheNVPTXTarget64,
73                                        createNVPTXMCCodeGenInfo);
74
75  // Register the MC instruction info.
76  TargetRegistry::RegisterMCInstrInfo(TheNVPTXTarget32, createNVPTXMCInstrInfo);
77  TargetRegistry::RegisterMCInstrInfo(TheNVPTXTarget64, createNVPTXMCInstrInfo);
78
79  // Register the MC register info.
80  TargetRegistry::RegisterMCRegInfo(TheNVPTXTarget32,
81                                    createNVPTXMCRegisterInfo);
82  TargetRegistry::RegisterMCRegInfo(TheNVPTXTarget64,
83                                    createNVPTXMCRegisterInfo);
84
85  // Register the MC subtarget info.
86  TargetRegistry::RegisterMCSubtargetInfo(TheNVPTXTarget32,
87                                          createNVPTXMCSubtargetInfo);
88  TargetRegistry::RegisterMCSubtargetInfo(TheNVPTXTarget64,
89                                          createNVPTXMCSubtargetInfo);
90
91}
92