1/* 2 * Copyright (c) 2004, Apple Computer, Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. Neither the name of Apple Computer, Inc. ("Apple") nor the names of 13 * its contributors may be used to endorse or promote products derived 14 * from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY APPLE AND ITS CONTRIBUTORS "AS IS" AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL APPLE OR ITS CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28/* Copyright (c) 1991 NeXT Computer, Inc. All rights reserved. 29 * 30 * File: mach/m88k/thread_status.h 31 * Author: Mike DeMoney, NeXT Computer, Inc. 32 * 33 * This include file defines the per-thread state 34 * for NeXT 88K-based products. 35 * 36 * HISTORY 37 * 23-Jan-91 Mike DeMoney (mike@next.com) 38 * Created. 39 * 40 * FIXME: 41 * All of these types should be pulled from architecture. 42 * Solve possible conflicting types problem for implementations 43 * by making user define an implementation (e.g. #define __M88110__) 44 * to get a implementation specific features. 45 * 46 * Put fp envelope stuff in mach/m88k/m88110_fpee.h. 47 */ 48 49#ifndef _MACH_M88K_THREAD_STATE_ 50#define _MACH_M88K_THREAD_STATE_ 51 52#import <architecture/m88k/fp_regs.h> 53#import <architecture/m88k/reg_help.h> 54 55/************************************************************************** 56 * Data Typedefs used by thread_getstatus() and thread_setstatus() * 57 * NOTE: FP control and status regs described in <mach/m88k/fp_regs.h> * 58 **************************************************************************/ 59 60#define M88K_THREAD_STATE_GRF (1) // general registers 61#define M88K_THREAD_STATE_XRF (2) // extended and fp registers 62#define M88K_THREAD_STATE_USER (3) // non-architectural user state 63#define M88110_THREAD_STATE_IMPL (4) // 88110 impl specific 64 65#define M88K_THREAD_STATE_MAXFLAVOR (M88110_THREAD_STATE_IMPL) 66 67/* 68 * m88k_thread_state_grf -- basic thread state for NeXT 88K-based products 69 */ 70typedef struct _m88k_thread_state_grf { 71 unsigned r1; // rpc: return pc, caller-saved 72 unsigned r2; // a0: argument 0, caller-saved 73 unsigned r3; // a1 74 unsigned r4; // a2 75 unsigned r5; // a3 76 unsigned r6; // a4 77 unsigned r7; // a5 78 unsigned r8; // a6 79 unsigned r9; // a7 80 unsigned r10; // t0: temporary, caller-saved 81 unsigned r11; // t1 82 unsigned r12; // t2: struct return ptr, 83 unsigned r13; // t3 84 unsigned r14; // s0: saved, callee-saved 85 unsigned r15; // s1 86 unsigned r16; // s2 87 unsigned r17; // s3 88 unsigned r18; // s4 89 unsigned r19; // s5 90 unsigned r20; // s6 91 unsigned r21; // s7 92 unsigned r22; // s8 93 unsigned r23; // s9 94 unsigned r24; // s10 95 unsigned r25; // s11 96 unsigned r26; // t4 97 unsigned r27; // at: temp, used by asm macros 98 unsigned r28; // lk0: reserved for link editor 99 unsigned r29; // lk1 100 unsigned r30; // fp: frame ptr, callee-saved 101 unsigned r31; // sp: stack ptr, callee-saved 102 unsigned xip; // executing instruction pointer 103 unsigned xip_in_bd; // non-zero => xip in branch delay slot 104 /* 105 * nip is only valid if xip_in_bd is TRUE 106 */ 107 unsigned nip; // next instruction pointer 108} m88k_thread_state_grf_t; 109 110#define M88K_THREAD_STATE_GRF_COUNT \ 111 (sizeof(m88k_thread_state_grf_t)/sizeof(int)) 112 113/* 114 * m88k_thread_state_xrf -- extended register file contents and floating point 115 * control registers for NeXT 88K-based products. 116 */ 117typedef struct _m88k_thread_state_xrf { 118 m88k_xrf_t x1; // caller-saved 119 m88k_xrf_t x2; 120 m88k_xrf_t x3; 121 m88k_xrf_t x4; 122 m88k_xrf_t x5; 123 m88k_xrf_t x6; 124 m88k_xrf_t x7; 125 m88k_xrf_t x8; 126 m88k_xrf_t x9; 127 m88k_xrf_t x10; 128 m88k_xrf_t x11; 129 m88k_xrf_t x12; 130 m88k_xrf_t x13; 131 m88k_xrf_t x14; 132 m88k_xrf_t x15; 133 m88k_xrf_t x16; 134 m88k_xrf_t x17; 135 m88k_xrf_t x18; 136 m88k_xrf_t x19; 137 m88k_xrf_t x20; 138 m88k_xrf_t x21; 139 m88k_xrf_t x22; // callee-saved 140 m88k_xrf_t x23; 141 m88k_xrf_t x24; 142 m88k_xrf_t x25; 143 m88k_xrf_t x26; 144 m88k_xrf_t x27; 145 m88k_xrf_t x28; 146 m88k_xrf_t x29; 147 m88k_xrf_t x30; // reserved 148 m88k_xrf_t x31; 149 m88k_fpsr_t fpsr; // fp status, fcr62 150 m88k_fpcr_t fpcr; // fp control, fcr63 151} m88k_thread_state_xrf_t; 152 153#define M88K_THREAD_STATE_XRF_COUNT \ 154 (sizeof(m88k_thread_state_xrf_t)/sizeof(int)) 155 156typedef struct _m88k_thread_state_user { 157 int user; // user register (for cthreads) 158} m88k_thread_state_user_t; 159 160#define M88K_THREAD_STATE_USER_COUNT \ 161 (sizeof(m88k_thread_state_user_t)/sizeof(int)) 162 163/* 164 * Motorola 88110 specific state 165 * (Can't count on this being in all m88k implementations.) 166 */ 167 168#define M88110_N_DATA_BP 2 // 88110 supports 2 data bp's 169 170/* 171 * Data Breakpoint Address Match Mask -- actually indicates don't 172 * care bits in addr 173 */ 174typedef enum { 175 M88110_MATCH_BYTE = 0, 176 M88110_MATCH_SHORT = 0x1, 177 M88110_MATCH_WORD = 0x3, 178 M88110_MATCH_DOUBLE = 0x7, 179 M88110_MATCH_QUAD = 0xf, 180 M88110_MATCH_32 = 0x1f, 181 M88110_MATCH_64 = 0x3f, 182 M88110_MATCH_128 = 0x7f, 183 M88110_MATCH_256 = 0xff, 184 M88110_MATCH_512 = 0x1ff, 185 M88110_MATCH_1024 = 0x3ff, 186 M88110_MATCH_2048 = 0x7ff, 187 M88110_MATCH_4096 = 0xfff 188} m88110_match_t; 189 190/* 191 * Data Breakpoint Control Word 192 */ 193typedef struct { 194 unsigned :BITS_WIDTH(31,29); 195 unsigned rw:BIT_WIDTH(28); // 1 => read access 196 unsigned rwm:BIT_WIDTH(27); // 0 => rw is don't care 197 unsigned :BITS_WIDTH(26,13); 198 m88110_match_t addr_match:BITS_WIDTH(12,1); // addr(12,1) don't cares 199 unsigned v:BIT_WIDTH(0); 200} m88110_bp_ctrl_t; 201 202/* 203 * A complete Data Breakpoint spec 204 */ 205typedef struct { 206 unsigned addr; // data address 207 m88110_bp_ctrl_t ctrl; 208} m88110_data_bp_t; 209 210/* 211 * m88110_psr_t -- 88110 Processor Status Register 212 * System prohibits modification of supr, le, se, sgn_imd, sm and mxm_dis 213 * bits for user threads. 214 */ 215typedef struct { 216 unsigned supr:BIT_WIDTH(31); 217 unsigned le:BIT_WIDTH(30); // little endian mode 218 unsigned se:BIT_WIDTH(29); // serial exec mode 219 unsigned c:BIT_WIDTH(28); // carry 220 unsigned :BIT_WIDTH(27); 221 unsigned sgn_imd:BIT_WIDTH(26); // signed immediates 222 unsigned sm:BIT_WIDTH(25); // serialize mem refs 223 unsigned :BIT_WIDTH(24); 224 unsigned trace:BIT_WIDTH(23); 225 unsigned :BITS_WIDTH(22,5); 226 unsigned sfu2dis:BIT_WIDTH(4); // gpu (sfu2) disable 227 unsigned sfu1dis:BIT_WIDTH(3); // fpu (sfu1) disable 228 unsigned mxm_dis:BIT_WIDTH(2); // misaligned dis 229 unsigned :BITS_WIDTH(1,0); 230} m88110_psr_t; 231 232/* 233 * Information for IEEE floating point user trap handlers 234 */ 235typedef enum { 236 M88110_IRESULT_SIZE_NONE = 0, // no intermediate result 237 M88110_IRESULT_SIZE_SINGLE = 1, // single precision result 238 M88110_IRESULT_SIZE_DOUBLE = 2, // double precision result 239 M88110_IRESULT_SIZE_EXTENDED = 3 // double extended result 240} m88110_iresult_size_t; 241 242typedef struct { 243 unsigned :BITS_WIDTH(31,16); // unused 244 m88110_iresult_size_t iresult_size:BITS_WIDTH(15,14); 245 // size of iresult 246 unsigned :BITS_WIDTH(13,9); // unused 247 unsigned sfu1_disabled:BIT_WIDTH(8); // sfu disabled 248 unsigned int:BIT_WIDTH(7); // invalid int conv 249 unsigned unimp:BIT_WIDTH(6); // unimp ctrl reg 250 unsigned priv:BIT_WIDTH(5); // priv violation 251 unsigned efinv:BIT_WIDTH(4); // IEEE EFINV 252 unsigned efdvz:BIT_WIDTH(3); // IEEE EFDVZ 253 unsigned efunf:BIT_WIDTH(2); // IEEE EFUNF 254 unsigned efovf:BIT_WIDTH(1); // IEEE EFOVF 255 unsigned efinx:BIT_WIDTH(0); // IEEE EFINX 256} m88110_fp_trap_status_t; 257 258/* 259 * m88110_thread_state_impl -- 88110 implementation-specific 260 * control registers for NeXT 88K-based products. 261 */ 262typedef struct _m88110_thread_state_impl { 263 m88110_data_bp_t data_bp[M88110_N_DATA_BP]; 264 265 /* 266 * Certain of the 88110 psr bits may be modified 267 */ 268 m88110_psr_t psr; // processor status 269 /* 270 * IEEE floating point user trap information. Read only. 271 * (Only valid immediately after an EXC_ARITHMETIC 272 * exception with code EXC_M88K_SFU1_EXCP. Trap 273 * handlers must determine operation, source and 274 * destination registers by fetching instruction at 275 * exip.) 276 */ 277 m88k_xrf_t intermediate_result; 278 m88110_fp_trap_status_t fp_trap_status; 279} m88110_thread_state_impl_t; 280 281#define M88110_THREAD_STATE_IMPL_COUNT \ 282 (sizeof(m88110_thread_state_impl_t)/sizeof(int)) 283 284#endif /* _MACH_M88K_THREAD_STATE_ */ 285