1/*
2 * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29/*
30 *	File:	mach/ppc/processor_info.h
31 *
32 *	Data structure definitions for ppc specific processor control
33 */
34
35#ifndef	_MACH_PPC_PROCESSOR_INFO_H_
36#define _MACH_PPC_PROCESSOR_INFO_H_
37
38#include <mach/machine.h>
39#include <mach/message.h>
40
41#ifdef	PRIVATE
42
43/* processor_control command operations */
44#define PROCESSOR_PM_SET_REGS     1     /* Set Performance Monitor Registers  */
45#define PROCESSOR_PM_SET_MMCR     2     /* Set Monitor Mode Controls Registers  */
46#define PROCESSOR_PM_CLR_PMC      3     /* Clear Performance Monitor Counter Registers */
47
48/*
49 * Performance Monitor Register structures
50 *
51 * XXX - These have not been updated for ppc64.
52 */
53
54typedef union {
55	unsigned int word;
56	struct {
57	        unsigned int dis	: 1;
58		unsigned int dp 	: 1;
59		unsigned int du 	: 1;
60	        unsigned int dms	: 1;
61	        unsigned int dmr	: 1;
62	        unsigned int reserved3	: 1;        /* enint         */
63	        unsigned int reserved4	: 1;        /* discount      */
64	        unsigned int reserved5	: 2;        /* rtcselect     */
65	        unsigned int reserved6	: 1;        /* intonbittrans */
66	        unsigned int threshold	: 6;
67	        unsigned int reserved7	: 1;        /* pmc1intcontrol */
68	        unsigned int reserved8	: 1;        /* pmcintcontrol  */
69	        unsigned int reserved9	: 1;        /* pmctrigger     */
70	        unsigned int pmc1select	: 7;
71	        unsigned int pmc2select	: 6;
72	}bits;
73}mmcr0_t;
74
75typedef union {
76	unsigned int word;
77	struct {
78	        unsigned int pmc3select	: 5;
79	        unsigned int pmc4select	: 5;
80	        unsigned int reserved	: 22;
81	}bits;
82}mmcr1_t;
83
84typedef union {
85	unsigned int word;
86	struct {
87	        unsigned int threshmult	 : 1;
88	        unsigned int reserved	 : 31;
89	}bits;
90}mmcr2_t;
91
92typedef union {
93	unsigned int word;
94	struct {
95	        unsigned int ov : 1;        /* overflow value */
96	        unsigned int cv : 31;       /* countervalue */
97	}bits;
98}pmcn_t;
99
100
101
102/* Processor Performance Monitor Registers definitions */
103
104struct processor_pm_regs {
105      union {
106	mmcr0_t mmcr0;
107        mmcr1_t mmcr1;
108        mmcr2_t mmcr2;
109      }u;
110      pmcn_t pmc[2];
111};
112
113typedef struct processor_pm_regs processor_pm_regs_data_t;
114typedef struct processor_pm_regs *processor_pm_regs_t;
115#define PROCESSOR_PM_REGS_COUNT ((mach_msg_type_number_t) \
116        (sizeof(processor_pm_regs_data_t) / sizeof (unsigned int)))
117
118#define PROCESSOR_PM_REGS_COUNT_POWERPC_750 \
119            (PROCESSOR_PM_REGS_COUNT * 2 )
120
121#define PROCESSOR_PM_REGS_COUNT_POWERPC_7400 \
122            (PROCESSOR_PM_REGS_COUNT * 3 )
123
124union processor_control_data {
125        processor_pm_regs_data_t cmd_pm_regs[3];
126};
127
128struct processor_control_cmd {
129    integer_t      cmd_op;
130    cpu_type_t     cmd_cpu_type;
131    cpu_subtype_t  cmd_cpu_subtype;
132    union processor_control_data u;
133};
134
135typedef struct processor_control_cmd   processor_control_cmd_data_t;
136typedef struct processor_control_cmd   *processor_control_cmd_t;
137#define cmd_pm_regs u.cmd_pm_regs;
138#define cmd_pm_ctls u.cmd_pm_ctls;
139
140#define PROCESSOR_CONTROL_CMD_COUNT ((mach_msg_type_number_t) \
141    (((sizeof(processor_control_cmd_data_t)) - \
142      (sizeof(union processor_control_data))) / sizeof (integer_t)))
143
144     /* x should be a processor_pm_regs_t */
145#define PERFMON_MMCR0(x)    ((x)[0].u.mmcr0.word)
146#define PERFMON_PMC1(x)     ((x)[0].pmc[0].word)
147#define PERFMON_PMC2(x)     ((x)[0].pmc[1].word)
148#define PERFMON_MMCR1(x)    ((x)[1].u.mmcr1.word)
149#define PERFMON_PMC3(x)     ((x)[1].pmc[0].word)
150#define PERFMON_PMC4(x)     ((x)[1].pmc[1].word)
151#define PERFMON_MMCR2(x)    ((x)[2].u.mmcr2.word)
152
153#define PERFMON_DIS(x)           ((x)[0].u.mmcr0.bits.dis)
154#define PERFMON_DP(x)            ((x)[0].u.mmcr0.bits.dp)
155#define PERFMON_DU(x)            ((x)[0].u.mmcr0.bits.du)
156#define PERFMON_DMS(x)           ((x)[0].u.mmcr0.bits.dms)
157#define PERFMON_DMR(x)           ((x)[0].u.mmcr0.bits.dmr)
158#define PERFMON_THRESHOLD(x)     ((x)[0].u.mmcr0.bits.threshold)
159#define PERFMON_PMC1SELECT(x)    ((x)[0].u.mmcr0.bits.pmc1select)
160#define PERFMON_PMC2SELECT(x)    ((x)[0].u.mmcr0.bits.pmc2select)
161#define PERFMON_PMC3SELECT(x)    ((x)[1].u.mmcr1.bits.pmc3select)
162#define PERFMON_PMC4SELECT(x)    ((x)[1].u.mmcr1.bits.pmc4select)
163#define PERFMON_THRESHMULT(x)    ((x)[2].u.mmcr2.bits.threshmult)
164#define PERFMON_PMC1_CV(x)       ((x)[0].u.pmc[0].bits.cv)
165#define PERFMON_PMC2_CV(x)       ((x)[0].u.pmc[1].bits.cv)
166#define PERFMON_PMC3_CV(x)       ((x)[1].u.pmc[0].bits.cv)
167#define PERFMON_PMC4_CV(x)       ((x)[1].u.pmc[1].bits.cv)
168
169typedef unsigned int processor_temperature_data_t;
170typedef unsigned int *processor_temperature_t;
171
172#define PROCESSOR_TEMPERATURE_COUNT 1
173
174#endif	/* PRIVATE */
175
176#endif	/* _MACH_PPC_PROCESSOR_INFO_H_ */
177