1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22/* 23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27/* 28 * #pragma ident "@(#)fasttrap_isa.c 1.27 08/04/09 SMI" 29 */ 30 31#ifdef KERNEL 32#ifndef _KERNEL 33#define _KERNEL /* Solaris vs. Darwin */ 34#endif 35#endif 36 37#include <sys/fasttrap_isa.h> 38#include <sys/fasttrap_impl.h> 39#include <sys/dtrace.h> 40#include <sys/dtrace_impl.h> 41extern dtrace_id_t dtrace_probeid_error; 42 43#include "fasttrap_regset.h" 44 45#include <sys/dtrace_ptss.h> 46#include <kern/debug.h> 47 48#include <machine/pal_routines.h> 49 50/* Solaris proc_t is the struct. Darwin's proc_t is a pointer to it. */ 51#define proc_t struct proc /* Steer clear of the Darwin typedef for proc_t */ 52 53/* 54 * Lossless User-Land Tracing on x86 55 * --------------------------------- 56 * 57 * The execution of most instructions is not dependent on the address; for 58 * these instructions it is sufficient to copy them into the user process's 59 * address space and execute them. To effectively single-step an instruction 60 * in user-land, we copy out the following sequence of instructions to scratch 61 * space in the user thread's ulwp_t structure. 62 * 63 * We then set the program counter (%eip or %rip) to point to this scratch 64 * space. Once execution resumes, the original instruction is executed and 65 * then control flow is redirected to what was originally the subsequent 66 * instruction. If the kernel attemps to deliver a signal while single- 67 * stepping, the signal is deferred and the program counter is moved into the 68 * second sequence of instructions. The second sequence ends in a trap into 69 * the kernel where the deferred signal is then properly handled and delivered. 70 * 71 * For instructions whose execute is position dependent, we perform simple 72 * emulation. These instructions are limited to control transfer 73 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle 74 * of %rip-relative addressing that means that almost any instruction can be 75 * position dependent. For all the details on how we emulate generic 76 * instructions included %rip-relative instructions, see the code in 77 * fasttrap_pid_probe() below where we handle instructions of type 78 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing). 79 */ 80 81#define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3) 82#define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7) 83#define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7) 84#define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm)) 85 86#define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3) 87#define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7) 88#define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7) 89 90#define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1) 91#define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1) 92#define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1) 93#define FASTTRAP_REX_B(rex) ((rex) & 1) 94#define FASTTRAP_REX(w, r, x, b) \ 95 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b)) 96 97/* 98 * Single-byte op-codes. 99 */ 100#define FASTTRAP_PUSHL_EBP 0x55 101 102#define FASTTRAP_JO 0x70 103#define FASTTRAP_JNO 0x71 104#define FASTTRAP_JB 0x72 105#define FASTTRAP_JAE 0x73 106#define FASTTRAP_JE 0x74 107#define FASTTRAP_JNE 0x75 108#define FASTTRAP_JBE 0x76 109#define FASTTRAP_JA 0x77 110#define FASTTRAP_JS 0x78 111#define FASTTRAP_JNS 0x79 112#define FASTTRAP_JP 0x7a 113#define FASTTRAP_JNP 0x7b 114#define FASTTRAP_JL 0x7c 115#define FASTTRAP_JGE 0x7d 116#define FASTTRAP_JLE 0x7e 117#define FASTTRAP_JG 0x7f 118 119#define FASTTRAP_NOP 0x90 120 121#define FASTTRAP_MOV_EAX 0xb8 122#define FASTTRAP_MOV_ECX 0xb9 123 124#define FASTTRAP_RET16 0xc2 125#define FASTTRAP_RET 0xc3 126 127#define FASTTRAP_LOOPNZ 0xe0 128#define FASTTRAP_LOOPZ 0xe1 129#define FASTTRAP_LOOP 0xe2 130#define FASTTRAP_JCXZ 0xe3 131 132#define FASTTRAP_CALL 0xe8 133#define FASTTRAP_JMP32 0xe9 134#define FASTTRAP_JMP8 0xeb 135 136#define FASTTRAP_INT3 0xcc 137#define FASTTRAP_INT 0xcd 138#define T_DTRACE_RET 0x7f 139 140#define FASTTRAP_2_BYTE_OP 0x0f 141#define FASTTRAP_GROUP5_OP 0xff 142 143/* 144 * Two-byte op-codes (second byte only). 145 */ 146#define FASTTRAP_0F_JO 0x80 147#define FASTTRAP_0F_JNO 0x81 148#define FASTTRAP_0F_JB 0x82 149#define FASTTRAP_0F_JAE 0x83 150#define FASTTRAP_0F_JE 0x84 151#define FASTTRAP_0F_JNE 0x85 152#define FASTTRAP_0F_JBE 0x86 153#define FASTTRAP_0F_JA 0x87 154#define FASTTRAP_0F_JS 0x88 155#define FASTTRAP_0F_JNS 0x89 156#define FASTTRAP_0F_JP 0x8a 157#define FASTTRAP_0F_JNP 0x8b 158#define FASTTRAP_0F_JL 0x8c 159#define FASTTRAP_0F_JGE 0x8d 160#define FASTTRAP_0F_JLE 0x8e 161#define FASTTRAP_0F_JG 0x8f 162 163#define FASTTRAP_EFLAGS_OF 0x800 164#define FASTTRAP_EFLAGS_DF 0x400 165#define FASTTRAP_EFLAGS_SF 0x080 166#define FASTTRAP_EFLAGS_ZF 0x040 167#define FASTTRAP_EFLAGS_AF 0x010 168#define FASTTRAP_EFLAGS_PF 0x004 169#define FASTTRAP_EFLAGS_CF 0x001 170 171/* 172 * Instruction prefixes. 173 */ 174#define FASTTRAP_PREFIX_OPERAND 0x66 175#define FASTTRAP_PREFIX_ADDRESS 0x67 176#define FASTTRAP_PREFIX_CS 0x2E 177#define FASTTRAP_PREFIX_DS 0x3E 178#define FASTTRAP_PREFIX_ES 0x26 179#define FASTTRAP_PREFIX_FS 0x64 180#define FASTTRAP_PREFIX_GS 0x65 181#define FASTTRAP_PREFIX_SS 0x36 182#define FASTTRAP_PREFIX_LOCK 0xF0 183#define FASTTRAP_PREFIX_REP 0xF3 184#define FASTTRAP_PREFIX_REPNE 0xF2 185 186#define FASTTRAP_NOREG 0xff 187 188/* 189 * Map between instruction register encodings and the kernel constants which 190 * correspond to indicies into struct regs. 191 */ 192 193/* 194 * APPLE NOTE: We are cheating here. The regmap is used to decode which register 195 * a given instruction is trying to reference. OS X does not have extended registers 196 * for 32 bit apps, but the *order* is the same. So for 32 bit state, we will return: 197 * 198 * REG_RAX -> EAX 199 * REG_RCX -> ECX 200 * REG_RDX -> EDX 201 * REG_RBX -> EBX 202 * REG_RSP -> UESP 203 * REG_RBP -> EBP 204 * REG_RSI -> ESI 205 * REG_RDI -> EDI 206 * 207 * The fasttrap_getreg function knows how to make the correct transformation. 208 */ 209static const uint8_t regmap[16] = { 210 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI, 211 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15, 212}; 213 214static user_addr_t fasttrap_getreg(x86_saved_state_t *, uint_t); 215 216static uint64_t 217fasttrap_anarg(x86_saved_state_t *regs, int function_entry, int argno) 218{ 219 uint64_t value; 220 int shift = function_entry ? 1 : 0; 221 222 x86_saved_state64_t *regs64; 223 x86_saved_state32_t *regs32; 224 unsigned int p_model; 225 226 if (is_saved_state64(regs)) { 227 regs64 = saved_state64(regs); 228 regs32 = NULL; 229 p_model = DATAMODEL_LP64; 230 } else { 231 regs64 = NULL; 232 regs32 = saved_state32(regs); 233 p_model = DATAMODEL_ILP32; 234 } 235 236 if (p_model == DATAMODEL_LP64) { 237 user_addr_t stack; 238 239 /* 240 * In 64-bit mode, the first six arguments are stored in 241 * registers. 242 */ 243 if (argno < 6) 244 return ((®s64->rdi)[argno]); 245 246 stack = regs64->isf.rsp + sizeof(uint64_t) * (argno - 6 + shift); 247 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 248 value = dtrace_fuword64(stack); 249 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 250 } else { 251 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp); 252 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 253 value = dtrace_fuword32((user_addr_t)(unsigned long)&stack[argno + shift]); 254 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 255 } 256 257 return (value); 258} 259 260/*ARGSUSED*/ 261int 262fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, user_addr_t pc, 263 fasttrap_probe_type_t type) 264{ 265#pragma unused(type) 266 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10]; 267 size_t len = FASTTRAP_MAX_INSTR_SIZE; 268 size_t first = MIN(len, PAGE_SIZE - (pc & PAGE_MASK)); 269 uint_t start = 0; 270 size_t size; 271 int rmindex; 272 uint8_t seg, rex = 0; 273 unsigned int p_model = (p->p_flag & P_LP64) ? DATAMODEL_LP64 : DATAMODEL_ILP32; 274 275 /* 276 * Read the instruction at the given address out of the process's 277 * address space. We don't have to worry about a debugger 278 * changing this instruction before we overwrite it with our trap 279 * instruction since P_PR_LOCK is set. Since instructions can span 280 * pages, we potentially read the instruction in two parts. If the 281 * second part fails, we just zero out that part of the instruction. 282 */ 283 /* 284 * APPLE NOTE: Of course, we do not have a P_PR_LOCK, so this is racey... 285 */ 286 if (uread(p, &instr[0], first, pc) != 0) 287 return (-1); 288 if (len > first && 289 uread(p, &instr[first], len - first, pc + first) != 0) { 290 bzero(&instr[first], len - first); 291 len = first; 292 } 293 294 /* 295 * If the disassembly fails, then we have a malformed instruction. 296 */ 297 if ((size = dtrace_instr_size_isa(instr, p_model, &rmindex)) <= 0) 298 return (-1); 299 300 /* 301 * Make sure the disassembler isn't completely broken. 302 */ 303 ASSERT(-1 <= rmindex && rmindex < (int)size); 304 305 /* 306 * If the computed size is greater than the number of bytes read, 307 * then it was a malformed instruction possibly because it fell on a 308 * page boundary and the subsequent page was missing or because of 309 * some malicious user. 310 */ 311 if (size > len) 312 return (-1); 313 314 tp->ftt_size = (uint8_t)size; 315 tp->ftt_segment = FASTTRAP_SEG_NONE; 316 317 /* 318 * Find the start of the instruction's opcode by processing any 319 * legacy prefixes. 320 */ 321 for (;;) { 322 seg = 0; 323 switch (instr[start]) { 324 case FASTTRAP_PREFIX_SS: 325 seg++; 326 /*FALLTHRU*/ 327 case FASTTRAP_PREFIX_GS: 328 seg++; 329 /*FALLTHRU*/ 330 case FASTTRAP_PREFIX_FS: 331 seg++; 332 /*FALLTHRU*/ 333 case FASTTRAP_PREFIX_ES: 334 seg++; 335 /*FALLTHRU*/ 336 case FASTTRAP_PREFIX_DS: 337 seg++; 338 /*FALLTHRU*/ 339 case FASTTRAP_PREFIX_CS: 340 seg++; 341 /*FALLTHRU*/ 342 case FASTTRAP_PREFIX_OPERAND: 343 case FASTTRAP_PREFIX_ADDRESS: 344 case FASTTRAP_PREFIX_LOCK: 345 case FASTTRAP_PREFIX_REP: 346 case FASTTRAP_PREFIX_REPNE: 347 if (seg != 0) { 348 /* 349 * It's illegal for an instruction to specify 350 * two segment prefixes -- give up on this 351 * illegal instruction. 352 */ 353 if (tp->ftt_segment != FASTTRAP_SEG_NONE) 354 return (-1); 355 356 tp->ftt_segment = seg; 357 } 358 start++; 359 continue; 360 } 361 break; 362 } 363 364 /* 365 * Identify the REX prefix on 64-bit processes. 366 */ 367 if (p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40) 368 rex = instr[start++]; 369 370 /* 371 * Now that we're pretty sure that the instruction is okay, copy the 372 * valid part to the tracepoint. 373 */ 374 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE); 375 376 tp->ftt_type = FASTTRAP_T_COMMON; 377 if (instr[start] == FASTTRAP_2_BYTE_OP) { 378 switch (instr[start + 1]) { 379 case FASTTRAP_0F_JO: 380 case FASTTRAP_0F_JNO: 381 case FASTTRAP_0F_JB: 382 case FASTTRAP_0F_JAE: 383 case FASTTRAP_0F_JE: 384 case FASTTRAP_0F_JNE: 385 case FASTTRAP_0F_JBE: 386 case FASTTRAP_0F_JA: 387 case FASTTRAP_0F_JS: 388 case FASTTRAP_0F_JNS: 389 case FASTTRAP_0F_JP: 390 case FASTTRAP_0F_JNP: 391 case FASTTRAP_0F_JL: 392 case FASTTRAP_0F_JGE: 393 case FASTTRAP_0F_JLE: 394 case FASTTRAP_0F_JG: 395 tp->ftt_type = FASTTRAP_T_JCC; 396 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO; 397 tp->ftt_dest = pc + tp->ftt_size + 398 /* LINTED - alignment */ 399 *(int32_t *)&instr[start + 2]; 400 break; 401 } 402 } else if (instr[start] == FASTTRAP_GROUP5_OP) { 403 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]); 404 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]); 405 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]); 406 407 if (reg == 2 || reg == 4) { 408 uint_t i, sz; 409 410 if (reg == 2) 411 tp->ftt_type = FASTTRAP_T_CALL; 412 else 413 tp->ftt_type = FASTTRAP_T_JMP; 414 415 if (mod == 3) 416 tp->ftt_code = 2; 417 else 418 tp->ftt_code = 1; 419 420 ASSERT(p_model == DATAMODEL_LP64 || rex == 0); 421 422 /* 423 * See AMD x86-64 Architecture Programmer's Manual 424 * Volume 3, Section 1.2.7, Table 1-12, and 425 * Appendix A.3.1, Table A-15. 426 */ 427 if (mod != 3 && rm == 4) { 428 uint8_t sib = instr[start + 2]; 429 uint_t index = FASTTRAP_SIB_INDEX(sib); 430 uint_t base = FASTTRAP_SIB_BASE(sib); 431 432 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib); 433 434 tp->ftt_index = (index == 4) ? 435 FASTTRAP_NOREG : 436 regmap[index | (FASTTRAP_REX_X(rex) << 3)]; 437 tp->ftt_base = (mod == 0 && base == 5) ? 438 FASTTRAP_NOREG : 439 regmap[base | (FASTTRAP_REX_B(rex) << 3)]; 440 441 i = 3; 442 sz = mod == 1 ? 1 : 4; 443 } else { 444 /* 445 * In 64-bit mode, mod == 0 and r/m == 5 446 * denotes %rip-relative addressing; in 32-bit 447 * mode, the base register isn't used. In both 448 * modes, there is a 32-bit operand. 449 */ 450 if (mod == 0 && rm == 5) { 451 if (p_model == DATAMODEL_LP64) 452 tp->ftt_base = REG_RIP; 453 else 454 tp->ftt_base = FASTTRAP_NOREG; 455 sz = 4; 456 } else { 457 uint8_t base = rm | 458 (FASTTRAP_REX_B(rex) << 3); 459 460 tp->ftt_base = regmap[base]; 461 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0; 462 } 463 tp->ftt_index = FASTTRAP_NOREG; 464 i = 2; 465 } 466 467 if (sz == 1) { 468 tp->ftt_dest = *(int8_t *)&instr[start + i]; 469 } else if (sz == 4) { 470 /* LINTED - alignment */ 471 tp->ftt_dest = *(int32_t *)&instr[start + i]; 472 } else { 473 tp->ftt_dest = 0; 474 } 475 } 476 } else { 477 switch (instr[start]) { 478 case FASTTRAP_RET: 479 tp->ftt_type = FASTTRAP_T_RET; 480 break; 481 482 case FASTTRAP_RET16: 483 tp->ftt_type = FASTTRAP_T_RET16; 484 /* LINTED - alignment */ 485 tp->ftt_dest = *(uint16_t *)&instr[start + 1]; 486 break; 487 488 case FASTTRAP_JO: 489 case FASTTRAP_JNO: 490 case FASTTRAP_JB: 491 case FASTTRAP_JAE: 492 case FASTTRAP_JE: 493 case FASTTRAP_JNE: 494 case FASTTRAP_JBE: 495 case FASTTRAP_JA: 496 case FASTTRAP_JS: 497 case FASTTRAP_JNS: 498 case FASTTRAP_JP: 499 case FASTTRAP_JNP: 500 case FASTTRAP_JL: 501 case FASTTRAP_JGE: 502 case FASTTRAP_JLE: 503 case FASTTRAP_JG: 504 tp->ftt_type = FASTTRAP_T_JCC; 505 tp->ftt_code = instr[start]; 506 tp->ftt_dest = pc + tp->ftt_size + 507 (int8_t)instr[start + 1]; 508 break; 509 510 case FASTTRAP_LOOPNZ: 511 case FASTTRAP_LOOPZ: 512 case FASTTRAP_LOOP: 513 tp->ftt_type = FASTTRAP_T_LOOP; 514 tp->ftt_code = instr[start]; 515 tp->ftt_dest = pc + tp->ftt_size + 516 (int8_t)instr[start + 1]; 517 break; 518 519 case FASTTRAP_JCXZ: 520 tp->ftt_type = FASTTRAP_T_JCXZ; 521 tp->ftt_dest = pc + tp->ftt_size + 522 (int8_t)instr[start + 1]; 523 break; 524 525 case FASTTRAP_CALL: 526 tp->ftt_type = FASTTRAP_T_CALL; 527 tp->ftt_dest = pc + tp->ftt_size + 528 /* LINTED - alignment */ 529 *(int32_t *)&instr[start + 1]; 530 tp->ftt_code = 0; 531 break; 532 533 case FASTTRAP_JMP32: 534 tp->ftt_type = FASTTRAP_T_JMP; 535 tp->ftt_dest = pc + tp->ftt_size + 536 /* LINTED - alignment */ 537 *(int32_t *)&instr[start + 1]; 538 break; 539 case FASTTRAP_JMP8: 540 tp->ftt_type = FASTTRAP_T_JMP; 541 tp->ftt_dest = pc + tp->ftt_size + 542 (int8_t)instr[start + 1]; 543 break; 544 545 case FASTTRAP_PUSHL_EBP: 546 if (start == 0) 547 tp->ftt_type = FASTTRAP_T_PUSHL_EBP; 548 break; 549 550 case FASTTRAP_NOP: 551 ASSERT(p_model == DATAMODEL_LP64 || rex == 0); 552 553 /* 554 * On sol64 we have to be careful not to confuse a nop 555 * (actually xchgl %eax, %eax) with an instruction using 556 * the same opcode, but that does something different 557 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax). 558 */ 559 if (FASTTRAP_REX_B(rex) == 0) 560 tp->ftt_type = FASTTRAP_T_NOP; 561 break; 562 563 case FASTTRAP_INT3: 564 /* 565 * The pid provider shares the int3 trap with debugger 566 * breakpoints so we can't instrument them. 567 */ 568 ASSERT(instr[start] == FASTTRAP_INSTR); 569 return (-1); 570 571 case FASTTRAP_INT: 572 /* 573 * Interrupts seem like they could be traced with 574 * no negative implications, but it's possible that 575 * a thread could be redirected by the trap handling 576 * code which would eventually return to the 577 * instruction after the interrupt. If the interrupt 578 * were in our scratch space, the subsequent 579 * instruction might be overwritten before we return. 580 * Accordingly we refuse to instrument any interrupt. 581 */ 582 return (-1); 583 } 584 } 585 586 if (p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) { 587 /* 588 * If the process is 64-bit and the instruction type is still 589 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an 590 * execute it -- we need to watch for %rip-relative 591 * addressing mode. See the portion of fasttrap_pid_probe() 592 * below where we handle tracepoints with type 593 * FASTTRAP_T_COMMON for how we emulate instructions that 594 * employ %rip-relative addressing. 595 */ 596 if (rmindex != -1) { 597 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]); 598 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]); 599 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]); 600 601 ASSERT(rmindex > (int)start); 602 603 if (mod == 0 && rm == 5) { 604 /* 605 * We need to be sure to avoid other 606 * registers used by this instruction. While 607 * the reg field may determine the op code 608 * rather than denoting a register, assuming 609 * that it denotes a register is always safe. 610 * We leave the REX field intact and use 611 * whatever value's there for simplicity. 612 */ 613 if (reg != 0) { 614 tp->ftt_ripmode = FASTTRAP_RIP_1 | 615 (FASTTRAP_RIP_X * 616 FASTTRAP_REX_B(rex)); 617 rm = 0; 618 } else { 619 tp->ftt_ripmode = FASTTRAP_RIP_2 | 620 (FASTTRAP_RIP_X * 621 FASTTRAP_REX_B(rex)); 622 rm = 1; 623 } 624 625 tp->ftt_modrm = tp->ftt_instr[rmindex]; 626 tp->ftt_instr[rmindex] = 627 FASTTRAP_MODRM(2, reg, rm); 628 } 629 } 630 } 631 632 return (0); 633} 634 635int 636fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp) 637{ 638 fasttrap_instr_t instr = FASTTRAP_INSTR; 639 640 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0) 641 return (-1); 642 643 return (0); 644} 645 646int 647fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp) 648{ 649 uint8_t instr; 650 651 /* 652 * Distinguish between read or write failures and a changed 653 * instruction. 654 */ 655 if (uread(p, &instr, 1, tp->ftt_pc) != 0) 656 return (0); 657 if (instr != FASTTRAP_INSTR) 658 return (0); 659 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0) 660 return (-1); 661 662 return (0); 663} 664 665static void 666fasttrap_return_common(x86_saved_state_t *regs, user_addr_t pc, pid_t pid, 667 user_addr_t new_pc) 668{ 669 x86_saved_state64_t *regs64; 670 x86_saved_state32_t *regs32; 671 unsigned int p_model; 672 673 dtrace_icookie_t cookie; 674 675 if (is_saved_state64(regs)) { 676 regs64 = saved_state64(regs); 677 regs32 = NULL; 678 p_model = DATAMODEL_LP64; 679 } else { 680 regs64 = NULL; 681 regs32 = saved_state32(regs); 682 p_model = DATAMODEL_ILP32; 683 } 684 685 fasttrap_tracepoint_t *tp; 686 fasttrap_bucket_t *bucket; 687 fasttrap_id_t *id; 688 lck_mtx_t *pid_mtx; 689 690 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 691 lck_mtx_lock(pid_mtx); 692 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 693 694 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 695 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 696 tp->ftt_proc->ftpc_acount != 0) 697 break; 698 } 699 700 /* 701 * Don't sweat it if we can't find the tracepoint again; unlike 702 * when we're in fasttrap_pid_probe(), finding the tracepoint here 703 * is not essential to the correct execution of the process. 704 */ 705 if (tp == NULL) { 706 lck_mtx_unlock(pid_mtx); 707 return; 708 } 709 710 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) { 711 /* 712 * If there's a branch that could act as a return site, we 713 * need to trace it, and check here if the program counter is 714 * external to the function. 715 */ 716 if (tp->ftt_type != FASTTRAP_T_RET && 717 tp->ftt_type != FASTTRAP_T_RET16 && 718 new_pc - id->fti_probe->ftp_faddr < 719 id->fti_probe->ftp_fsize) 720 continue; 721 722 /* 723 * Provide a hint to the stack trace functions to add the 724 * following pc to the top of the stack since it's missing 725 * on a return probe yet highly desirable for consistency. 726 */ 727 cookie = dtrace_interrupt_disable(); 728 cpu_core[CPU->cpu_id].cpuc_missing_tos = pc; 729 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) { 730 dtrace_probe(dtrace_probeid_error, 0 /* state */, id->fti_probe->ftp_id, 731 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV); 732 } else if (p_model == DATAMODEL_LP64) { 733 dtrace_probe(id->fti_probe->ftp_id, 734 pc - id->fti_probe->ftp_faddr, 735 regs64->rax, regs64->rdx, 0, 0); 736 } else { 737 dtrace_probe(id->fti_probe->ftp_id, 738 pc - id->fti_probe->ftp_faddr, 739 regs32->eax, regs32->edx, 0, 0); 740 } 741 /* remove the hint */ 742 cpu_core[CPU->cpu_id].cpuc_missing_tos = 0; 743 dtrace_interrupt_enable(cookie); 744 } 745 746 lck_mtx_unlock(pid_mtx); 747} 748 749static void 750fasttrap_sigsegv(proc_t *p, uthread_t t, user_addr_t addr) 751{ 752 proc_lock(p); 753 754 /* Set fault address and mark signal */ 755 t->uu_code = addr; 756 t->uu_siglist |= sigmask(SIGSEGV); 757 758 /* 759 * XXX These two line may be redundant; if not, then we need 760 * XXX to potentially set the data address in the machine 761 * XXX specific thread state structure to indicate the address. 762 */ 763 t->uu_exception = KERN_INVALID_ADDRESS; /* SIGSEGV */ 764 t->uu_subcode = 0; /* XXX pad */ 765 766 proc_unlock(p); 767 768 /* raise signal */ 769 signal_setast(t->uu_context.vc_thread); 770} 771 772static void 773fasttrap_usdt_args64(fasttrap_probe_t *probe, x86_saved_state64_t *regs64, int argc, 774 uint64_t *argv) 775{ 776 int i, x, cap = MIN(argc, probe->ftp_nargs); 777 user_addr_t stack = (user_addr_t)regs64->isf.rsp; 778 779 for (i = 0; i < cap; i++) { 780 x = probe->ftp_argmap[i]; 781 782 if (x < 6) { 783 /* FIXME! This may be broken, needs testing */ 784 argv[i] = (®s64->rdi)[x]; 785 } else { 786 fasttrap_fuword64_noerr(stack + (x * sizeof(uint64_t)), &argv[i]); 787 } 788 } 789 790 for (; i < argc; i++) { 791 argv[i] = 0; 792 } 793} 794 795static void 796fasttrap_usdt_args32(fasttrap_probe_t *probe, x86_saved_state32_t *regs32, int argc, 797 uint32_t *argv) 798{ 799 int i, x, cap = MIN(argc, probe->ftp_nargs); 800 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp); 801 802 for (i = 0; i < cap; i++) { 803 x = probe->ftp_argmap[i]; 804 805 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[x], &argv[i]); 806 } 807 808 for (; i < argc; i++) { 809 argv[i] = 0; 810 } 811} 812 813/* 814 * FIXME! 815 */ 816static int 817fasttrap_do_seg(fasttrap_tracepoint_t *tp, x86_saved_state_t *rp, user_addr_t *addr) // 64 bit 818{ 819#pragma unused(tp, rp, addr) 820 printf("fasttrap_do_seg() called while unimplemented.\n"); 821#if 0 822 proc_t *p = curproc; 823 user_desc_t *desc; 824 uint16_t sel, ndx, type; 825 uintptr_t limit; 826 827 switch (tp->ftt_segment) { 828 case FASTTRAP_SEG_CS: 829 sel = rp->r_cs; 830 break; 831 case FASTTRAP_SEG_DS: 832 sel = rp->r_ds; 833 break; 834 case FASTTRAP_SEG_ES: 835 sel = rp->r_es; 836 break; 837 case FASTTRAP_SEG_FS: 838 sel = rp->r_fs; 839 break; 840 case FASTTRAP_SEG_GS: 841 sel = rp->r_gs; 842 break; 843 case FASTTRAP_SEG_SS: 844 sel = rp->r_ss; 845 break; 846 } 847 848 /* 849 * Make sure the given segment register specifies a user priority 850 * selector rather than a kernel selector. 851 */ 852 if (!SELISUPL(sel)) 853 return (-1); 854 855 ndx = SELTOIDX(sel); 856 857 /* 858 * Check the bounds and grab the descriptor out of the specified 859 * descriptor table. 860 */ 861 if (SELISLDT(sel)) { 862 if (ndx > p->p_ldtlimit) 863 return (-1); 864 865 desc = p->p_ldt + ndx; 866 867 } else { 868 if (ndx >= NGDT) 869 return (-1); 870 871 desc = cpu_get_gdt() + ndx; 872 } 873 874 /* 875 * The descriptor must have user privilege level and it must be 876 * present in memory. 877 */ 878 if (desc->usd_dpl != SEL_UPL || desc->usd_p != 1) 879 return (-1); 880 881 type = desc->usd_type; 882 883 /* 884 * If the S bit in the type field is not set, this descriptor can 885 * only be used in system context. 886 */ 887 if ((type & 0x10) != 0x10) 888 return (-1); 889 890 limit = USEGD_GETLIMIT(desc) * (desc->usd_gran ? PAGESIZE : 1); 891 892 if (tp->ftt_segment == FASTTRAP_SEG_CS) { 893 /* 894 * The code/data bit and readable bit must both be set. 895 */ 896 if ((type & 0xa) != 0xa) 897 return (-1); 898 899 if (*addr > limit) 900 return (-1); 901 } else { 902 /* 903 * The code/data bit must be clear. 904 */ 905 if ((type & 0x8) != 0) 906 return (-1); 907 908 /* 909 * If the expand-down bit is clear, we just check the limit as 910 * it would naturally be applied. Otherwise, we need to check 911 * that the address is the range [limit + 1 .. 0xffff] or 912 * [limit + 1 ... 0xffffffff] depending on if the default 913 * operand size bit is set. 914 */ 915 if ((type & 0x4) == 0) { 916 if (*addr > limit) 917 return (-1); 918 } else if (desc->usd_def32) { 919 if (*addr < limit + 1 || 0xffff < *addr) 920 return (-1); 921 } else { 922 if (*addr < limit + 1 || 0xffffffff < *addr) 923 return (-1); 924 } 925 } 926 927 *addr += USEGD_GETBASE(desc); 928#endif /* 0 */ 929 return (0); 930} 931 932/* 933 * Due to variances between Solaris and xnu, I have split this into a 32 bit and 64 bit 934 * code path. It still takes an x86_saved_state_t* argument, because it must sometimes 935 * call other methods that require a x86_saved_state_t. 936 * 937 * NOTE!!!! 938 * 939 * Any changes made to this method must be echo'd in fasttrap_pid_probe64! 940 * 941 */ 942static int 943fasttrap_pid_probe32(x86_saved_state_t *regs) 944{ 945 ASSERT(is_saved_state32(regs)); 946 947 x86_saved_state32_t *regs32 = saved_state32(regs); 948 user_addr_t pc = regs32->eip - 1; 949 proc_t *p = current_proc(); 950 user_addr_t new_pc = 0; 951 fasttrap_bucket_t *bucket; 952 lck_mtx_t *pid_mtx; 953 fasttrap_tracepoint_t *tp, tp_local; 954 pid_t pid; 955 dtrace_icookie_t cookie; 956 uint_t is_enabled = 0; 957 958 uthread_t uthread = (uthread_t)get_bsdthread_info(current_thread()); 959 960 /* 961 * It's possible that a user (in a veritable orgy of bad planning) 962 * could redirect this thread's flow of control before it reached the 963 * return probe fasttrap. In this case we need to kill the process 964 * since it's in a unrecoverable state. 965 */ 966 if (uthread->t_dtrace_step) { 967 ASSERT(uthread->t_dtrace_on); 968 fasttrap_sigtrap(p, uthread, pc); 969 return (0); 970 } 971 972 /* 973 * Clear all user tracing flags. 974 */ 975 uthread->t_dtrace_ft = 0; 976 uthread->t_dtrace_pc = 0; 977 uthread->t_dtrace_npc = 0; 978 uthread->t_dtrace_scrpc = 0; 979 uthread->t_dtrace_astpc = 0; 980 981 /* 982 * Treat a child created by a call to vfork(2) as if it were its 983 * parent. We know that there's only one thread of control in such a 984 * process: this one. 985 */ 986 if (p->p_lflag & P_LINVFORK) { 987 proc_list_lock(); 988 while (p->p_lflag & P_LINVFORK) 989 p = p->p_pptr; 990 proc_list_unlock(); 991 } 992 993 pid = p->p_pid; 994 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 995 lck_mtx_lock(pid_mtx); 996 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 997 998 /* 999 * Lookup the tracepoint that the process just hit. 1000 */ 1001 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 1002 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 1003 tp->ftt_proc->ftpc_acount != 0) 1004 break; 1005 } 1006 1007 /* 1008 * If we couldn't find a matching tracepoint, either a tracepoint has 1009 * been inserted without using the pid<pid> ioctl interface (see 1010 * fasttrap_ioctl), or somehow we have mislaid this tracepoint. 1011 */ 1012 if (tp == NULL) { 1013 lck_mtx_unlock(pid_mtx); 1014 return (-1); 1015 } 1016 1017 /* 1018 * Set the program counter to the address of the traced instruction 1019 * so that it looks right in ustack() output. 1020 */ 1021 regs32->eip = pc; 1022 1023 if (tp->ftt_ids != NULL) { 1024 fasttrap_id_t *id; 1025 1026 uint32_t s0, s1, s2, s3, s4, s5; 1027 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp); 1028 1029 /* 1030 * In 32-bit mode, all arguments are passed on the 1031 * stack. If this is a function entry probe, we need 1032 * to skip the first entry on the stack as it 1033 * represents the return address rather than a 1034 * parameter to the function. 1035 */ 1036 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[0], &s0); 1037 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[1], &s1); 1038 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[2], &s2); 1039 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[3], &s3); 1040 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[4], &s4); 1041 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[5], &s5); 1042 1043 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1044 fasttrap_probe_t *probe = id->fti_probe; 1045 1046 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) { 1047 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id, 1048 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV); 1049 } else if (id->fti_ptype == DTFTP_ENTRY) { 1050 /* 1051 * We note that this was an entry 1052 * probe to help ustack() find the 1053 * first caller. 1054 */ 1055 cookie = dtrace_interrupt_disable(); 1056 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1057 dtrace_probe(probe->ftp_id, s1, s2, 1058 s3, s4, s5); 1059 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1060 dtrace_interrupt_enable(cookie); 1061 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1062 /* 1063 * Note that in this case, we don't 1064 * call dtrace_probe() since it's only 1065 * an artificial probe meant to change 1066 * the flow of control so that it 1067 * encounters the true probe. 1068 */ 1069 is_enabled = 1; 1070 } else if (probe->ftp_argmap == NULL) { 1071 dtrace_probe(probe->ftp_id, s0, s1, 1072 s2, s3, s4); 1073 } else { 1074 uint32_t t[5]; 1075 1076 fasttrap_usdt_args32(probe, regs32, 1077 sizeof (t) / sizeof (t[0]), t); 1078 1079 dtrace_probe(probe->ftp_id, t[0], t[1], 1080 t[2], t[3], t[4]); 1081 } 1082 1083 /* APPLE NOTE: Oneshot probes get one and only one chance... */ 1084 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) { 1085 fasttrap_tracepoint_remove(p, tp); 1086 } 1087 } 1088 } 1089 1090 /* 1091 * We're about to do a bunch of work so we cache a local copy of 1092 * the tracepoint to emulate the instruction, and then find the 1093 * tracepoint again later if we need to light up any return probes. 1094 */ 1095 tp_local = *tp; 1096 lck_mtx_unlock(pid_mtx); 1097 tp = &tp_local; 1098 1099 /* 1100 * Set the program counter to appear as though the traced instruction 1101 * had completely executed. This ensures that fasttrap_getreg() will 1102 * report the expected value for REG_RIP. 1103 */ 1104 regs32->eip = pc + tp->ftt_size; 1105 1106 /* 1107 * If there's an is-enabled probe connected to this tracepoint it 1108 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax' 1109 * instruction that was placed there by DTrace when the binary was 1110 * linked. As this probe is, in fact, enabled, we need to stuff 1 1111 * into %eax or %rax. Accordingly, we can bypass all the instruction 1112 * emulation logic since we know the inevitable result. It's possible 1113 * that a user could construct a scenario where the 'is-enabled' 1114 * probe was on some other instruction, but that would be a rather 1115 * exotic way to shoot oneself in the foot. 1116 */ 1117 if (is_enabled) { 1118 regs32->eax = 1; 1119 new_pc = regs32->eip; 1120 goto done; 1121 } 1122 1123 /* 1124 * We emulate certain types of instructions to ensure correctness 1125 * (in the case of position dependent instructions) or optimize 1126 * common cases. The rest we have the thread execute back in user- 1127 * land. 1128 */ 1129 switch (tp->ftt_type) { 1130 case FASTTRAP_T_RET: 1131 case FASTTRAP_T_RET16: 1132 { 1133 user_addr_t dst; 1134 user_addr_t addr; 1135 int ret; 1136 1137 /* 1138 * We have to emulate _every_ facet of the behavior of a ret 1139 * instruction including what happens if the load from %esp 1140 * fails; in that case, we send a SIGSEGV. 1141 */ 1142 uint32_t dst32; 1143 ret = fasttrap_fuword32((user_addr_t)regs32->uesp, &dst32); 1144 dst = dst32; 1145 addr = regs32->uesp + sizeof (uint32_t); 1146 1147 if (ret == -1) { 1148 fasttrap_sigsegv(p, uthread, (user_addr_t)regs32->uesp); 1149 new_pc = pc; 1150 break; 1151 } 1152 1153 if (tp->ftt_type == FASTTRAP_T_RET16) 1154 addr += tp->ftt_dest; 1155 1156 regs32->uesp = addr; 1157 new_pc = dst; 1158 break; 1159 } 1160 1161 case FASTTRAP_T_JCC: 1162 { 1163 uint_t taken; 1164 1165 switch (tp->ftt_code) { 1166 case FASTTRAP_JO: 1167 taken = (regs32->efl & FASTTRAP_EFLAGS_OF) != 0; 1168 break; 1169 case FASTTRAP_JNO: 1170 taken = (regs32->efl & FASTTRAP_EFLAGS_OF) == 0; 1171 break; 1172 case FASTTRAP_JB: 1173 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) != 0; 1174 break; 1175 case FASTTRAP_JAE: 1176 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) == 0; 1177 break; 1178 case FASTTRAP_JE: 1179 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0; 1180 break; 1181 case FASTTRAP_JNE: 1182 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0; 1183 break; 1184 case FASTTRAP_JBE: 1185 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) != 0 || 1186 (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0; 1187 break; 1188 case FASTTRAP_JA: 1189 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) == 0 && 1190 (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0; 1191 break; 1192 case FASTTRAP_JS: 1193 taken = (regs32->efl & FASTTRAP_EFLAGS_SF) != 0; 1194 break; 1195 case FASTTRAP_JNS: 1196 taken = (regs32->efl & FASTTRAP_EFLAGS_SF) == 0; 1197 break; 1198 case FASTTRAP_JP: 1199 taken = (regs32->efl & FASTTRAP_EFLAGS_PF) != 0; 1200 break; 1201 case FASTTRAP_JNP: 1202 taken = (regs32->efl & FASTTRAP_EFLAGS_PF) == 0; 1203 break; 1204 case FASTTRAP_JL: 1205 taken = ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) != 1206 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0); 1207 break; 1208 case FASTTRAP_JGE: 1209 taken = ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) == 1210 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0); 1211 break; 1212 case FASTTRAP_JLE: 1213 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0 || 1214 ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) != 1215 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0); 1216 break; 1217 case FASTTRAP_JG: 1218 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0 && 1219 ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) == 1220 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0); 1221 break; 1222 default: 1223 taken = FALSE; 1224 } 1225 1226 if (taken) 1227 new_pc = tp->ftt_dest; 1228 else 1229 new_pc = pc + tp->ftt_size; 1230 break; 1231 } 1232 1233 case FASTTRAP_T_LOOP: 1234 { 1235 uint_t taken; 1236 greg_t cx = regs32->ecx--; 1237 1238 switch (tp->ftt_code) { 1239 case FASTTRAP_LOOPNZ: 1240 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0 && 1241 cx != 0; 1242 break; 1243 case FASTTRAP_LOOPZ: 1244 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0 && 1245 cx != 0; 1246 break; 1247 case FASTTRAP_LOOP: 1248 taken = (cx != 0); 1249 break; 1250 default: 1251 taken = FALSE; 1252 } 1253 1254 if (taken) 1255 new_pc = tp->ftt_dest; 1256 else 1257 new_pc = pc + tp->ftt_size; 1258 break; 1259 } 1260 1261 case FASTTRAP_T_JCXZ: 1262 { 1263 greg_t cx = regs32->ecx; 1264 1265 if (cx == 0) 1266 new_pc = tp->ftt_dest; 1267 else 1268 new_pc = pc + tp->ftt_size; 1269 break; 1270 } 1271 1272 case FASTTRAP_T_PUSHL_EBP: 1273 { 1274 user_addr_t addr = regs32->uesp - sizeof (uint32_t); 1275 int ret = fasttrap_suword32(addr, (uint32_t)regs32->ebp); 1276 1277 if (ret == -1) { 1278 fasttrap_sigsegv(p, uthread, addr); 1279 new_pc = pc; 1280 break; 1281 } 1282 1283 regs32->uesp = addr; 1284 new_pc = pc + tp->ftt_size; 1285 break; 1286 } 1287 1288 case FASTTRAP_T_NOP: 1289 new_pc = pc + tp->ftt_size; 1290 break; 1291 1292 case FASTTRAP_T_JMP: 1293 case FASTTRAP_T_CALL: 1294 if (tp->ftt_code == 0) { 1295 new_pc = tp->ftt_dest; 1296 } else { 1297 user_addr_t /* value ,*/ addr = tp->ftt_dest; 1298 1299 if (tp->ftt_base != FASTTRAP_NOREG) 1300 addr += fasttrap_getreg(regs, tp->ftt_base); 1301 if (tp->ftt_index != FASTTRAP_NOREG) 1302 addr += fasttrap_getreg(regs, tp->ftt_index) << 1303 tp->ftt_scale; 1304 1305 if (tp->ftt_code == 1) { 1306 /* 1307 * If there's a segment prefix for this 1308 * instruction, we'll need to check permissions 1309 * and bounds on the given selector, and adjust 1310 * the address accordingly. 1311 */ 1312 if (tp->ftt_segment != FASTTRAP_SEG_NONE && 1313 fasttrap_do_seg(tp, regs, &addr) != 0) { 1314 fasttrap_sigsegv(p, uthread, addr); 1315 new_pc = pc; 1316 break; 1317 } 1318 1319 uint32_t value32; 1320 addr = (user_addr_t)(uint32_t)addr; 1321 if (fasttrap_fuword32(addr, &value32) == -1) { 1322 fasttrap_sigsegv(p, uthread, addr); 1323 new_pc = pc; 1324 break; 1325 } 1326 new_pc = value32; 1327 } else { 1328 new_pc = addr; 1329 } 1330 } 1331 1332 /* 1333 * If this is a call instruction, we need to push the return 1334 * address onto the stack. If this fails, we send the process 1335 * a SIGSEGV and reset the pc to emulate what would happen if 1336 * this instruction weren't traced. 1337 */ 1338 if (tp->ftt_type == FASTTRAP_T_CALL) { 1339 user_addr_t addr = regs32->uesp - sizeof (uint32_t); 1340 int ret = fasttrap_suword32(addr, (uint32_t)(pc + tp->ftt_size)); 1341 1342 if (ret == -1) { 1343 fasttrap_sigsegv(p, uthread, addr); 1344 new_pc = pc; 1345 break; 1346 } 1347 1348 regs32->uesp = addr; 1349 } 1350 break; 1351 1352 case FASTTRAP_T_COMMON: 1353 { 1354 user_addr_t addr; 1355 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7]; 1356 uint_t i = 0; 1357 1358 /* 1359 * Generic Instruction Tracing 1360 * --------------------------- 1361 * 1362 * This is the layout of the scratch space in the user-land 1363 * thread structure for our generated instructions. 1364 * 1365 * 32-bit mode bytes 1366 * ------------------------ ----- 1367 * a: <original instruction> <= 15 1368 * jmp <pc + tp->ftt_size> 5 1369 * b: <original instrction> <= 15 1370 * int T_DTRACE_RET 2 1371 * ----- 1372 * <= 37 1373 * 1374 * 64-bit mode bytes 1375 * ------------------------ ----- 1376 * a: <original instruction> <= 15 1377 * jmp 0(%rip) 6 1378 * <pc + tp->ftt_size> 8 1379 * b: <original instruction> <= 15 1380 * int T_DTRACE_RET 2 1381 * ----- 1382 * <= 46 1383 * 1384 * The %pc is set to a, and curthread->t_dtrace_astpc is set 1385 * to b. If we encounter a signal on the way out of the 1386 * kernel, trap() will set %pc to curthread->t_dtrace_astpc 1387 * so that we execute the original instruction and re-enter 1388 * the kernel rather than redirecting to the next instruction. 1389 * 1390 * If there are return probes (so we know that we're going to 1391 * need to reenter the kernel after executing the original 1392 * instruction), the scratch space will just contain the 1393 * original instruction followed by an interrupt -- the same 1394 * data as at b. 1395 */ 1396 1397 addr = uthread->t_dtrace_scratch->addr; 1398 1399 if (addr == 0LL) { 1400 fasttrap_sigtrap(p, uthread, pc); // Should be killing target proc 1401 new_pc = pc; 1402 break; 1403 } 1404 1405 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE); 1406 1407 uthread->t_dtrace_scrpc = addr; 1408 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1409 i += tp->ftt_size; 1410 1411 /* 1412 * Set up the jmp to the next instruction; note that 1413 * the size of the traced instruction cancels out. 1414 */ 1415 scratch[i++] = FASTTRAP_JMP32; 1416 /* LINTED - alignment */ 1417 *(uint32_t *)&scratch[i] = pc - addr - 5; 1418 i += sizeof (uint32_t); 1419 1420 uthread->t_dtrace_astpc = addr + i; 1421 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1422 i += tp->ftt_size; 1423 scratch[i++] = FASTTRAP_INT; 1424 scratch[i++] = T_DTRACE_RET; 1425 1426 ASSERT(i <= sizeof (scratch)); 1427 1428 if (fasttrap_copyout(scratch, addr, i)) { 1429 fasttrap_sigtrap(p, uthread, pc); 1430 new_pc = pc; 1431 break; 1432 } 1433 1434 if (tp->ftt_retids != NULL) { 1435 uthread->t_dtrace_step = 1; 1436 uthread->t_dtrace_ret = 1; 1437 new_pc = uthread->t_dtrace_astpc; 1438 } else { 1439 new_pc = uthread->t_dtrace_scrpc; 1440 } 1441 1442 uthread->t_dtrace_pc = pc; 1443 uthread->t_dtrace_npc = pc + tp->ftt_size; 1444 uthread->t_dtrace_on = 1; 1445 break; 1446 } 1447 1448 default: 1449 panic("fasttrap: mishandled an instruction"); 1450 } 1451 1452done: 1453 /* 1454 * APPLE NOTE: 1455 * 1456 * We're setting this earlier than Solaris does, to get a "correct" 1457 * ustack() output. In the Sun code, a() -> b() -> c() -> d() is 1458 * reported at: d, b, a. The new way gives c, b, a, which is closer 1459 * to correct, as the return instruction has already exectued. 1460 */ 1461 regs32->eip = new_pc; 1462 1463 /* 1464 * If there were no return probes when we first found the tracepoint, 1465 * we should feel no obligation to honor any return probes that were 1466 * subsequently enabled -- they'll just have to wait until the next 1467 * time around. 1468 */ 1469 if (tp->ftt_retids != NULL) { 1470 /* 1471 * We need to wait until the results of the instruction are 1472 * apparent before invoking any return probes. If this 1473 * instruction was emulated we can just call 1474 * fasttrap_return_common(); if it needs to be executed, we 1475 * need to wait until the user thread returns to the kernel. 1476 */ 1477 if (tp->ftt_type != FASTTRAP_T_COMMON) { 1478 fasttrap_return_common(regs, pc, pid, new_pc); 1479 } else { 1480 ASSERT(uthread->t_dtrace_ret != 0); 1481 ASSERT(uthread->t_dtrace_pc == pc); 1482 ASSERT(uthread->t_dtrace_scrpc != 0); 1483 ASSERT(new_pc == uthread->t_dtrace_astpc); 1484 } 1485 } 1486 1487 return (0); 1488} 1489 1490/* 1491 * Due to variances between Solaris and xnu, I have split this into a 32 bit and 64 bit 1492 * code path. It still takes an x86_saved_state_t* argument, because it must sometimes 1493 * call other methods that require a x86_saved_state_t. 1494 * 1495 * NOTE!!!! 1496 * 1497 * Any changes made to this method must be echo'd in fasttrap_pid_probe32! 1498 * 1499 */ 1500static int 1501fasttrap_pid_probe64(x86_saved_state_t *regs) 1502{ 1503 ASSERT(is_saved_state64(regs)); 1504 1505 x86_saved_state64_t *regs64 = saved_state64(regs); 1506 user_addr_t pc = regs64->isf.rip - 1; 1507 proc_t *p = current_proc(); 1508 user_addr_t new_pc = 0; 1509 fasttrap_bucket_t *bucket; 1510 lck_mtx_t *pid_mtx; 1511 fasttrap_tracepoint_t *tp, tp_local; 1512 pid_t pid; 1513 dtrace_icookie_t cookie; 1514 uint_t is_enabled = 0; 1515 1516 uthread_t uthread = (uthread_t)get_bsdthread_info(current_thread()); 1517 1518 /* 1519 * It's possible that a user (in a veritable orgy of bad planning) 1520 * could redirect this thread's flow of control before it reached the 1521 * return probe fasttrap. In this case we need to kill the process 1522 * since it's in a unrecoverable state. 1523 */ 1524 if (uthread->t_dtrace_step) { 1525 ASSERT(uthread->t_dtrace_on); 1526 fasttrap_sigtrap(p, uthread, pc); 1527 return (0); 1528 } 1529 1530 /* 1531 * Clear all user tracing flags. 1532 */ 1533 uthread->t_dtrace_ft = 0; 1534 uthread->t_dtrace_pc = 0; 1535 uthread->t_dtrace_npc = 0; 1536 uthread->t_dtrace_scrpc = 0; 1537 uthread->t_dtrace_astpc = 0; 1538 uthread->t_dtrace_regv = 0; 1539 1540 /* 1541 * Treat a child created by a call to vfork(2) as if it were its 1542 * parent. We know that there's only one thread of control in such a 1543 * process: this one. 1544 */ 1545 if (p->p_lflag & P_LINVFORK) { 1546 proc_list_lock(); 1547 while (p->p_lflag & P_LINVFORK) 1548 p = p->p_pptr; 1549 proc_list_unlock(); 1550 } 1551 1552 pid = p->p_pid; 1553 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 1554 lck_mtx_lock(pid_mtx); 1555 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 1556 1557 /* 1558 * Lookup the tracepoint that the process just hit. 1559 */ 1560 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 1561 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 1562 tp->ftt_proc->ftpc_acount != 0) 1563 break; 1564 } 1565 1566 /* 1567 * If we couldn't find a matching tracepoint, either a tracepoint has 1568 * been inserted without using the pid<pid> ioctl interface (see 1569 * fasttrap_ioctl), or somehow we have mislaid this tracepoint. 1570 */ 1571 if (tp == NULL) { 1572 lck_mtx_unlock(pid_mtx); 1573 return (-1); 1574 } 1575 1576 /* 1577 * Set the program counter to the address of the traced instruction 1578 * so that it looks right in ustack() output. 1579 */ 1580 regs64->isf.rip = pc; 1581 1582 if (tp->ftt_ids != NULL) { 1583 fasttrap_id_t *id; 1584 1585 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1586 fasttrap_probe_t *probe = id->fti_probe; 1587 1588 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) { 1589 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id, 1590 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV); 1591 } else if (id->fti_ptype == DTFTP_ENTRY) { 1592 /* 1593 * We note that this was an entry 1594 * probe to help ustack() find the 1595 * first caller. 1596 */ 1597 cookie = dtrace_interrupt_disable(); 1598 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1599 dtrace_probe(probe->ftp_id, regs64->rdi, 1600 regs64->rsi, regs64->rdx, regs64->rcx, 1601 regs64->r8); 1602 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1603 dtrace_interrupt_enable(cookie); 1604 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1605 /* 1606 * Note that in this case, we don't 1607 * call dtrace_probe() since it's only 1608 * an artificial probe meant to change 1609 * the flow of control so that it 1610 * encounters the true probe. 1611 */ 1612 is_enabled = 1; 1613 } else if (probe->ftp_argmap == NULL) { 1614 dtrace_probe(probe->ftp_id, regs64->rdi, 1615 regs64->rsi, regs64->rdx, regs64->rcx, 1616 regs64->r8); 1617 } else { 1618 uint64_t t[5]; 1619 1620 fasttrap_usdt_args64(probe, regs64, 1621 sizeof (t) / sizeof (t[0]), t); 1622 1623 dtrace_probe(probe->ftp_id, t[0], t[1], 1624 t[2], t[3], t[4]); 1625 } 1626 1627 /* APPLE NOTE: Oneshot probes get one and only one chance... */ 1628 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) { 1629 fasttrap_tracepoint_remove(p, tp); 1630 } 1631 } 1632 } 1633 1634 /* 1635 * We're about to do a bunch of work so we cache a local copy of 1636 * the tracepoint to emulate the instruction, and then find the 1637 * tracepoint again later if we need to light up any return probes. 1638 */ 1639 tp_local = *tp; 1640 lck_mtx_unlock(pid_mtx); 1641 tp = &tp_local; 1642 1643 /* 1644 * Set the program counter to appear as though the traced instruction 1645 * had completely executed. This ensures that fasttrap_getreg() will 1646 * report the expected value for REG_RIP. 1647 */ 1648 regs64->isf.rip = pc + tp->ftt_size; 1649 1650 /* 1651 * If there's an is-enabled probe connected to this tracepoint it 1652 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax' 1653 * instruction that was placed there by DTrace when the binary was 1654 * linked. As this probe is, in fact, enabled, we need to stuff 1 1655 * into %eax or %rax. Accordingly, we can bypass all the instruction 1656 * emulation logic since we know the inevitable result. It's possible 1657 * that a user could construct a scenario where the 'is-enabled' 1658 * probe was on some other instruction, but that would be a rather 1659 * exotic way to shoot oneself in the foot. 1660 */ 1661 if (is_enabled) { 1662 regs64->rax = 1; 1663 new_pc = regs64->isf.rip; 1664 goto done; 1665 } 1666 1667 /* 1668 * We emulate certain types of instructions to ensure correctness 1669 * (in the case of position dependent instructions) or optimize 1670 * common cases. The rest we have the thread execute back in user- 1671 * land. 1672 */ 1673 switch (tp->ftt_type) { 1674 case FASTTRAP_T_RET: 1675 case FASTTRAP_T_RET16: 1676 { 1677 user_addr_t dst; 1678 user_addr_t addr; 1679 int ret; 1680 1681 /* 1682 * We have to emulate _every_ facet of the behavior of a ret 1683 * instruction including what happens if the load from %esp 1684 * fails; in that case, we send a SIGSEGV. 1685 */ 1686 ret = fasttrap_fuword64((user_addr_t)regs64->isf.rsp, &dst); 1687 addr = regs64->isf.rsp + sizeof (uint64_t); 1688 1689 if (ret == -1) { 1690 fasttrap_sigsegv(p, uthread, (user_addr_t)regs64->isf.rsp); 1691 new_pc = pc; 1692 break; 1693 } 1694 1695 if (tp->ftt_type == FASTTRAP_T_RET16) 1696 addr += tp->ftt_dest; 1697 1698 regs64->isf.rsp = addr; 1699 new_pc = dst; 1700 break; 1701 } 1702 1703 case FASTTRAP_T_JCC: 1704 { 1705 uint_t taken; 1706 1707 switch (tp->ftt_code) { 1708 case FASTTRAP_JO: 1709 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_OF) != 0; 1710 break; 1711 case FASTTRAP_JNO: 1712 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0; 1713 break; 1714 case FASTTRAP_JB: 1715 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) != 0; 1716 break; 1717 case FASTTRAP_JAE: 1718 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) == 0; 1719 break; 1720 case FASTTRAP_JE: 1721 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0; 1722 break; 1723 case FASTTRAP_JNE: 1724 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0; 1725 break; 1726 case FASTTRAP_JBE: 1727 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) != 0 || 1728 (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0; 1729 break; 1730 case FASTTRAP_JA: 1731 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) == 0 && 1732 (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0; 1733 break; 1734 case FASTTRAP_JS: 1735 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_SF) != 0; 1736 break; 1737 case FASTTRAP_JNS: 1738 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0; 1739 break; 1740 case FASTTRAP_JP: 1741 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_PF) != 0; 1742 break; 1743 case FASTTRAP_JNP: 1744 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_PF) == 0; 1745 break; 1746 case FASTTRAP_JL: 1747 taken = ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) != 1748 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0); 1749 break; 1750 case FASTTRAP_JGE: 1751 taken = ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) == 1752 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0); 1753 break; 1754 case FASTTRAP_JLE: 1755 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0 || 1756 ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) != 1757 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0); 1758 break; 1759 case FASTTRAP_JG: 1760 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1761 ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) == 1762 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0); 1763 break; 1764 default: 1765 taken = FALSE; 1766 } 1767 1768 if (taken) 1769 new_pc = tp->ftt_dest; 1770 else 1771 new_pc = pc + tp->ftt_size; 1772 break; 1773 } 1774 1775 case FASTTRAP_T_LOOP: 1776 { 1777 uint_t taken; 1778 uint64_t cx = regs64->rcx--; 1779 1780 switch (tp->ftt_code) { 1781 case FASTTRAP_LOOPNZ: 1782 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1783 cx != 0; 1784 break; 1785 case FASTTRAP_LOOPZ: 1786 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0 && 1787 cx != 0; 1788 break; 1789 case FASTTRAP_LOOP: 1790 taken = (cx != 0); 1791 break; 1792 default: 1793 taken = FALSE; 1794 } 1795 1796 if (taken) 1797 new_pc = tp->ftt_dest; 1798 else 1799 new_pc = pc + tp->ftt_size; 1800 break; 1801 } 1802 1803 case FASTTRAP_T_JCXZ: 1804 { 1805 uint64_t cx = regs64->rcx; 1806 1807 if (cx == 0) 1808 new_pc = tp->ftt_dest; 1809 else 1810 new_pc = pc + tp->ftt_size; 1811 break; 1812 } 1813 1814 case FASTTRAP_T_PUSHL_EBP: 1815 { 1816 user_addr_t addr = regs64->isf.rsp - sizeof (uint64_t); 1817 int ret = fasttrap_suword64(addr, (uint64_t)regs64->rbp); 1818 1819 if (ret == -1) { 1820 fasttrap_sigsegv(p, uthread, addr); 1821 new_pc = pc; 1822 break; 1823 } 1824 1825 regs64->isf.rsp = addr; 1826 new_pc = pc + tp->ftt_size; 1827 break; 1828 } 1829 1830 case FASTTRAP_T_NOP: 1831 new_pc = pc + tp->ftt_size; 1832 break; 1833 1834 case FASTTRAP_T_JMP: 1835 case FASTTRAP_T_CALL: 1836 if (tp->ftt_code == 0) { 1837 new_pc = tp->ftt_dest; 1838 } else { 1839 user_addr_t value, addr = tp->ftt_dest; 1840 1841 if (tp->ftt_base != FASTTRAP_NOREG) 1842 addr += fasttrap_getreg(regs, tp->ftt_base); 1843 if (tp->ftt_index != FASTTRAP_NOREG) 1844 addr += fasttrap_getreg(regs, tp->ftt_index) << 1845 tp->ftt_scale; 1846 1847 if (tp->ftt_code == 1) { 1848 /* 1849 * If there's a segment prefix for this 1850 * instruction, we'll need to check permissions 1851 * and bounds on the given selector, and adjust 1852 * the address accordingly. 1853 */ 1854 if (tp->ftt_segment != FASTTRAP_SEG_NONE && 1855 fasttrap_do_seg(tp, regs, &addr) != 0) { 1856 fasttrap_sigsegv(p, uthread, addr); 1857 new_pc = pc; 1858 break; 1859 } 1860 1861 if (fasttrap_fuword64(addr, &value) == -1) { 1862 fasttrap_sigsegv(p, uthread, addr); 1863 new_pc = pc; 1864 break; 1865 } 1866 new_pc = value; 1867 } else { 1868 new_pc = addr; 1869 } 1870 } 1871 1872 /* 1873 * If this is a call instruction, we need to push the return 1874 * address onto the stack. If this fails, we send the process 1875 * a SIGSEGV and reset the pc to emulate what would happen if 1876 * this instruction weren't traced. 1877 */ 1878 if (tp->ftt_type == FASTTRAP_T_CALL) { 1879 user_addr_t addr = regs64->isf.rsp - sizeof (uint64_t); 1880 int ret = fasttrap_suword64(addr, pc + tp->ftt_size); 1881 1882 if (ret == -1) { 1883 fasttrap_sigsegv(p, uthread, addr); 1884 new_pc = pc; 1885 break; 1886 } 1887 1888 regs64->isf.rsp = addr; 1889 } 1890 break; 1891 1892 case FASTTRAP_T_COMMON: 1893 { 1894 user_addr_t addr; 1895 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22]; 1896 uint_t i = 0; 1897 1898 /* 1899 * Generic Instruction Tracing 1900 * --------------------------- 1901 * 1902 * This is the layout of the scratch space in the user-land 1903 * thread structure for our generated instructions. 1904 * 1905 * 32-bit mode bytes 1906 * ------------------------ ----- 1907 * a: <original instruction> <= 15 1908 * jmp <pc + tp->ftt_size> 5 1909 * b: <original instrction> <= 15 1910 * int T_DTRACE_RET 2 1911 * ----- 1912 * <= 37 1913 * 1914 * 64-bit mode bytes 1915 * ------------------------ ----- 1916 * a: <original instruction> <= 15 1917 * jmp 0(%rip) 6 1918 * <pc + tp->ftt_size> 8 1919 * b: <original instruction> <= 15 1920 * int T_DTRACE_RET 2 1921 * ----- 1922 * <= 46 1923 * 1924 * The %pc is set to a, and curthread->t_dtrace_astpc is set 1925 * to b. If we encounter a signal on the way out of the 1926 * kernel, trap() will set %pc to curthread->t_dtrace_astpc 1927 * so that we execute the original instruction and re-enter 1928 * the kernel rather than redirecting to the next instruction. 1929 * 1930 * If there are return probes (so we know that we're going to 1931 * need to reenter the kernel after executing the original 1932 * instruction), the scratch space will just contain the 1933 * original instruction followed by an interrupt -- the same 1934 * data as at b. 1935 * 1936 * %rip-relative Addressing 1937 * ------------------------ 1938 * 1939 * There's a further complication in 64-bit mode due to %rip- 1940 * relative addressing. While this is clearly a beneficial 1941 * architectural decision for position independent code, it's 1942 * hard not to see it as a personal attack against the pid 1943 * provider since before there was a relatively small set of 1944 * instructions to emulate; with %rip-relative addressing, 1945 * almost every instruction can potentially depend on the 1946 * address at which it's executed. Rather than emulating 1947 * the broad spectrum of instructions that can now be 1948 * position dependent, we emulate jumps and others as in 1949 * 32-bit mode, and take a different tack for instructions 1950 * using %rip-relative addressing. 1951 * 1952 * For every instruction that uses the ModRM byte, the 1953 * in-kernel disassembler reports its location. We use the 1954 * ModRM byte to identify that an instruction uses 1955 * %rip-relative addressing and to see what other registers 1956 * the instruction uses. To emulate those instructions, 1957 * we modify the instruction to be %rax-relative rather than 1958 * %rip-relative (or %rcx-relative if the instruction uses 1959 * %rax; or %r8- or %r9-relative if the REX.B is present so 1960 * we don't have to rewrite the REX prefix). We then load 1961 * the value that %rip would have been into the scratch 1962 * register and generate an instruction to reset the scratch 1963 * register back to its original value. The instruction 1964 * sequence looks like this: 1965 * 1966 * 64-mode %rip-relative bytes 1967 * ------------------------ ----- 1968 * a: <modified instruction> <= 15 1969 * movq $<value>, %<scratch> 6 1970 * jmp 0(%rip) 6 1971 * <pc + tp->ftt_size> 8 1972 * b: <modified instruction> <= 15 1973 * int T_DTRACE_RET 2 1974 * ----- 1975 * 52 1976 * 1977 * We set curthread->t_dtrace_regv so that upon receiving 1978 * a signal we can reset the value of the scratch register. 1979 */ 1980 1981 addr = uthread->t_dtrace_scratch->addr; 1982 1983 if (addr == 0LL) { 1984 fasttrap_sigtrap(p, uthread, pc); // Should be killing target proc 1985 new_pc = pc; 1986 break; 1987 } 1988 1989 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE); 1990 1991 uthread->t_dtrace_scrpc = addr; 1992 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1993 i += tp->ftt_size; 1994 1995 if (tp->ftt_ripmode != 0) { 1996 uint64_t* reg; 1997 1998 ASSERT(tp->ftt_ripmode & 1999 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2)); 2000 2001 /* 2002 * If this was a %rip-relative instruction, we change 2003 * it to be either a %rax- or %rcx-relative 2004 * instruction (depending on whether those registers 2005 * are used as another operand; or %r8- or %r9- 2006 * relative depending on the value of REX.B). We then 2007 * set that register and generate a movq instruction 2008 * to reset the value. 2009 */ 2010 if (tp->ftt_ripmode & FASTTRAP_RIP_X) 2011 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1); 2012 else 2013 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0); 2014 2015 if (tp->ftt_ripmode & FASTTRAP_RIP_1) 2016 scratch[i++] = FASTTRAP_MOV_EAX; 2017 else 2018 scratch[i++] = FASTTRAP_MOV_ECX; 2019 2020 switch (tp->ftt_ripmode) { 2021 case FASTTRAP_RIP_1: 2022 reg = ®s64->rax; 2023 uthread->t_dtrace_reg = REG_RAX; 2024 break; 2025 case FASTTRAP_RIP_2: 2026 reg = ®s64->rcx; 2027 uthread->t_dtrace_reg = REG_RCX; 2028 break; 2029 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X: 2030 reg = ®s64->r8; 2031 uthread->t_dtrace_reg = REG_R8; 2032 break; 2033 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X: 2034 reg = ®s64->r9; 2035 uthread->t_dtrace_reg = REG_R9; 2036 break; 2037 default: 2038 reg = NULL; 2039 panic("unhandled ripmode in fasttrap_pid_probe64"); 2040 } 2041 2042 /* LINTED - alignment */ 2043 *(uint64_t *)&scratch[i] = *reg; 2044 uthread->t_dtrace_regv = *reg; 2045 *reg = pc + tp->ftt_size; 2046 i += sizeof (uint64_t); 2047 } 2048 2049 /* 2050 * Generate the branch instruction to what would have 2051 * normally been the subsequent instruction. In 32-bit mode, 2052 * this is just a relative branch; in 64-bit mode this is a 2053 * %rip-relative branch that loads the 64-bit pc value 2054 * immediately after the jmp instruction. 2055 */ 2056 scratch[i++] = FASTTRAP_GROUP5_OP; 2057 scratch[i++] = FASTTRAP_MODRM(0, 4, 5); 2058 /* LINTED - alignment */ 2059 *(uint32_t *)&scratch[i] = 0; 2060 i += sizeof (uint32_t); 2061 /* LINTED - alignment */ 2062 *(uint64_t *)&scratch[i] = pc + tp->ftt_size; 2063 i += sizeof (uint64_t); 2064 2065 uthread->t_dtrace_astpc = addr + i; 2066 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 2067 i += tp->ftt_size; 2068 scratch[i++] = FASTTRAP_INT; 2069 scratch[i++] = T_DTRACE_RET; 2070 2071 ASSERT(i <= sizeof (scratch)); 2072 2073 if (fasttrap_copyout(scratch, addr, i)) { 2074 fasttrap_sigtrap(p, uthread, pc); 2075 new_pc = pc; 2076 break; 2077 } 2078 2079 if (tp->ftt_retids != NULL) { 2080 uthread->t_dtrace_step = 1; 2081 uthread->t_dtrace_ret = 1; 2082 new_pc = uthread->t_dtrace_astpc; 2083 } else { 2084 new_pc = uthread->t_dtrace_scrpc; 2085 } 2086 2087 uthread->t_dtrace_pc = pc; 2088 uthread->t_dtrace_npc = pc + tp->ftt_size; 2089 uthread->t_dtrace_on = 1; 2090 break; 2091 } 2092 2093 default: 2094 panic("fasttrap: mishandled an instruction"); 2095 } 2096 2097done: 2098 /* 2099 * APPLE NOTE: 2100 * 2101 * We're setting this earlier than Solaris does, to get a "correct" 2102 * ustack() output. In the Sun code, a() -> b() -> c() -> d() is 2103 * reported at: d, b, a. The new way gives c, b, a, which is closer 2104 * to correct, as the return instruction has already exectued. 2105 */ 2106 regs64->isf.rip = new_pc; 2107 2108 2109 /* 2110 * If there were no return probes when we first found the tracepoint, 2111 * we should feel no obligation to honor any return probes that were 2112 * subsequently enabled -- they'll just have to wait until the next 2113 * time around. 2114 */ 2115 if (tp->ftt_retids != NULL) { 2116 /* 2117 * We need to wait until the results of the instruction are 2118 * apparent before invoking any return probes. If this 2119 * instruction was emulated we can just call 2120 * fasttrap_return_common(); if it needs to be executed, we 2121 * need to wait until the user thread returns to the kernel. 2122 */ 2123 if (tp->ftt_type != FASTTRAP_T_COMMON) { 2124 fasttrap_return_common(regs, pc, pid, new_pc); 2125 } else { 2126 ASSERT(uthread->t_dtrace_ret != 0); 2127 ASSERT(uthread->t_dtrace_pc == pc); 2128 ASSERT(uthread->t_dtrace_scrpc != 0); 2129 ASSERT(new_pc == uthread->t_dtrace_astpc); 2130 } 2131 } 2132 2133 return (0); 2134} 2135 2136int 2137fasttrap_pid_probe(x86_saved_state_t *regs) 2138{ 2139 if (is_saved_state64(regs)) 2140 return fasttrap_pid_probe64(regs); 2141 2142 return fasttrap_pid_probe32(regs); 2143} 2144 2145int 2146fasttrap_return_probe(x86_saved_state_t *regs) 2147{ 2148 x86_saved_state64_t *regs64; 2149 x86_saved_state32_t *regs32; 2150 unsigned int p_model; 2151 2152 if (is_saved_state64(regs)) { 2153 regs64 = saved_state64(regs); 2154 regs32 = NULL; 2155 p_model = DATAMODEL_LP64; 2156 } else { 2157 regs64 = NULL; 2158 regs32 = saved_state32(regs); 2159 p_model = DATAMODEL_ILP32; 2160 } 2161 2162 proc_t *p = current_proc(); 2163 uthread_t uthread = (uthread_t)get_bsdthread_info(current_thread()); 2164 user_addr_t pc = uthread->t_dtrace_pc; 2165 user_addr_t npc = uthread->t_dtrace_npc; 2166 2167 uthread->t_dtrace_pc = 0; 2168 uthread->t_dtrace_npc = 0; 2169 uthread->t_dtrace_scrpc = 0; 2170 uthread->t_dtrace_astpc = 0; 2171 2172 /* 2173 * Treat a child created by a call to vfork(2) as if it were its 2174 * parent. We know that there's only one thread of control in such a 2175 * process: this one. 2176 */ 2177 proc_list_lock(); 2178 while (p->p_lflag & P_LINVFORK) 2179 p = p->p_pptr; 2180 proc_list_unlock(); 2181 2182 /* 2183 * We set rp->r_pc to the address of the traced instruction so 2184 * that it appears to dtrace_probe() that we're on the original 2185 * instruction, and so that the user can't easily detect our 2186 * complex web of lies. dtrace_return_probe() (our caller) 2187 * will correctly set %pc after we return. 2188 */ 2189 if (p_model == DATAMODEL_LP64) 2190 regs64->isf.rip = pc; 2191 else 2192 regs32->eip = pc; 2193 2194 fasttrap_return_common(regs, pc, p->p_pid, npc); 2195 2196 return (0); 2197} 2198 2199uint64_t 2200fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 2201 int aframes) 2202{ 2203 pal_register_cache_state(current_thread(), VALID); 2204#pragma unused(arg, id, parg, aframes) 2205 return (fasttrap_anarg((x86_saved_state_t *)find_user_regs(current_thread()), 1, argno)); 2206} 2207 2208uint64_t 2209fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 2210 int aframes) 2211{ 2212 pal_register_cache_state(current_thread(), VALID); 2213#pragma unused(arg, id, parg, aframes) 2214 return (fasttrap_anarg((x86_saved_state_t *)find_user_regs(current_thread()), 0, argno)); 2215} 2216 2217/* 2218 * APPLE NOTE: See comments by regmap array definition. We are cheating 2219 * when returning 32 bit registers. 2220 */ 2221static user_addr_t 2222fasttrap_getreg(x86_saved_state_t *regs, uint_t reg) 2223{ 2224 if (is_saved_state64(regs)) { 2225 x86_saved_state64_t *regs64 = saved_state64(regs); 2226 2227 switch (reg) { 2228 case REG_RAX: return regs64->rax; 2229 case REG_RCX: return regs64->rcx; 2230 case REG_RDX: return regs64->rdx; 2231 case REG_RBX: return regs64->rbx; 2232 case REG_RSP: return regs64->isf.rsp; 2233 case REG_RBP: return regs64->rbp; 2234 case REG_RSI: return regs64->rsi; 2235 case REG_RDI: return regs64->rdi; 2236 case REG_R8: return regs64->r8; 2237 case REG_R9: return regs64->r9; 2238 case REG_R10: return regs64->r10; 2239 case REG_R11: return regs64->r11; 2240 case REG_R12: return regs64->r12; 2241 case REG_R13: return regs64->r13; 2242 case REG_R14: return regs64->r14; 2243 case REG_R15: return regs64->r15; 2244 case REG_TRAPNO: return regs64->isf.trapno; 2245 case REG_ERR: return regs64->isf.err; 2246 case REG_RIP: return regs64->isf.rip; 2247 case REG_CS: return regs64->isf.cs; 2248 case REG_RFL: return regs64->isf.rflags; 2249 case REG_SS: return regs64->isf.ss; 2250 case REG_FS: return regs64->fs; 2251 case REG_GS: return regs64->gs; 2252 case REG_ES: 2253 case REG_DS: 2254 case REG_FSBASE: 2255 case REG_GSBASE: 2256 // Important to distinguish these requests (which should be legal) from other values. 2257 panic("dtrace: unimplemented x86_64 getreg()"); 2258 } 2259 2260 panic("dtrace: unhandled x86_64 getreg() constant"); 2261 } else { 2262 x86_saved_state32_t *regs32 = saved_state32(regs); 2263 2264 switch (reg) { 2265 case REG_RAX: return regs32->eax; 2266 case REG_RCX: return regs32->ecx; 2267 case REG_RDX: return regs32->edx; 2268 case REG_RBX: return regs32->ebx; 2269 case REG_RSP: return regs32->uesp; 2270 case REG_RBP: return regs32->ebp; 2271 case REG_RSI: return regs32->esi; 2272 case REG_RDI: return regs32->edi; 2273 } 2274 2275 panic("dtrace: unhandled i386 getreg() constant"); 2276 } 2277 2278 return 0; 2279} 2280