1/* ARM assembler/disassembler support.
2   Copyright 2004 Free Software Foundation, Inc.
3
4   This file is part of GDB and GAS.
5
6   GDB and GAS are free software; you can redistribute it and/or
7   modify it under the terms of the GNU General Public License as
8   published by the Free Software Foundation; either version 1, or (at
9   your option) any later version.
10
11   GDB and GAS are distributed in the hope that it will be useful, but
12   WITHOUT ANY WARRANTY; without even the implied warranty of
13   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14   General Public License for more details.
15
16   You should have received a copy of the GNU General Public License
17   along with GDB or GAS; see the file COPYING.  If not, write to the
18   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19   02110-1301, USA.  */
20
21/* The following bitmasks control CPU extensions:  */
22#define ARM_EXT_V1	 0x00000001	/* All processors (core set).  */
23#define ARM_EXT_V2	 0x00000002	/* Multiply instructions.  */
24#define ARM_EXT_V2S	 0x00000004	/* SWP instructions.       */
25#define ARM_EXT_V3	 0x00000008	/* MSR MRS.                */
26#define ARM_EXT_V3M	 0x00000010	/* Allow long multiplies.  */
27#define ARM_EXT_V4	 0x00000020	/* Allow half word loads.  */
28#define ARM_EXT_V4T	 0x00000040	/* Thumb.                  */
29#define ARM_EXT_V5	 0x00000080	/* Allow CLZ, etc.         */
30#define ARM_EXT_V5T	 0x00000100	/* Improved interworking.  */
31#define ARM_EXT_V5ExP	 0x00000200	/* DSP core set.           */
32#define ARM_EXT_V5E	 0x00000400	/* DSP Double transfers.   */
33#define ARM_EXT_V5J	 0x00000800	/* Jazelle extension.	   */
34#define ARM_EXT_V6       0x00001000     /* ARM V6.                 */
35#define ARM_EXT_V6K      0x00002000     /* ARM V6K.                */
36#define ARM_EXT_V6Z      0x00004000     /* ARM V6Z.                */
37#define ARM_EXT_V6T2	 0x00008000	/* Thumb-2.                */
38#define ARM_EXT_DIV	 0x00010000	/* Integer division.       */
39/* The 'M' in Arm V7M stands for Microcontroller.
40   On earlier architecture variants it stands for Multiply.  */
41#define ARM_EXT_V5E_NOTM 0x00020000	/* Arm V5E but not Arm V7M. */
42#define ARM_EXT_V6_NOTM	 0x00040000	/* Arm V6 but not Arm V7M. */
43#define ARM_EXT_V7	 0x00080000	/* Arm V7.                 */
44#define ARM_EXT_V7A	 0x00100000	/* Arm V7A.                */
45#define ARM_EXT_V7R	 0x00200000	/* Arm V7R.                */
46#define ARM_EXT_V7M	 0x00400000	/* Arm V7M.                */
47
48/* Co-processor space extensions.  */
49#define ARM_CEXT_XSCALE   0x00000001	/* Allow MIA etc.          */
50#define ARM_CEXT_MAVERICK 0x00000002	/* Use Cirrus/DSP coprocessor.  */
51#define ARM_CEXT_IWMMXT   0x00000004    /* Intel Wireless MMX technology coprocessor.   */
52#define ARM_CEXT_IWMMXT2  0x00000008    /* Intel Wireless MMX technology coprocessor version 2.   */
53
54#define FPU_ENDIAN_PURE	 0x80000000	/* Pure-endian doubles.	      */
55#define FPU_ENDIAN_BIG	 0		/* Double words-big-endian.   */
56#define FPU_FPA_EXT_V1	 0x40000000	/* Base FPA instruction set.  */
57#define FPU_FPA_EXT_V2	 0x20000000	/* LFM/SFM.		      */
58#define FPU_MAVERICK	 0x10000000	/* Cirrus Maverick.	      */
59#define FPU_VFP_EXT_V1xD 0x08000000	/* Base VFP instruction set.  */
60#define FPU_VFP_EXT_V1	 0x04000000	/* Double-precision insns.    */
61#define FPU_VFP_EXT_V2	 0x02000000	/* ARM10E VFPr1.	      */
62#define FPU_VFP_EXT_V3	 0x01000000	/* VFPv3 insns.	              */
63#define FPU_NEON_EXT_V1	 0x00800000	/* Neon (SIMD) insns.	      */
64
65/* Architectures are the sum of the base and extensions.  The ARM ARM (rev E)
66   defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
67   ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE.  To these we add
68   three more to cover cores prior to ARM6.  Finally, there are cores which
69   implement further extensions in the co-processor space.  */
70#define ARM_AEXT_V1			  ARM_EXT_V1
71#define ARM_AEXT_V2	(ARM_AEXT_V1	| ARM_EXT_V2)
72#define ARM_AEXT_V2S	(ARM_AEXT_V2	| ARM_EXT_V2S)
73#define ARM_AEXT_V3	(ARM_AEXT_V2S	| ARM_EXT_V3)
74#define ARM_AEXT_V3M	(ARM_AEXT_V3	| ARM_EXT_V3M)
75#define ARM_AEXT_V4xM	(ARM_AEXT_V3	| ARM_EXT_V4)
76#define ARM_AEXT_V4	(ARM_AEXT_V3M	| ARM_EXT_V4)
77#define ARM_AEXT_V4TxM	(ARM_AEXT_V4xM	| ARM_EXT_V4T)
78#define ARM_AEXT_V4T	(ARM_AEXT_V4	| ARM_EXT_V4T)
79#define ARM_AEXT_V5xM	(ARM_AEXT_V4xM	| ARM_EXT_V5)
80#define ARM_AEXT_V5	(ARM_AEXT_V4	| ARM_EXT_V5)
81#define ARM_AEXT_V5TxM	(ARM_AEXT_V5xM	| ARM_EXT_V4T | ARM_EXT_V5T)
82#define ARM_AEXT_V5T	(ARM_AEXT_V5	| ARM_EXT_V4T | ARM_EXT_V5T)
83#define ARM_AEXT_V5TExP	(ARM_AEXT_V5T	| ARM_EXT_V5ExP)
84#define ARM_AEXT_V5TE	(ARM_AEXT_V5TExP | ARM_EXT_V5E)
85#define ARM_AEXT_V5TEJ	(ARM_AEXT_V5TE	| ARM_EXT_V5J)
86#define ARM_AEXT_V6     (ARM_AEXT_V5TEJ | ARM_EXT_V6)
87#define ARM_AEXT_V6K    (ARM_AEXT_V6    | ARM_EXT_V6K)
88#define ARM_AEXT_V6Z    (ARM_AEXT_V6    | ARM_EXT_V6Z)
89#define ARM_AEXT_V6ZK   (ARM_AEXT_V6    | ARM_EXT_V6K | ARM_EXT_V6Z)
90#define ARM_AEXT_V6T2   (ARM_AEXT_V6    | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM)
91#define ARM_AEXT_V6KT2  (ARM_AEXT_V6T2 | ARM_EXT_V6K)
92#define ARM_AEXT_V6ZT2  (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
93#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
94#define ARM_AEXT_V7_ARM	(ARM_AEXT_V6ZKT2 | ARM_EXT_V7)
95#define ARM_AEXT_V7A	(ARM_AEXT_V7_ARM | ARM_EXT_V7A)
96#define ARM_AEXT_V7R	(ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
97#define ARM_AEXT_NOTM \
98  (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM)
99#define ARM_AEXT_V7M \
100  ((ARM_AEXT_V7_ARM | ARM_EXT_V7M | ARM_EXT_DIV) & ~(ARM_AEXT_NOTM))
101#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
102
103/* Processors with specific extensions in the co-processor space.  */
104#define ARM_ARCH_XSCALE	ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
105#define ARM_ARCH_IWMMXT	\
106 ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT)
107#define ARM_ARCH_IWMMXT2	\
108 ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)
109
110#define FPU_VFP_V1xD	(FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
111#define FPU_VFP_V1	(FPU_VFP_V1xD | FPU_VFP_EXT_V1)
112#define FPU_VFP_V2	(FPU_VFP_V1 | FPU_VFP_EXT_V2)
113#define FPU_VFP_V3	(FPU_VFP_V2 | FPU_VFP_EXT_V3)
114#define FPU_VFP_HARD	(FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
115                         | FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1)
116#define FPU_FPA		(FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
117
118/* Deprecated */
119#define FPU_ARCH_VFP	ARM_FEATURE (0, FPU_ENDIAN_PURE)
120
121#define FPU_ARCH_FPE	ARM_FEATURE (0, FPU_FPA_EXT_V1)
122#define FPU_ARCH_FPA	ARM_FEATURE (0, FPU_FPA)
123
124#define FPU_ARCH_VFP_V1xD ARM_FEATURE (0, FPU_VFP_V1xD)
125#define FPU_ARCH_VFP_V1	  ARM_FEATURE (0, FPU_VFP_V1)
126#define FPU_ARCH_VFP_V2	  ARM_FEATURE (0, FPU_VFP_V2)
127#define FPU_ARCH_VFP_V3	  ARM_FEATURE (0, FPU_VFP_V3)
128#define FPU_ARCH_NEON_V1  ARM_FEATURE (0, FPU_NEON_EXT_V1)
129#define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
130  ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1)
131#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
132
133#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
134
135#define FPU_ARCH_MAVERICK ARM_FEATURE (0, FPU_MAVERICK)
136
137#define ARM_ARCH_V1	ARM_FEATURE (ARM_AEXT_V1, 0)
138#define ARM_ARCH_V2	ARM_FEATURE (ARM_AEXT_V2, 0)
139#define ARM_ARCH_V2S	ARM_FEATURE (ARM_AEXT_V2S, 0)
140#define ARM_ARCH_V3	ARM_FEATURE (ARM_AEXT_V3, 0)
141#define ARM_ARCH_V3M	ARM_FEATURE (ARM_AEXT_V3M, 0)
142#define ARM_ARCH_V4xM	ARM_FEATURE (ARM_AEXT_V4xM, 0)
143#define ARM_ARCH_V4	ARM_FEATURE (ARM_AEXT_V4, 0)
144#define ARM_ARCH_V4TxM	ARM_FEATURE (ARM_AEXT_V4TxM, 0)
145#define ARM_ARCH_V4T	ARM_FEATURE (ARM_AEXT_V4T, 0)
146#define ARM_ARCH_V5xM	ARM_FEATURE (ARM_AEXT_V5xM, 0)
147#define ARM_ARCH_V5	ARM_FEATURE (ARM_AEXT_V5, 0)
148#define ARM_ARCH_V5TxM	ARM_FEATURE (ARM_AEXT_V5TxM, 0)
149#define ARM_ARCH_V5T	ARM_FEATURE (ARM_AEXT_V5T, 0)
150#define ARM_ARCH_V5TExP	ARM_FEATURE (ARM_AEXT_V5TExP, 0)
151#define ARM_ARCH_V5TE	ARM_FEATURE (ARM_AEXT_V5TE, 0)
152#define ARM_ARCH_V5TEJ	ARM_FEATURE (ARM_AEXT_V5TEJ, 0)
153#define ARM_ARCH_V6	ARM_FEATURE (ARM_AEXT_V6, 0)
154#define ARM_ARCH_V6K	ARM_FEATURE (ARM_AEXT_V6K, 0)
155#define ARM_ARCH_V6Z	ARM_FEATURE (ARM_AEXT_V6Z, 0)
156#define ARM_ARCH_V6ZK	ARM_FEATURE (ARM_AEXT_V6ZK, 0)
157#define ARM_ARCH_V6T2	ARM_FEATURE (ARM_AEXT_V6T2, 0)
158#define ARM_ARCH_V6KT2	ARM_FEATURE (ARM_AEXT_V6KT2, 0)
159#define ARM_ARCH_V6ZT2	ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
160#define ARM_ARCH_V6ZKT2	ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
161#define ARM_ARCH_V7	ARM_FEATURE (ARM_AEXT_V7, 0)
162#define ARM_ARCH_V7A	ARM_FEATURE (ARM_AEXT_V7A, 0)
163#define ARM_ARCH_V7R	ARM_FEATURE (ARM_AEXT_V7R, 0)
164#define ARM_ARCH_V7M	ARM_FEATURE (ARM_AEXT_V7M, 0)
165
166/* Some useful combinations:  */
167#define ARM_ARCH_NONE	ARM_FEATURE (0, 0)
168#define FPU_NONE	ARM_FEATURE (0, 0)
169#define ARM_ANY		ARM_FEATURE (-1, 0)	/* Any basic core.  */
170#define FPU_ANY_HARD	ARM_FEATURE (0, FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
171#define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2 | ARM_EXT_V7 | ARM_EXT_V7A | ARM_EXT_V7R | ARM_EXT_V7M | ARM_EXT_DIV, 0)
172
173/* There are too many feature bits to fit in a single word, so use a
174   structure.  For simplicity we put all core features in one word and
175   everything else in the other.  */
176typedef struct
177{
178  unsigned long core;
179  unsigned long coproc;
180} arm_feature_set;
181
182#define ARM_CPU_HAS_FEATURE(CPU,FEAT) \
183  (((CPU).core & (FEAT).core) != 0 || ((CPU).coproc & (FEAT).coproc) != 0)
184
185#define ARM_MERGE_FEATURE_SETS(TARG,F1,F2)	\
186  do {						\
187    (TARG).core = (F1).core | (F2).core;	\
188    (TARG).coproc = (F1).coproc | (F2).coproc;	\
189  } while (0)
190
191#define ARM_CLEAR_FEATURE(TARG,F1,F2)		\
192  do {						\
193    (TARG).core = (F1).core &~ (F2).core;	\
194    (TARG).coproc = (F1).coproc &~ (F2).coproc;	\
195  } while (0)
196
197#define ARM_FEATURE(core, coproc) {(core), (coproc)}
198