1//===-- MBlazeInstrInfo.h - MBlaze Instruction Information ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the MBlaze implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef MBLAZEINSTRUCTIONINFO_H
15#define MBLAZEINSTRUCTIONINFO_H
16
17#include "MBlaze.h"
18#include "MBlazeRegisterInfo.h"
19#include "llvm/Support/ErrorHandling.h"
20#include "llvm/Target/TargetInstrInfo.h"
21
22#define GET_INSTRINFO_HEADER
23#include "MBlazeGenInstrInfo.inc"
24
25namespace llvm {
26
27namespace MBlaze {
28
29  // MBlaze Branch Codes
30  enum FPBranchCode {
31    BRANCH_F,
32    BRANCH_T,
33    BRANCH_FL,
34    BRANCH_TL,
35    BRANCH_INVALID
36  };
37
38  // MBlaze Condition Codes
39  enum CondCode {
40    // To be used with float branch True
41    FCOND_F,
42    FCOND_UN,
43    FCOND_EQ,
44    FCOND_UEQ,
45    FCOND_OLT,
46    FCOND_ULT,
47    FCOND_OLE,
48    FCOND_ULE,
49    FCOND_SF,
50    FCOND_NGLE,
51    FCOND_SEQ,
52    FCOND_NGL,
53    FCOND_LT,
54    FCOND_NGE,
55    FCOND_LE,
56    FCOND_NGT,
57
58    // To be used with float branch False
59    // This conditions have the same mnemonic as the
60    // above ones, but are used with a branch False;
61    FCOND_T,
62    FCOND_OR,
63    FCOND_NEQ,
64    FCOND_OGL,
65    FCOND_UGE,
66    FCOND_OGE,
67    FCOND_UGT,
68    FCOND_OGT,
69    FCOND_ST,
70    FCOND_GLE,
71    FCOND_SNE,
72    FCOND_GL,
73    FCOND_NLT,
74    FCOND_GE,
75    FCOND_NLE,
76    FCOND_GT,
77
78    // Only integer conditions
79    COND_EQ,
80    COND_GT,
81    COND_GE,
82    COND_LT,
83    COND_LE,
84    COND_NE,
85    COND_INVALID
86  };
87
88  // Turn condition code into conditional branch opcode.
89  inline static unsigned GetCondBranchFromCond(CondCode CC) {
90    switch (CC) {
91    default: llvm_unreachable("Unknown condition code");
92    case COND_EQ: return MBlaze::BEQID;
93    case COND_NE: return MBlaze::BNEID;
94    case COND_GT: return MBlaze::BGTID;
95    case COND_GE: return MBlaze::BGEID;
96    case COND_LT: return MBlaze::BLTID;
97    case COND_LE: return MBlaze::BLEID;
98    }
99  }
100
101  /// GetOppositeBranchCondition - Return the inverse of the specified cond,
102  /// e.g. turning COND_E to COND_NE.
103  // CondCode GetOppositeBranchCondition(MBlaze::CondCode CC);
104
105  /// MBlazeCCToString - Map each FP condition code to its string
106  inline static const char *MBlazeFCCToString(MBlaze::CondCode CC) {
107    switch (CC) {
108    default: llvm_unreachable("Unknown condition code");
109    case FCOND_F:
110    case FCOND_T:   return "f";
111    case FCOND_UN:
112    case FCOND_OR:  return "un";
113    case FCOND_EQ:
114    case FCOND_NEQ: return "eq";
115    case FCOND_UEQ:
116    case FCOND_OGL: return "ueq";
117    case FCOND_OLT:
118    case FCOND_UGE: return "olt";
119    case FCOND_ULT:
120    case FCOND_OGE: return "ult";
121    case FCOND_OLE:
122    case FCOND_UGT: return "ole";
123    case FCOND_ULE:
124    case FCOND_OGT: return "ule";
125    case FCOND_SF:
126    case FCOND_ST:  return "sf";
127    case FCOND_NGLE:
128    case FCOND_GLE: return "ngle";
129    case FCOND_SEQ:
130    case FCOND_SNE: return "seq";
131    case FCOND_NGL:
132    case FCOND_GL:  return "ngl";
133    case FCOND_LT:
134    case FCOND_NLT: return "lt";
135    case FCOND_NGE:
136    case FCOND_GE:  return "ge";
137    case FCOND_LE:
138    case FCOND_NLE: return "nle";
139    case FCOND_NGT:
140    case FCOND_GT:  return "gt";
141    }
142  }
143
144  inline static bool isUncondBranchOpcode(int Opc) {
145    switch (Opc) {
146    default: return false;
147    case MBlaze::BRI:
148    case MBlaze::BRAI:
149    case MBlaze::BRID:
150    case MBlaze::BRAID:
151      return true;
152    }
153  }
154
155  inline static bool isCondBranchOpcode(int Opc) {
156    switch (Opc) {
157    default: return false;
158    case MBlaze::BEQI: case MBlaze::BEQID:
159    case MBlaze::BNEI: case MBlaze::BNEID:
160    case MBlaze::BGTI: case MBlaze::BGTID:
161    case MBlaze::BGEI: case MBlaze::BGEID:
162    case MBlaze::BLTI: case MBlaze::BLTID:
163    case MBlaze::BLEI: case MBlaze::BLEID:
164      return true;
165    }
166  }
167}
168
169class MBlazeInstrInfo : public MBlazeGenInstrInfo {
170  MBlazeTargetMachine &TM;
171  const MBlazeRegisterInfo RI;
172public:
173  explicit MBlazeInstrInfo(MBlazeTargetMachine &TM);
174
175  /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
176  /// such, whenever a client has an instance of instruction info, it should
177  /// always be able to get register info as well (through this method).
178  ///
179  virtual const MBlazeRegisterInfo &getRegisterInfo() const { return RI; }
180
181  /// isLoadFromStackSlot - If the specified machine instruction is a direct
182  /// load from a stack slot, return the virtual or physical register number of
183  /// the destination along with the FrameIndex of the loaded stack slot.  If
184  /// not, return 0.  This predicate must return 0 if the instruction has
185  /// any side effects other than loading from the stack slot.
186  virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
187                                       int &FrameIndex) const;
188
189  /// isStoreToStackSlot - If the specified machine instruction is a direct
190  /// store to a stack slot, return the virtual or physical register number of
191  /// the source reg along with the FrameIndex of the loaded stack slot.  If
192  /// not, return 0.  This predicate must return 0 if the instruction has
193  /// any side effects other than storing to the stack slot.
194  virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
195                                      int &FrameIndex) const;
196
197  /// Branch Analysis
198  virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
199                             MachineBasicBlock *&FBB,
200                             SmallVectorImpl<MachineOperand> &Cond,
201                             bool AllowModify) const;
202  virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
203                                MachineBasicBlock *FBB,
204                                const SmallVectorImpl<MachineOperand> &Cond,
205                                DebugLoc DL) const;
206  virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
207
208  virtual bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)
209    const;
210
211  virtual void copyPhysReg(MachineBasicBlock &MBB,
212                           MachineBasicBlock::iterator I, DebugLoc DL,
213                           unsigned DestReg, unsigned SrcReg,
214                           bool KillSrc) const;
215  virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
216                                   MachineBasicBlock::iterator MBBI,
217                                   unsigned SrcReg, bool isKill, int FrameIndex,
218                                   const TargetRegisterClass *RC,
219                                   const TargetRegisterInfo *TRI) const;
220
221  virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
222                                    MachineBasicBlock::iterator MBBI,
223                                    unsigned DestReg, int FrameIndex,
224                                    const TargetRegisterClass *RC,
225                                    const TargetRegisterInfo *TRI) const;
226
227  /// Insert nop instruction when hazard condition is found
228  virtual void insertNoop(MachineBasicBlock &MBB,
229                          MachineBasicBlock::iterator MI) const;
230
231  /// getGlobalBaseReg - Return a virtual register initialized with the
232  /// the global base register value. Output instructions required to
233  /// initialize the register in the function entry block, if necessary.
234  ///
235  unsigned getGlobalBaseReg(MachineFunction *MF) const;
236};
237
238}
239
240#endif
241