1//===-- SPURegisterInfo.h - Cell SPU Register Information Impl --*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Cell SPU implementation of the TargetRegisterInfo
11// class.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef SPU_REGISTERINFO_H
16#define SPU_REGISTERINFO_H
17
18#include "SPU.h"
19
20#define GET_REGINFO_HEADER
21#include "SPUGenRegisterInfo.inc"
22
23namespace llvm {
24  class SPUSubtarget;
25  class TargetInstrInfo;
26  class Type;
27
28  class SPURegisterInfo : public SPUGenRegisterInfo {
29  private:
30    const SPUSubtarget &Subtarget;
31    const TargetInstrInfo &TII;
32
33    //! Predicate: Does the machine function use the link register?
34    bool usesLR(MachineFunction &MF) const;
35
36  public:
37    SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
38
39    //! Translate a register's enum value to a register number
40    /*!
41      This method translates a register's enum value to it's regiser number,
42      e.g. SPU::R14 -> 14.
43     */
44    static unsigned getRegisterNumbering(unsigned RegEnum);
45
46    /// getPointerRegClass - Return the register class to use to hold pointers.
47    /// This is used for addressing modes.
48    virtual const TargetRegisterClass *
49    getPointerRegClass(const MachineFunction &MF, unsigned Kind = 0) const;
50
51    /// After allocating this many registers, the allocator should feel
52    /// register pressure. The value is a somewhat random guess, based on the
53    /// number of non callee saved registers in the C calling convention.
54    virtual unsigned getRegPressureLimit( const TargetRegisterClass *RC,
55                                          MachineFunction &MF) const{
56      return 50;
57    }
58
59    //! Return the array of callee-saved registers
60    virtual const uint16_t* getCalleeSavedRegs(const MachineFunction *MF) const;
61
62    //! Allow for scavenging, so we can get scratch registers when needed.
63    virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
64    { return true; }
65
66    //! Enable tracking of liveness after register allocation, since register
67    // scavenging is enabled.
68    virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const
69    { return true; }
70
71    //! Return the reserved registers
72    BitVector getReservedRegs(const MachineFunction &MF) const;
73
74    //! Eliminate the call frame setup pseudo-instructions
75    void eliminateCallFramePseudoInstr(MachineFunction &MF,
76                                       MachineBasicBlock &MBB,
77                                       MachineBasicBlock::iterator I) const;
78    //! Convert frame indicies into machine operands
79    void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
80                             RegScavenger *RS = NULL) const;
81
82    //! Get the stack frame register (SP, aka R1)
83    unsigned getFrameRegister(const MachineFunction &MF) const;
84
85    //------------------------------------------------------------------------
86    // New methods added:
87    //------------------------------------------------------------------------
88
89    //! Convert D-form load/store to X-form load/store
90    /*!
91      Converts a regiser displacement load/store into a register-indexed
92      load/store for large stack frames, when the stack frame exceeds the
93      range of a s10 displacement.
94     */
95    int convertDFormToXForm(int dFormOpcode) const;
96
97    //! Acquire an unused register in an emergency.
98    unsigned findScratchRegister(MachineBasicBlock::iterator II,
99                                 RegScavenger *RS,
100                                 const TargetRegisterClass *RC,
101                                 int SPAdj) const;
102
103  };
104} // end namespace llvm
105
106#endif
107